On Thu, Dec 12 2024, Sebastian Ott <seb...@redhat.com> wrote: > On Fri, 6 Dec 2024, Cornelia Huck wrote: >> A respin/update on the aarch64 KVM cpu models. Also available at >> gitlab.com/cohuck/qemu arm-cpu-model-rfcv2 >> >> Find Eric's original cover letter below, so that I do not need to >> repeat myself on the aspects that have not changed since RFCv1 :) >> >> Changes from RFCv1: >> >> Rebased on more recent QEMU (some adaptions in the register conversions >> of the first few patches.) >> >> Based on feedback, I have removed the "custom" cpu model; instead, I >> have added the new SYSREG_<REG>_<FIELD> properties to the "host" model. >> This works well if you want to tweak anything that does not correspond >> to the existing properties for the host model; however, if you e.g. >> wanted to tweak sve, you have two ways to do so -- we'd probably either >> want to check for conflicts, or just declare precedence. The kvm-specific >> props remain unchanged, as they are orthogonal to this configuration. >> >> The cpu model expansion for the "host" model now dumps the new SYSREG_ >> properties in addition to the existing host model properties; this is a >> bit ugly, but I don't see a good way on how to split this up. >> > > I gave this a spin today and successfully migrated a VM between 2 similar > machines that only differ in the DIC bit of the cache type register using: > > -cpu host,SYSREG_CTR_EL0_DIC=0 > > This allows me to get rid of my horrid qemu hacks to achieve the same.
Great, thanks for testing!
