On Fri, Dec 20 2024, Kashyap Chamarthy <kcham...@redhat.com> wrote: > Related tangent on CPU feature discoverability on ARM: > > Speaking of "Neoverse-N1", looking at a system that I have access to, > the `lscpu` output does not say anything about who the integrator is; it > only says: > > ... > Vendor ID: ARM > Model name: Neoverse-N1 > ... > > I realize, `lscpu` displays only whatever the kernel knows. Nothing in > `dmidecode` either. > > Also, it looks like there's no equivalent of a "CPUID" instruction (I > realize it is x86-specific) on ARM. Although, I came across a Google > Git repo that seems to implement a bespoke, "aarch64_cpuid". From a > what I see, it seems to fetch the "Main ID Register" (MIDR_EL1) - I > don't know enough about it to understand its implications: > > https://github.com/google/cpu_features/blob/main/src/impl_aarch64_cpuid.c
My guess is that this is mostly for "we have code that looks for a cpuid like on x86, let's provide some code on arm that gives something that is at least somewhat useful." For "CPU feature discoverability", I don't think that there's any way other than looking at the actual id registers. It would be nice if you could at least know that "there are some <unspecified> differences in features" by comparing MIDR/REVIDR/AIDR, but that's not the case IIRC? [Anyway, I'm off for the year :)]
