Hi Daniel,
(now merged as commit a6b53378f537)
On 25/4/24 17:50, Daniel Henrique Barboza wrote:
SBI defines a Debug Console extension "DBCN" that will, in time, replace
the legacy console putchar and getchar SBI extensions.
The appeal of the DBCN extension is that it allows multiple bytes to b
(+), 57 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 4/5/25 18:01, BALATON Zoltan wrote:
Export memory regions as sysbus mmio regions and let the board code
map them.
Why? The mapping belong to the host bridge, not the board...
Signed-off-by: BALATON Zoltan
---
hw/pci-host/raven.c | 37 -
hw/ppc/prep.
: Philippe Mathieu-Daudé
_ops, h->bus,
"pci-mmcfg", 0x0040);
memory_region_add_subregion(address_space_mem, 0x8080, &h->mmcfg);
Casting the opaque:
Reviewed-by: Philippe Mathieu-Daudé
On 4/5/25 18:01, BALATON Zoltan wrote:
The mmcfg field in PCIHostState is only used by raven for the PCI
config direct access but is not actually needed as the memory region
lifetime can be managed by the object given during init so use that
and remove the unused field from PCIHostState.
Well,
insertions(+), 31 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 4/5/25 18:01, BALATON Zoltan wrote:
Use OBJECT_DECLARE_SIMPLE_TYPE macro instead of open coding it.
Signed-off-by: BALATON Zoltan
---
hw/pci-host/raven.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
ev), BUS(&s->pci_bus), errp);
func0 =
+pci_create_simple(&s->pci_bus, PCI_DEVFN(0, 0), TYPE_RAVEN_PCI_DEVICE);
}
If you don't object, I can amend if queuing; otherwise:
Reviewed-by: Philippe Mathieu-Daudé
On 2/6/25 13:56, BALATON Zoltan wrote:
On Mon, 2 Jun 2025, Philippe Mathieu-Daudé wrote:
On 30/5/25 02:54, BALATON Zoltan wrote:
On Thu, 29 May 2025, Bernhard Beschow wrote:
Am 25. April 2025 15:28:20 UTC schrieb "Philippe Mathieu-Daudé"
:
From: BALATON Zoltan
We have several d
is-legacy-prep", PREPPCIState, is_legacy_prep,
- false),
};
static void raven_pcihost_class_init(ObjectClass *klass, const void *data)
Reviewed-by: Philippe Mathieu-Daudé
On 3/6/25 05:04, Xiaoyao Li wrote:
On 6/3/2025 1:31 AM, Cédric Le Goater wrote:
Use PRI formats where required and fix pointer cast.
Maybe we can make 32-bit build exclusive with CONFIG_TDX? since TDX is
not supported on 32-bit host.
Yes please!
Cc: Xiaoyao Li
Signed-off-by: Cédric Le
"none" machine (which is always available)
here instead.
Signed-off-by: Thomas Huth
---
tests/functional/test_vnc.py | 4
1 file changed, 4 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
ping?
On 26/5/25 11:52, Philippe Mathieu-Daudé wrote:
Replace target_ulong -> vaddr/size_t to compile once.
since v2:
- fixed build error when TCG enabled (Pierrick)
since v1:
- fixed build error when TCG disabled (Pierrick)
Based-on: <20250521223414.248276-1-pierrick.bouv...@lina
On 3/6/25 10:25, Song Gao wrote:
on qemu we got an aborted error
**
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_value:
code should not be reached
Bail out!
ERROR:../target/loongarch/tcg/insn_trans/trans_vec.c.inc:3574:vldi_get_value:
code should not be reached
Aborte
hanged, 26 insertions(+), 19 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 2/6/25 11:16, Peter Maydell wrote:
On Mon, 2 Jun 2025 at 10:08, Philippe Mathieu-Daudé wrote:
We shouldn't kick a stopped vCPU, as it will be resumed.
What is this trying to fix?
Hmm I guess the bug is in the accelerator I'm trying (split).
Do we get wrong-behaviour,
We shouldn't kick a stopped vCPU, as it will be resumed.
Signed-off-by: Philippe Mathieu-Daudé
---
RFC: Better to assert and fix call sites?
---
system/cpus.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/system/cpus.c b/system/cpus.c
index d16b0dff989..4835e5ced48 100644
On 2/6/25 08:13, Thomas Huth wrote:
On 09/05/2025 17.23, Igor Mammedov wrote:
On Thu, 8 May 2025 15:35:24 +0200
Philippe Mathieu-Daudé wrote:
These machines has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit
ce80c4fa6ff "
s */
-__be16 type; /* ethernet frame type */
+uint16_t type; /* ethernet frame type */
Some comments are now mis-aligned, otherwise:
Reviewed-by: Philippe Mathieu-Daudé
} eth;
struct {
uint8_t proto; /* IP
(Cc'ing maintainers)
On 29/5/25 10:54, oltolm wrote:
The build failed when run on Windows. I replaced calls to Unix programs
like ´cat´ and ´true´ with calls to ´python´. I wrapped calls to
´os.path.relpath´ in try-except because it can fail when the two paths
are on different drives. I made sur
On 30/5/25 02:54, BALATON Zoltan wrote:
On Thu, 29 May 2025, Bernhard Beschow wrote:
Am 25. April 2025 15:28:20 UTC schrieb "Philippe Mathieu-Daudé"
:
From: BALATON Zoltan
We have several device tree files already and may have more in the
future so add a new dtb subdirectory and m
On 30/5/25 13:45, Michael S. Tsirkin wrote:
On Wed, May 28, 2025 at 10:30:17AM +0200, Thomas Huth wrote:
On 27/05/2025 19.20, Thomas Huth wrote:
On 12/05/2025 10.39, Philippe Mathieu-Daudé wrote:
The "fallback" property was only used by the hw_compat_2_5[] array,
as 'fallback=1
tions.
- Link to v1:
https://lore.kernel.org/qemu-devel/20250531-rsg-v1-1-2417b4fe8...@rsg.ci.i.u-tokyo.ac.jp
---
MAINTAINERS | 16
.mailmap| 3 ++-
2 files changed, 10 insertions(+), 9 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
Hi Eric,
On 27/5/25 09:40, Eric Auger wrote:
Set up the IO registers used to communicate between QEMU
and ACPI.
Move the create_pcie() call after the creation of the acpi
ged device since hotplug callbacks will soon be called on gpex
realize and will require the acpi pcihp state to be initializ
ompilation and test time in
the future.
Signed-off-by: Thomas Huth
---
docs/about/deprecated.rst | 13 +
1 file changed, 13 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 27/5/25 12:45, Gerd Hoffmann wrote:
Hi,
I do believe QEMU's current implementation is also in conformance to the spec,
as the reset process itself is done instantly in QEMU.
Yes, that is fine spec-wise. The problem is the seabios driver which
doesn't wait until the hardware signals com
+---
1 file changed, 36 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
from Philippe Mathieu-Daudé)
Signed-off-by: Thomas Huth
---
tests/functional/test_microblaze_s3adsp1800.py | 17 -
.../functional/test_microblazeel_s3adsp1800.py | 5 -
2 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/tests/functional
removed-features.rst | 9 +
hw/microblaze/petalogix_ml605_mmu.c | 15 ---
hw/microblaze/xlnx-zynqmp-pmu.c | 7 +--
4 files changed, 14 insertions(+), 23 deletions(-)
\o/ :~)
Reviewed-by: Philippe Mathieu-Daudé
+Gustavo
On 4/5/25 22:57, Richard Henderson wrote:
For a-profile, check A32 vs A64 state.
For m-profile, use cpu_pointer_wrap_uint32.
Cc: qemu-...@nongnu.org
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 24
target/arm/tcg/cpu-v7m.c | 1 +
2 file
On 4/5/25 22:57, Richard Henderson wrote:
Check va32 state.
Cc: Song Gao
Cc: Bibo Mao
Signed-off-by: Richard Henderson
---
target/loongarch/cpu.c | 7 +++
1 file changed, 7 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 5/5/25 18:16, Richard Henderson wrote:
On 5/5/25 07:41, Philippe Mathieu-Daudé wrote:
On 4/5/25 22:57, Richard Henderson wrote:
Use the existing wrap_address function.
Cc: qemu-s3...@nongnu.org
Signed-off-by: Richard Henderson
---
target/s390x/cpu.c | 9 +
1 file changed, 9
On 5/5/25 20:59, Richard Henderson wrote:
On 5/5/25 09:47, Philippe Mathieu-Daudé wrote:
On 4/5/25 22:57, Richard Henderson wrote:
Check 32 vs 64-bit and pointer masking state.
Cc: qemu-ri...@nongnu.org
Signed-off-by: Richard Henderson
---
target/riscv/tcg/tcg-cpu.c | 26
u, addr, size,
- full->attrs, wp_flags, retaddr);
-}
+cpu_check_watchpoint(cpu, addr, size,
+ full->attrs, wp_flags, retaddr);
}
return hostaddr;
Patch LGTM but this is outside my comfort zone, so better wait for
a second review ;)
Reviewed-by: Philippe Mathieu-Daudé
va_end(ap);
value = qemu_xen_xs_read(h, tid, path, len);
-trace_xs_node_read(path, value);
if (!value) {
error_setg_errno(errp, errno, "failed to read from '%s'", path);
+return NULL;
}
-
-g_free(path);
+trace_xs_node_read(path, value);
ahci_reset_complete() which resets them.
No logical changes so far.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/ahci.c | 31 ---
hw/ide/trace-events | 1 +
2 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index
: Philippe Mathieu-Daudé
---
include/hw/ide/ahci.h | 1 +
hw/ide/ahci.c | 39 +--
tests/qtest/ahci-test.c | 4
3 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h
index cd07b87811b..8
Intented to help SeaBIOS development; untested there
(except with QEMU test suite).
Jiaxun, is it helpful to you?
Philippe Mathieu-Daudé (2):
hw/ide/ahci: Introduce ahci_reset_delayed() and ahci_reset_complete()
hw/ide/ahci: Delay a bit before completing reset
include/hw/ide/ahci.h | 1
On 26/5/25 15:18, BALATON Zoltan wrote:
On Mon, 26 May 2025, Philippe Mathieu-Daudé wrote:
Only add default devices checking defaults_enabled().
Remove the unused usb_disabled field in MachineState.
At least for Mac machines this may be more complex. I think there is a -
usb switch to enable
Commit c6e765035bc ("powerpc: fix -machine usb=no for newworld
and pseries machines") added the MachineState::usb_disabled
field. It is now unused, remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/boards.h | 1 -
hw/core/machine.c | 1 -
2 files changed, 2 deletion
Only create default devices when requested, avoid have the
machine implementation to modify the generic 'usb' boolean
set from command line.
Fixes: 59a0419856c ("hw/ppc/mac_newworld: simplify usb controller creation
logic")
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pp
(forgot to Cc Thomas)
On 26/5/25 15:00, Philippe Mathieu-Daudé wrote:
Only add default devices checking defaults_enabled().
Remove the unused usb_disabled field in MachineState.
Based-on: <20250526112346.48744-1-phi...@linaro.org>
"hw/ppc: Fix --without-default-de
Only create default devices when requested, avoid have the
machine implementation to modify the generic 'usb' boolean
set from command line.
Fixes: 4ee9ced979e ("hw/ppc/spapr: simplify usb controller creation logic")
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/spa
Only add default devices checking defaults_enabled().
Remove the unused usb_disabled field in MachineState.
Based-on: <20250526112346.48744-1-phi...@linaro.org>
"hw/ppc: Fix --without-default-devices build"
Philippe Mathieu-Daudé (3):
hw/ppc/spapr: Only create defa
On 26/5/25 13:48, Cédric Le Goater wrote:
On 5/26/25 13:23, Philippe Mathieu-Daudé wrote:
Since commit 9808ce6d5cb, building QEMU configured with
'--without-default-devices' fails:
Undefined symbols for architecture arm64:
"_pnv_chip_find_core&qu
deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
hanks!
Reviewed-by: Philippe Mathieu-Daudé
select PCA9552 if POWERNV
Fixes: 263b81ee15a ("ppc/pnv: Add an I2C controller model")
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index ced6bbc7404..0d017df83ee 100644
--- a/hw/ppc/
ml", referenced from:
_isa_ipmi_bt_class_init in hw_ipmi_isa_ipmi_bt.c.o
ld: symbol(s) not found for architecture arm64
Split the source set list to avoid a too long line.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/acpi/meson.build | 10 --
1 file changed, 8 insertions(+), 2 deletions
misc_helper.c.o
ld: symbol(s) not found for architecture arm64
clang: error: linker command failed with exit code 1
Fix by adding a stub when CONFIG_POWERNV is not available.
Reported-by: Thomas Huth
Fixes: 9808ce6d5cb ("target/ppc: Big-core scratch register fix")
Signed-off-by: P
Fix build issue reported by Thomas:
https://lore.kernel.org/qemu-devel/2d6dead5-f56c-43cf-b7d1-9567fef99...@redhat.com/
Philippe Mathieu-Daudé (3):
hw/acpi: Build IPMI stubs when ACPI is disabled
hw/ppc: PowerNV machines expose a I2C bus
hw/ppc: Add stub for pnv_chip_find_core()
hw/ppc
Hi Li,
On 15/5/25 14:41, Li Chen wrote:
From: Li Chen
The ACPI SPCR (Serial Port Console Redirection) table allows firmware
to specify a preferred serial console device to the operating system.
On ARM64 systems, Linux by default respects this table: even if the
kernel command line does not inc
Replace target_ulong by vaddr or size_t types to match
cpu_memory_rw_debug() prototype in "exec/cpu-common.h":
> int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
> void *ptr, size_t len,
> bool is_write);
Signed-off-b
hw/arm/Kconfig | 1 -
hw/block/Kconfig | 3 -
hw/block/meson.build | 1 -
5 files changed, 858 deletions(-)
delete mode 100644 hw/block/nand.c
Reviewed-by: Philippe Mathieu-Daudé
x27;)
+exec_command_and_wait_for_pattern(test, 'lspci -d 11ab:4620',
+ 'GT-64120')
exec_command_and_wait_for_pattern(test,
'cat /sys/bus/i2c/devices/i2c-0/name',
'SMBus PIIX4 adapter')
Reviewed-by: Philippe Mathieu-Daudé
On 26/5/25 11:27, Philippe Mathieu-Daudé wrote:
On 26/5/25 07:29, Akihiko Odaki wrote:
sem in AppleGFXReadMemoryJob is an one-shot event so it can be converted
into QemuEvent, which is more specialized for such a use case.
BTW it would be nice to document that in "qemu/thread.h
}
meson: merge lib{system, user}_ss with {system, user}_ss
meson: remove lib{system, user}_ss aliases
meson: merge hw_common_arch in target_common_system_arch
Tested-by: Philippe Mathieu-Daudé
Replace target_ulong -> vaddr/size_t to compile once.
since v2:
- fixed build error when TCG enabled (Pierrick)
since v1:
- fixed build error when TCG disabled (Pierrick)
Based-on: <20250521223414.248276-1-pierrick.bouv...@linaro.org>
Philippe Mathieu-Daudé (2):
semihosting/uacces
Signed-off-by: Philippe Mathieu-Daudé
---
semihosting/meson.build | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/semihosting/meson.build b/semihosting/meson.build
index f3d38dda91d..b1ab2506c6e 100644
--- a/semihosting/meson.build
+++ b/semihosting/meson.build
@@ -3,15
On 20/5/25 12:28, Chenyi Qiang wrote:
So that the caller can check the result of NotifyRamDiscard() handler if
the operation fails.
Signed-off-by: Chenyi Qiang
---
Changes in v5:
- Revert to use of NotifyRamDiscard()
Changes in v4:
- Newly added.
---
hw/vfio/listener.c |
Hi Chenyi Qiang,
On 20/5/25 12:28, Chenyi Qiang wrote:
Update ReplayRamDiscard() function to return the result and unify the
ReplayRamPopulate() and ReplayRamDiscard() to ReplayRamDiscardState() at
the same time due to their identical definitions. This unification
simplifies related structures,
Mathieu-Daudé
++--
2 files changed, 13 insertions(+), 13 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
/meson.build| 1 +
7 files changed, 133 insertions(+), 266 deletions(-)
Great.
Reviewed-by: Philippe Mathieu-Daudé
ions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 16/5/25 16:06, Thomas Huth wrote:
On 16/05/2025 17.00, Philippe Mathieu-Daudé wrote:
On 15/5/25 15:20, Thomas Huth wrote:
From: Thomas Huth
Both machines were added with little-endian in mind only (the
"endianness" CPU property was hard-wired to "true", see com
+Markus
On 24/5/25 13:55, Richard Henderson wrote:
On 5/15/25 14:20, Thomas Huth wrote:
+static int machine_get_endianness(Object *obj, Error **errp
G_GNUC_UNUSED)
+{
+ S3Adsp1800MachineState *ms = PETALOGIX_S3ADSP1800_MACHINE(obj);
+ return ms->endianness;
+}
+
+static void machine_set_
Hi Eric,
On 14/5/25 18:01, Eric Auger wrote:
QEMU will notify the OS about PCI hotplug/hotunplug events through
GED interrupts. Let the GED device handle a new PCI hotplug event.
On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK
mutex held.
The GED device uses a dedicated MMIO
On 14/5/25 18:00, Eric Auger wrote:
No need to export aml_pci_device_dsm() as it is only used
in hw/i386/acpi-build.c.
Signed-off-by: Eric Auger
---
include/hw/acpi/pci.h | 1 -
hw/i386/acpi-build.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu
as Huth
---
tests/functional/test_mem_addr_space.py | 63 +
1 file changed, 32 insertions(+), 31 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 21/5/25 17:42, Alex Bennée wrote:
From: Dominik 'Disconnect3d' Czarnota
This commit adds support for the `qGDBServerVersion` packet to the qemu
gdbstub which could be used by clients to detect the QEMU version
(and, e.g., use a workaround for known bugs).
This packet is not documented/stan
On 21/5/25 17:42, Alex Bennée wrote:
Thanks for volunteering to help.
Cc: Akihiko Odaki
Cc: Dmitry Osipenko
Signed-off-by: Alex Bennée
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 22/5/25 06:45, Akihiko Odaki wrote:
On 2025/05/22 1:42, Alex Bennée wrote:
It's easy to get lost in zeros while setting the numbers of
instructions per second. Add a scaling suffix to make things simpler.
Signed-off-by: Alex Bennée
Reviewed-by: Pierrick Bouvier
---
v2
- normalise the s
On 22/5/25 11:35, Akihiko Odaki wrote:
On 2025/05/22 19:31, Alex Bennée wrote:
Akihiko Odaki writes:
On 2025/05/22 1:42, Alex Bennée wrote:
The user can run a subset of the tcg tests directly, e.g.:
make run-tcg-tests-hexagon-linux-user
but in this case we fail if there has not been a fu
test"
Reviewed-by: Philippe Mathieu-Daudé
Hi Manos,
You mentioned you are looking at a Rust implementation of our PFlash
model. IMHO better would be to implement from scratch without looking
at the C code. In case you need to, here are few notes about some
oddities I unfortunately inherited as maintainer.
[*] Interface to write sector
removed-features.rst | 9 +
hw/microblaze/petalogix_ml605_mmu.c | 15 ---
hw/microblaze/xlnx-zynqmp-pmu.c | 7 +--
4 files changed, 14 insertions(+), 23 deletions(-)
\o/
Reviewed-by: Philippe Mathieu-Daudé
I won't be able to look at the rest of this seri
On 12/5/25 16:45, Gustavo Romero wrote:
Add a functional test, aarch64_hotplug_pci, to exercise PCI hotplug and
hot-unplug on arm64.
Signed-off-by: Gustavo Romero
Reviewed-by: Daniel P. Berrangé
---
MAINTAINERS | 5 ++
tests/functional/meson.build
On 16/5/25 12:05, Sairaj Kodilkar wrote:
Commit c1f46999ef506 ("amd_iommu: Add support for pass though mode")
introduces the support for "pt" flag by enabling nodma memory when
"pt=off". This allowed VFIO devices to successfully register notifiers
by using nodma region.
But, This also broke thin
i386/amd_iommu: Simplify non-KVM checks on XTSup
feature")
Reported-by: Alejandro Jimenez
Tested-by: Tested-by: Alejandro Jimenez
Cc: Philippe Mathieu-Daudé
Cc: Joao Martins
Signed-off-by: Vasant Hegde
Signed-off-by: Sairaj Kodilkar
---
hw/i386/amd_iommu.c | 8
1 file ch
On 9/3/25 14:51, Cédric Le Goater wrote:
From: Jamin Lin
Introduce a new ast2700 INTCIO class to support AST2700 INTCIO.
Added new register definitions for INTCIO, including enable and status
registers for IRQs GICINT192 through GICINT197.
Created a dedicated IRQ array for INTCIO, supporting si
On 16/5/25 07:27, Pierrick Bouvier wrote:
As mentioned in 20250513115637.184940-1-th...@redhat.com, dependencies
Use LORE link instead?
https://lore.kernel.org/qemu-devel/20250513115637.184940-1-th...@redhat.com/
were missing when compiling per target libraries, thus breaking
compilation on c
Hi Clément,
On 14/5/25 14:41, Clément Chigot wrote:
On Tue, May 13, 2025 at 5:39 PM Philippe Mathieu-Daudé
wrote:
On 13/5/25 16:14, Clément Chigot wrote:
From: Frederic Konrad
This introduces a first-cpu-index property to the arm-gic, as some SOCs
could have two separate GIC (ie: the
On 15/5/25 17:22, Pierrick Bouvier wrote:
On 5/15/25 4:05 AM, Philippe Mathieu-Daudé wrote:
On 14/5/25 18:59, Pierrick Bouvier wrote:
On 5/14/25 9:53 AM, Philippe Mathieu-Daudé wrote:
On 14/5/25 10:24, Richard Henderson wrote:
On 5/13/25 18:39, Philippe Mathieu-Daudé wrote
On 14/5/25 18:59, Pierrick Bouvier wrote:
On 5/14/25 9:53 AM, Philippe Mathieu-Daudé wrote:
On 14/5/25 10:24, Richard Henderson wrote:
On 5/13/25 18:39, Philippe Mathieu-Daudé wrote:
arm_cpu_has_feature() is equivalent of arm_feature(), however
while the latter uses CPUARMState so is target
er Maydell
Signed-off-by: Zhao Liu
---
include/hw/core/resetcontainer.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
Cc: "Marc-André Lureau"
Signed-off-by: Zhao Liu
---
ui/console-vc.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 14/5/25 10:24, Richard Henderson wrote:
On 5/13/25 18:39, Philippe Mathieu-Daudé wrote:
arm_cpu_has_feature() is equivalent of arm_feature(), however
while the latter uses CPUARMState so is target-specific, the
former doesn't and can be called by target-agnostic code in hw/.
CPUARMSta
-tight.c | 2 +-
ui/vnc-enc-zrle.c | 2 +-
ui/vnc-jobs.c | 2 +-
ui/vnc.c | 6 +++---
ui/vnc.h | 2 +-
5 files changed, 7 insertions(+), 7 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
Hi Michael,
Minor comments inline.
On 14/5/25 09:39, Michael Clark wrote:
the x86-mini library is a lightweight x86 encoder, decoder, and
disassembler that uses extensions to the Intel instruction set
metadata to encode modern VEX/EVEX instructions and legacy
instructions with a parameterized L
On 13/5/25 19:39, Philippe Mathieu-Daudé wrote:
The objective is to remove the arm_ss[] source set soon.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
Some files include "cpu.h", others "target/arm/cpu.h".
Unify by using the latter which is more explicit.
Suggested-by: Pierrick Bouvier
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpregs.h| 2 +-
target/arm/cpu-features.h | 2 +-
target/arm/tcg
On 13/5/25 19:39, Philippe Mathieu-Daudé wrote:
Philippe Mathieu-Daudé (19):
target/arm/tcg-stubs: compile file once (system)
target/arm/hvf_arm: Avoid using poisoned CONFIG_HVF definition
target/arm: Only link with zlib when TCG is enabled
target/arm: Always include full path to
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
hw/arm/aspeed_ast27x0.c| 1 +
hw/arm/bcm2838.c | 1 +
hw/arm/exynos4210.c| 1 +
hw/arm/fsl-imx8mp.c| 1 +
hw/arm/mps3r.c | 1 +
hw/arm/npcm8xx.c | 1 +
hw/vmapple
arm_build_mp_affinity() and affinity mask definitionss are
related to multiprocessing. Move them to "multiprocessing.h",
including this header when necessary.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
target/arm/cpu.h | 17 -
^
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
target/arm/hvf_arm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/hvf_arm.h b/target/arm/hvf_arm.h
index 7a44e092620..ea82f2691df 100644
--- a/target/arm/hvf_arm.h
+++ b/target/ar
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
hw/arm/exynos4210.c | 1 -
hw/arm/highbank.c | 1 -
hw/arm/mps3r.c | 1 -
hw/arm/smmuv3.c | 1 -
4 files changed, 4 deletions(-)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 76001ff0dfc
^
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
target/arm/kvm_arm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index c4178d1327c..7dc83caed5c 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -12
By using arm_cpu_has_feature() instead of arm_feature()
we don't need to include "cpu.h" anymore.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
hw/arm/realview.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/hw/arm/real
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