On Tuesday, Oct 8, 2019 at 5:57 PM, Peter Maydell
wrote:
>
> On Tue, 8 Oct 2019 at 10:50, Libo Zhou wrote:
>>
>> Is there any follow-up guys? Help would be appreciated.
>
> Not really. You're using a locally modified QEMU that
> you appear to be trying to
Is there any follow-up guys? Help would be appreciated.
-- Original --
From: "Libo Zhou";;
Date: Oct 6, 2019
To: "Peter Maydell";
Cc: "qemu-devel";
Subject: Re: gdbstub and gbd segfaults on different instructions in user
jr ra
IN: main
0x004000fc: nop
-- Original --
From: "Peter Maydell";;
Send time: Tuesday, Oct 1, 2019 0:23 AM
To: "Libo Zhou";
Cc: "qemu-devel";
Subject: Re: gdbstub and gbd segfaults on different instructions in user
spaceemu
this point, I am really stuck. I have spent a long time on this, but I just
can't figure out what is going wrong here. If anyone can help me out I would
really appreciate it.
Cheers,
Libo Zhou
I'm copying and pasting all my diff below, just in case something else caused
the segfault. Any help would be really appreciated guys.
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index bbf056a5..8a4acff3 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -50,
is
working fine, but lw gives me a segfault. I have been stuck on this for a long
while, since it looks like I only need to add that one line of gen_ld function.
I also tried debugging QEMU wtih gdb, but the segfault wasn't thrown
immediately after lw instruction like gdbstub does.
Does anyone have any advice?
Thanks,
Libo Zhou
> > +{
> > +.name = "MyCPU",
> > +.insn_flags = CPU_MIPS1 | INSN_MYCPU,
> > +},
> > ...
> > I just need to simulate it's instruction set in linux user emulation, I
> > didn't include CP0* items in the list. Is this good enough to add a new CPU
> > model?
> Something like that might be ac
still there.
I am suspecting that the way I added my own CPU model in translate_init.inc.c
is wrong. Below is what I added:
...
+{
+.name = "MyCPU",
+.insn_flags = CPU_MIPS1 | INSN_MYCPU,
+},
...
I just need to simulate it's instruction set in linux user emulation, I didn't
include CP0* items in the list. Is this good enough to add a new CPU model?
Thanks,
Libo Zhou
> > More updates about this. I just disassembled the unrecognized hex by hand,
> > and figured out that the store word and load word opcodes are not the same
> > as specified in translate.c. While the remaining fields of those
> > unrecognized instructions do match with the source and destinatio
> > I would start by using the QEMU gdbstub to connect a
> > MIPS-aware gdb. Then when the SIGILL arrives you can see
> > what instruction the guest program was trying to execute.
> Just tried it and found something interesting.
> I connected gdb-multiarch to QEMU gdbstub. gdb-multiarch's architec
> I would start by using the QEMU gdbstub to connect a
> MIPS-aware gdb. Then when the SIGILL arrives you can see
> what instruction the guest program was trying to execute.
Just tried it and found something interesting.
I connected gdb-multiarch to QEMU gdbstub. gdb-multiarch's architecture was s
> I would start by using the QEMU gdbstub to connect a
> MIPS-aware gdb. Then when the SIGILL arrives you can see
> what instruction the guest program was trying to execute.
Just tried it and found something interesting.
I connected gdb-multiarch to QEMU gdbstub. gdb-multiarch's architecture was s
> I would start by using the QEMU gdbstub to connect a
> MIPS-aware gdb. Then when the SIGILL arrives you can see
> what instruction the guest program was trying to execute.
Just tried it and found something interesting.
I connected gdb-multiarch to QEMU gdbstub. gdb-multiarch's architecture was s
> Can you run QEMU with some debugging options:
> qemu-mipsel -d in_asm,exec,cpu,unimp,guest_errors,nochain -D debug.log
> -singlestep test
> and then put the resulting debug.log somewhere we can get it?
> (it'll probably be quite large)
The logging only shows this little information. It seems l
e/lte_dsp/zhoulibo/test\000"
$LASF3:
.ascii "main\000"
.ident "GCC: (GNU) 4.4.0"
One point to note, I did all this compilation process on a remote machine and
copied all these files to my own PC with QEMU. The path /export/... is a remote
path, but I don
Any help guys? Is there a way to look at the ELF binary code to see if the
instructions have invalid encoding scheme? Since I used a custom compiler that
claims to have MIPS-I instructions. I doubt it though because 'file' command
gives a reasonable output saying it surely is MIPS-I.
t signal 4 (Illegal instruction) - core dumped
[1] 11088 illegal hardware instruction (core dumped) ./qemu-mipsel test
However, when I use another cross compiler that generates MIPS32 rel2 binaries,
it worked fine.
Can anyone tell me what's going wrong?
Cheers,
Libo Zhou
Thanks for your insightful input. I will come back to this thread after I tried
all the options.
Cheers,
Libo Zhou
-- Original --
From: "Peter Maydell";;
Send time: Saturday, Sep 21, 2019 0:08 AM
To: "Libo Zhou";
Cc: "qemu-devel&qu
space emulation, right?
-- Original --
From: "Peter Maydell";;
Send time: Friday, Sep 20, 2019 10:55 PM
To: "Libo Zhou";
Cc: "qemu-devel";
Subject: Re: Initialize data memory in user space emulation
On Fri, 20 Sep 2019 at 15:49,
on, what I need to additionally do is to
initialize the "data memory" first, then run an ELF that manipulates the data
in the "data memory", and finally see if the resulting data are correct or not.
Do you have any suggestions?
Cheers,
Libo Zhou
-- Original --
with data?
Thanks,
Libo Zhou
memory with data?
Thanks,
Libo Zhou
f below, but let's see if my mail can go to the
list this time. Sorry for the inconvenience.
Cheers,
Libo Zhou
P.S. The dynamic xml generation option is too difficult for me for now. I will
save it as an alternative in the future.
Alex Bennée writes:
> The gdbstub should allow you do full introspection and adding
> additional registers is fairly easy, see mips_cpu_gdb_read_register function
> in target/mips/gdbstub.c.
Hi Alex and Aleksandar,
Now I can connect gdb to qemu successfully. And I can use this command to s
ginal --
From: "Aleksandar Markovic";;
Send time: Wednesday, Sep 11, 2019 1:50 AM
To: "Libo Zhou";
Cc: "Alex Bennée"; "qemu-devel";
Subject: Re: [Qemu-devel] QEMU as ISS (Instruction Set Simulator)
10.09.2019. 19.26, aleksandar.m.m...@gmail.com ?е написао
2019 6:54 PM
To: "Libo Zhou";
Cc: "qemu-devel";
Subject: Re: [Qemu-devel] QEMU as ISS (Instruction Set Simulator)
04.09.2019. 05.23, "Libo Zhou" ?е написао/ла:
>
> Hi Aleksandar,
>
> I have spent some time looking at your MXU ASE patch. It's
our help!
Cheers,
Libo
-- Original --
From: "Aleksandar Markovic";;
Send time: Tuesday, Sep 3, 2019 3:07 PM
To: "Libo Zhou";
Cc: "qemu-devel";
Subject: Re: [Qemu-devel] QEMU as ISS (Instruction Set Simulator)
30.08.2019. 11.14
10255 segmentation fault (core dumped) ./qemu-mips -strace test
-- Original --
From: "Libo Zhou";;
Send time: Monday, Sep 2, 2019 12:16 PM
To: "qemu-devel";
Subject: Uncaught target signal 11 (Segmentation Faullt)
I am trying to run
I am trying to run a simple MIPS program with QEMU user mode.
Host: Ubuntu 18.04 LTS on x86_64
QEMU config: ../configure --target-list=mips-linux-user
Cross Compiler: sudo apt install gcc-mips-linux-gnu
My test.c is simple: int main(void) {int a = 1; int b =2; int c; c = a + b;
return 0;}
Af
o call it in this process. Should I use gdb?
I am really sorry for asking you so many questions, but I think after getting
them figured out, I can start my project. Thank you very much in advance, and
have a good weekend!
Cheers,
Libo
-- Original ------
From:
k now I *might* know how to write a
working helper function, but I just don't know how it works.
Cheers,
Libo
-- Original message --
From: "Aleksandar Markovic";
Sendtime: Thursday, Aug 22, 2019 6:53 PM
To: "Libo Zhou";
Cc: &qu
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