[PATCH] multiboot: Use DMA instead port-based transfer

ähnel Signed-off-by: Adam Lackorzynski --- pc-bios/multiboot.bin | Bin 1024 -> 1536 bytes pc-bios/optionrom/multiboot.S | 10 ++--- pc-bios/optionrom/optionrom.h | 77 ++ 3 files changed, 82 insertions(+), 5 deletions(-) diff --git a/pc-bios/multiboot.

Re: arm: Launching EFI-enabled arm32 Linux

Hi Andre, On Wed Sep 08, 2021 at 00:47:10 +0100, Andre Przywara wrote: > On Wed, 8 Sep 2021 01:25:04 +0200 > Adam Lackorzynski wrote: > > Hi Adam, > > > On Mon Sep 06, 2021 at 16:34:03 +0100, Andre Przywara wrote: > > > On Sat, 4 Sep 2021 21:26:45 +0200

Re: arm: Launching EFI-enabled arm32 Linux

Hi Andre, On Mon Sep 06, 2021 at 16:34:03 +0100, Andre Przywara wrote: > On Sat, 4 Sep 2021 21:26:45 +0200 > Adam Lackorzynski wrote: > > Hi Adam, > > > while trying to launch an EFI-enabled arm32 Linux binary (zImage) I > > noticed I get an undefined instruc

arm: Launching EFI-enabled arm32 Linux

Hi, while trying to launch an EFI-enabled arm32 Linux binary (zImage) I noticed I get an undefined instruction exception on the first instruction. Now this is a bit special because Linux uses a nop instruction there that also is a PE file signature ('MZ') such that the CPU runs over it and the fil

Re: Arm: VFP regression

Hi, On Sun Mar 21, 2021 at 12:56:12 +, Peter Maydell wrote: > On Sat, 20 Mar 2021 at 22:38, Adam Lackorzynski wrote: > > > > Hi, > > > > I'm seeing a regression in Arm's vfp handling, giving an undefined > > instruction when reading mvfr1 in PL2

Arm: VFP regression

Hi, I'm seeing a regression in Arm's vfp handling, giving an undefined instruction when reading mvfr1 in PL2/armv7 although the FPU is enabled. The following makes it work again for me, however this just looks like a band-aid. Thanks for taking a look. Adam diff --git a/target/arm/translate-vfp.

Re: [PATCH] target/arm: Init GIC CPU IF regs for A15/A7

On Mon Jun 01, 2020 at 13:36:13 +0100, Peter Maydell wrote: > On Sat, 30 May 2020 at 00:07, Adam Lackorzynski wrote: > > > > Initialize the CPU interface registers also > > for Cortex-A15 and Cortex-A7 CPU models, in > > the same way as done for 64bit CPU models. &g

[PATCH] target/arm: Init GIC CPU IF regs for A15/A7

Initialize the CPU interface registers also for Cortex-A15 and Cortex-A7 CPU models, in the same way as done for 64bit CPU models. This fixes usage of GICv3 in virtualization contexts in 32bit configurations. Signed-off-by: Adam Lackorzynski --- target/arm/cpu.c | 6 ++ 1 file changed, 6

[Qemu-devel] [PATCH] arm: Fix return code of arm_load_elf

Use an int64_t as a return type to restore the negative check for arm_load_as. Signed-off-by: Adam Lackorzynski --- hw/arm/boot.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index e09201cc97..ca9467e583 100644 --- a/hw/arm/boot.c

Re: [Qemu-devel] [PATCH] Remove restriction that prevents bootimg elf64 images

Hi, On Tue Jun 13, 2017 at 17:05:41 -0700, Anatol Pomozov wrote: > Do these arguments sound reasonable to apply the patch? I'm not really convinced. > On Thu, Jun 8, 2017 at 2:07 PM, Anatol Pomozov > wrote: > > +reply-all > > > > On Thu, Jun 8, 2017 at 1:41

Re: [Qemu-devel] [PATCH] Remove restriction that prevents bootimg elf64 images

On Tue Jun 06, 2017 at 21:41:48 -0700, Anatol Pomozov wrote: > It is possible to create a 64 bit elf image that has valid multiboot header. > qemu should be able to boot such images. But this 64bit image actually starts with 32bit code, right? So it's a 32bit program and the check verifies that t

Re: [Qemu-devel] [PATCH] Add bootloader name to multiboot implementation

+ MBI_MODS_COUNT, mbs.mb_mods_count); /* mods_count */ > > @@ -314,7 +335,8 @@ int load_multiboot(FWCfgState *fw_cfg, > | MULTIBOOT_FLAGS_BOOT_DEVICE > | MULTIBOOT_FLAGS_CMDLINE > | MULTIBOOT_FLAGS_MOD

Re: [Qemu-devel] [PATCH v4 0/4] Improve handling of GICD_ICFGR

On Mon Aug 18, 2014 at 16:30:51 +0200, Adam Lackorzynski wrote: > The following patches address the behavior of the GICD_ICFGR register > in the ARM GIC. Any takers or comments? > Changes to v3: > - Tag patchset with proper version > > Changes to v2: > - Replace 16 with

[Qemu-devel] [PATCH v4 0/4] Improve handling of GICD_ICFGR

model mode only for old GIC revisions - Less invasive change for PPI settings Adam Lackorzynski (4): arm_gic: Fix read of GICD_ICFGR arm_gic: GICD_ICFGR: Write model only for pre v1 GICs

[Qemu-devel] [PATCH v4 3/4] arm_gic: Do not force PPIs to edge-triggered mode

Only SGIs must be WI, done by forcing them to their default (edge-triggered). Acked-by: Christoffer Dall Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index e546647..55019c9

[Qemu-devel] [PATCH v4 4/4] arm_gic: Use GIC_NR_SGIS constant

Use constant rather than a plain number. Acked-by: Christoffer Dall Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index 6d884ec..18b01ba 100644 --- a/hw/intc

[Qemu-devel] [PATCH v4 1/4] arm_gic: Fix read of GICD_ICFGR

The GICD_ICFGR register covers 4 interrupts per byte. Acked-by: Christoffer Dall Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 1532ef9..d2b1aaf 100644 --- a/hw/intc

[Qemu-devel] [PATCH v4 2/4] arm_gic: GICD_ICFGR: Write model only for pre v1 GICs

Setting the model is only available in pre-v1 GIC models. Acked-by: Christoffer Dall Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index d2b1aaf..e546647 100644 --- a

[Qemu-devel] [PATCH 0/4] arm_gic: Improve handling of GICD_ICFGR

revisions - Less invasive change for PPI settings Adam Lackorzynski (4): arm_gic: Fix read of GICD_ICFGR arm_gic: GICD_ICFGR: Write model only for pre v1 GICs arm_gic: Do not force PPIs to

[Qemu-devel] [PATCH 4/4] arm_gic: Use GIC_NR_SGIS constant

Use constant rather than a plain number. Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index 6d884ec..18b01ba 100644 --- a/hw/intc/arm_gic_common.c +++ b/hw

[Qemu-devel] [PATCH 2/4] arm_gic: GICD_ICFGR: Write model only for pre v1 GICs

Setting the model is only available in pre-v1 GIC models. Acked-by: Christoffer Dall Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index d2b1aaf..e546647 100644 --- a

[Qemu-devel] [PATCH 3/4] arm_gic: Do not force PPIs to edge-triggered mode

Only SGIs must be WI, done by forcing them to their default (edge-triggered). Acked-by: Christoffer Dall Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index e546647..55019c9

[Qemu-devel] [PATCH 1/4] arm_gic: Fix read of GICD_ICFGR

The GICD_ICFGR register covers 4 interrupts per byte. Acked-by: Christoffer Dall Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 1532ef9..d2b1aaf 100644 --- a/hw/intc

Re: [Qemu-devel] [PATCH 3/3] arm_gic: Do not force PPIs to edge-triggered mode

On Mon Aug 18, 2014 at 14:48:15 +0200, Christoffer Dall wrote: > On Sat, Aug 16, 2014 at 09:48:21PM +0200, Adam Lackorzynski wrote: > > Only SGIs must be WI, done by forcing them to their default > > (edge-triggered). > > > > Signed-off-by: Adam Lackorzynski > &g

Re: [Qemu-devel] [PATCH 2/3] arm_gic: SGIs for GICD_ICFGR are WI

On Fri Aug 15, 2014 at 14:12:17 +0200, Christoffer Dall wrote: > On Sun, Aug 03, 2014 at 10:53:46AM +0200, Adam Lackorzynski wrote: > > Writes to SGIs for GICD_ICFGR register must be ignored. > > > > Signed-off-by: Adam Lackorzynski > > --- > > hw/intc/arm_g

[Qemu-devel] [PATCH 0/3] arm_gic: Improve handling of GICD_ICFGR

Adam Lackorzynski (3): arm_gic: Fix read of GICD_ICFGR arm_gic: GICD_ICFGR: Write model only for pre v1 GICs arm_gic: Do not force PPIs to edge-triggered mode hw/intc/arm_gic.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) -- 2.1.0.rc1

[Qemu-devel] [PATCH 3/3] arm_gic: Do not force PPIs to edge-triggered mode

Only SGIs must be WI, done by forcing them to their default (edge-triggered). Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index e546647..55019c9 100644 --- a/hw/intc/arm_gic.c

[Qemu-devel] [PATCH 2/3] arm_gic: GICD_ICFGR: Write model only for pre v1 GICs

Setting the model is only available in pre-v1 GIC models. --- hw/intc/arm_gic.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index d2b1aaf..e546647 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -561,10 +561,12 @@ s

[Qemu-devel] [PATCH 1/3] arm_gic: Fix read of GICD_ICFGR

The GICD_ICFGR register covers 4 interrupts per byte. Acked-by: Christoffer Dall Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 1532ef9..d2b1aaf 100644 --- a/hw/intc

Re: [Qemu-devel] [PATCH 2/3] arm_gic: SGIs for GICD_ICFGR are WI

On Fri Aug 15, 2014 at 14:07:14 +0200, Christoffer Dall wrote: > On Sun, Aug 03, 2014 at 10:53:46AM +0200, Adam Lackorzynski wrote: > > Writes to SGIs for GICD_ICFGR register must be ignored. > > > > Signed-off-by: Adam Lackorzynski > > --- > > hw/intc/arm_g

Re: [Qemu-devel] [PATCH 0/3] arm_gic: Improve handling of GICD_ICFGR

Hi, On Sun Aug 03, 2014 at 21:36:21 +0200, Christoffer Dall wrote: > On 3 August 2014 15:21, Peter Maydell wrote: > > On 3 August 2014 09:53, Adam Lackorzynski wrote: > >> Hi, > >> > >> the following three patches address the behavior of the GIC

[Qemu-devel] [PATCH 0/3] arm_gic: Improve handling of GICD_ICFGR

Hi, the following three patches address the behavior of the GICD_ICFGR register in the ARM GIC. Adam Lackorzynski (3): arm_gic: Fix read of GICD_ICFGR arm_gic: SGIs for GICD_ICFGR are WI arm_gic: GICD_ICFGR: Do not force edge-triggered PPIs hw/intc/arm_gic.c | 15 --- 1 file

[Qemu-devel] [PATCH 3/3] arm_gic: GICD_ICFGR: Do not force edge-triggered PPIs

supported. Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index cd6e6ea..066a7f2 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -558,8 +558,6 @@ static void gic_dist_writeb(void *opaque

[Qemu-devel] [PATCH 2/3] arm_gic: SGIs for GICD_ICFGR are WI

Writes to SGIs for GICD_ICFGR register must be ignored. Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index d2b1aaf..cd6e6ea 100644 --- a/hw/intc/arm_gic.c +++ b/hw

[Qemu-devel] [PATCH 1/3] arm_gic: Fix read of GICD_ICFGR

The GICD_ICFGR register covers 4 interrupts per byte. Signed-off-by: Adam Lackorzynski --- hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 1532ef9..d2b1aaf 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c

Re: [Qemu-devel] [PATCH] hw/pc.c: Fix converting of ioport_register* to MemoryRegion

> The previous behaviour of this both ioport is to return 0x. > So keep this behaviour. Thanks, confirmed. > Reported-by: Adam Lackorzynski > Signed-off-by: Julien Grall Tested-by: Adam Lackorzynski > --- > hw/pc.c | 12 > 1 file changed, 12 inser

[Qemu-devel] Qemu x86 segfault

Hi, I'm seeing the following segfault of qemu-system-i386 and qemu-system-x86_64 with master. git bisect points to 258711c6448c44b60b0fecef1d3b09c71e23e304. Program received signal SIGSEGV, Segmentation fault. [Switching to Thread 0xea930b70 (LWP 14297)] 0x in ?? () (gdb) bt #0 0x000

[Qemu-devel] qemu-system-arm segfault

Hi, I'm getting a segfault for qemu-system-arm (git). Git bisect points to 33e95c6328a3149a52615176617997c4f8f7088b. Host is x86-32, I'm not getting it in a 64bit environment. However, valgrind is showing a similar output for arm_gic_class_init and arm_gic_init. $ arm-softmmu/qemu-system-arm -M r

[Qemu-devel] smp-parse: smp-opt-cores for simple -smp X

following. Comments? Signed-off-by: Adam Lackorzynski --- vl.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/vl.c b/vl.c index fcd7395..1459bde 100644 --- a/vl.c +++ b/vl.c @@ -886,6 +886,8 @@ static void smp_parse(const char *optarg) max_cpus = strto

[Qemu-devel] [PATCH] multiboot: Support commas in module parameters

Support commas in the parameter list of multiboot modules as well as for the kernel command line, by using double commas (via get_opt_value()). Signed-off-by: Adam Lackorzynski Reviewed-by: Kevin Wolf --- hw/multiboot.c | 18 +- 1 files changed, 9 insertions(+), 9 deletions

[Qemu-devel] [PATCH] multiboot: Support commas in module parameters

Support commas in the parameter list of multiboot modules, by using double commas (via get_opt_value()). Signed-off-by: Adam Lackorzynski --- hw/multiboot.c | 18 +- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/multiboot.c b/hw/multiboot.c index 6e6cfb9

[Qemu-devel] [PATCH] multiboot: Support commas in module parameters

Support commas in the parameter list of multiboot modules, by using double commas (via get_opt_value()). Signed-off-by: Adam Lackorzynski --- hw/multiboot.c | 18 +- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/multiboot.c b/hw/multiboot.c index 394ed01

[Qemu-devel] [PATCH] multiboot: Support commas in module parameters

Support commas in the parameter list of multiboot modules, by using double commas (via get_opt_value()). Signed-off-by: Adam Lackorzynski --- hw/multiboot.c | 18 +- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/multiboot.c b/hw/multiboot.c index 394ed01

[Qemu-devel] [PATCH] multiboot: Support commas in module parameters

Support commas in the parameter list of modules, by using double commas (via get_opt_value()). Signed-off-by: Adam Lackorzynski --- hw/multiboot.c | 18 +- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/multiboot.c b/hw/multiboot.c index 394ed01..7d5cb22

Re: [Qemu-devel] [PATCH] multiboot: Support quotable commas in module list

On Fri Apr 15, 2011 at 15:17:28 +0200, Kevin Wolf wrote: > Am 15.04.2011 09:56, schrieb Adam Lackorzynski: > > Support quoting of ',' (and '\') to allow commas in the parameter list of > > modules. > > > > Signed-off-by: Adam Lackorzynski &

[Qemu-devel] [PATCH] multiboot: Support quotable commas in module list

Support quoting of ',' (and '\') to allow commas in the parameter list of modules. Signed-off-by: Adam Lackorzynski --- hw/multiboot.c | 33 + 1 files changed, 29 insertions(+), 4 deletions(-) diff --git a/hw/multiboot.c b/hw/multiboot.c in

Re: [Qemu-devel] [PATCH] multiboot: Quote filename in error message.

On Fri Apr 08, 2011 at 00:44:36 +0200, Alexander Graf wrote: > > On 07.04.2011, at 20:22, Adam Lackorzynski wrote: > > > Quote filename in error message to spot possible whitespace character in > > the filename. > > > > Signed-off-by: Adam Lackorzynski

[Qemu-devel] [PATCH] multiboot: Quote filename in error message.

Quote filename in error message to spot possible whitespace character in the filename and make error message more meaningful. Signed-off-by: Adam Lackorzynski --- hw/multiboot.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/multiboot.c b/hw/multiboot.c index

[Qemu-devel] [PATCH] multiboot: Quote filename in error message.

Quote filename in error message to spot possible whitespace character in the filename. Signed-off-by: Adam Lackorzynski --- hw/multiboot.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/multiboot.c b/hw/multiboot.c index 0d2bfb4..6be6fa0 100644 --- a/hw/multiboot.c

Re: [Qemu-devel] [PATCH] hw: improve multiboot module loading

On Thu Apr 07, 2011 at 14:52:34 +0100, Stefan Hajnoczi wrote: > On Thu, Apr 7, 2011 at 1:56 PM, Ralf Ramsauer > wrote: > > On 07.04.2011, at 14:48, Stefan Hajnoczi wrote: > > > >> Out of curiousity, why are you trying to kill spaces at all? > >> > >> Why not just use a correct command-line to inv

[Qemu-devel] [PATCH] target-i386: Do not announce extended mwait features

CPUID claims that extended monitor/mwait features are available but the mwait helper instantly raises a GPF if they are used. Thus do not announce that the extension are available. Signed-off-by: Adam Lackorzynski --- target-i386/cpuid.c |2 +- 1 files changed, 1 insertions(+), 1 deletions

[Qemu-devel] [PATCH 1/4] target-arm: Fix soft interrupt in GIC distributor

Fix selection of target list filter mode. Signed-off-by: Adam Lackorzynski Reviewed-by: Peter Maydell --- hw/arm_gic.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index e6b1953..0e934ec 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c

[Qemu-devel] [PATCH 4/4] target-arm: Integrate secondary CPU reset in arm_boot

Integrate secondary CPU reset into arm_boot, removing it from realview.c. On non-Linux systems secondary CPUs start with the same entry as the boot CPU. Signed-off-by: Adam Lackorzynski --- hw/arm_boot.c | 23 +++ hw/realview.c | 14 -- 2 files changed, 15

[Qemu-devel] [PATCH 3/4] target-arm: Implement cp15 VA->PA translation

Implement VA->PA translations by cp15-c7 that went through unchanged previously. Signed-off-by: Adam Lackorzynski --- target-arm/cpu.h |3 ++- target-arm/helper.c | 48 ++-- target-arm/machine.c |2 ++ 3 files changed, 50 inserti

[Qemu-devel] [PATCH 0/4] ARM additions and fixes

The following patches fix and enhance ARM related functionality. Adam Lackorzynski (3): target-arm: Fix soft interrupt in GIC distributor target-arm: Implement cp15 VA->PA translation target-arm: Integrate secondary CPU reset in arm_boot Peter Maydell (1): target-arm: Don't de

[Qemu-devel] [PATCH 2/4] target-arm: Don't decode old cp15 WFI instructions on v7 cores

correctly for newer cores. In particular, the old 0,c7,c8,2 encoding used on ARM940 has been reused for VA-to-PA translation in v6 and v7. Signed-off-by: Peter Maydell Reviewed-by: Adam Lackorzynski --- target-arm/translate.c | 35 ++- 1 files changed, 30 insertions

Re: [Qemu-devel] [PATCH 2/3] target-arm: Implement cp15 VA->PA translation

On Thu Mar 03, 2011 at 22:59:03 +, Peter Maydell wrote: > On 21 February 2011 23:19, Adam Lackorzynski > wrote: > > diff --git a/target-arm/machine.c b/target-arm/machine.c > > index 3925d3a..a18b7dc 100644 > > --- a/target-arm/machine.c > > +++ b/target-ar

[Qemu-devel] Re: [PATCH] target-arm: Don't decode old cp15 WFI instructions on v7 cores

oding of the cp15 WFI instructions so that they behave correctly > for newer cores. In particular, the old 0,c7,c8,2 encoding used on > ARM940 has been reused for VA-to-PA translation in v6 and v7. > > Signed-off-by: Peter Maydell Reviewed-by: Adam Lackorzynski > --- > This

[Qemu-devel] [PATCH 1/3] target-arm: Fix soft interrupt in GIC distributor

Fix selection of target list filter mode. Signed-off-by: Adam Lackorzynski Reviewed-by: Peter Maydell --- hw/arm_gic.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index e6b1953..0e934ec 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c

[Qemu-devel] [PATCH 0/3] ARM additions and fixes

The following patches fix and enhance ARM related functionality. Adam Lackorzynski (3): target-arm: Fix soft interrupt in GIC distributor target-arm: Implement cp15 VA->PA translation target-arm: Integrate secondary CPU reset in arm_boot hw/arm_boot.c|

[Qemu-devel] [PATCH 2/3] target-arm: Implement cp15 VA->PA translation

Implement VA->PA translations by cp15-c7 that went through unchanged previously. Signed-off-by: Adam Lackorzynski --- target-arm/cpu.h |1 + target-arm/helper.c | 48 ++-- target-arm/machine.c |2 ++ 3 files changed, 49 insertions(+)

[Qemu-devel] [PATCH 3/3] target-arm: Integrate secondary CPU reset in arm_boot

Integrate secondary CPU reset into arm_boot, removing it from realview.c. On non-Linux systems secondary CPUs start with the same entry as the boot CPU. Signed-off-by: Adam Lackorzynski --- hw/arm_boot.c | 23 +++ hw/realview.c | 14 -- 2 files changed, 15

Re: [Qemu-devel] [PATCH 3/3] target-arm: Implement cp15 VA->PA translation

Hi, thanks for the review! On Wed Feb 16, 2011 at 15:57:59 +, Peter Maydell wrote: > On 15 February 2011 10:49, Adam Lackorzynski > wrote: > > Implement VA->PA translations by cp15-c7 that went through unchanged > > previously. > > > +        uint32_t

Re: [Qemu-devel] [PATCH 1/3] target-arm: Setup smpboot code in all setups

Hi, On Tue Feb 15, 2011 at 10:02:05 -0500, Vincent Palatin wrote: > >> Moving in the right direction, but it would be cleaner if the secondary > >> CPU reset was handled inside arm_boot.c, I think (there is a TODO > >> in that file to that effect). Then we could get rid of the cpu reset > >> hook

Re: [Qemu-devel] [PATCH 1/3] target-arm: Setup smpboot code in all setups

On Tue Feb 15, 2011 at 13:37:44 +, Peter Maydell wrote: > On 15 February 2011 13:12, Adam Lackorzynski > wrote: > > > > On Tue Feb 15, 2011 at 13:01:08 +, Peter Maydell wrote: > >> On 15 February 2011 10:48, Adam Lackorzynski > >> wrote: > &

Re: [Qemu-devel] [PATCH 1/3] target-arm: Setup smpboot code in all setups

On Tue Feb 15, 2011 at 13:01:08 +, Peter Maydell wrote: > On 15 February 2011 10:48, Adam Lackorzynski > wrote: > > Make smpboot available not only for Linux but for all setups. > > I'm not convinced about this. I think if you're providing a raw > image f

[Qemu-devel] [PATCH 3/3] target-arm: Implement cp15 VA->PA translation

Implement VA->PA translations by cp15-c7 that went through unchanged previously. Signed-off-by: Adam Lackorzynski --- target-arm/cpu.h|1 + target-arm/helper.c | 51 +-- 2 files changed, 50 insertions(+), 2 deletions(-) diff --gi

[Qemu-devel] [PATCH 2/3] target-arm: Fix soft interrupt in GIC distributor

Fix selection of target list filter mode. Signed-off-by: Adam Lackorzynski --- hw/arm_gic.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index e6b1953..0e934ec 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -549,10 +549,10 @@ static

[Qemu-devel] [PATCH 1/3] target-arm: Setup smpboot code in all setups

Make smpboot available not only for Linux but for all setups. Signed-off-by: Adam Lackorzynski --- hw/arm_boot.c | 17 + 1 files changed, 9 insertions(+), 8 deletions(-) diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 620550b..a68b396 100644 --- a/hw/arm_boot.c +++ b/hw

[Qemu-devel] [PATCH] multiboot: Prevent loading of x86_64 images

A via -kernel supplied x86_64 ELF image is being started in 32bit mode. Detect and exit if a 64bit image has been supplied. Signed-off-by: Adam Lackorzynski Acked-by: Alexander Graf --- hw/multiboot.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/hw/multiboot.c

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

Refine check on bkpt so that smc and undefined instruction encodings are handled as an undefined instruction and trap. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |9 - 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target

[Qemu-devel] [PATCH] multiboot: Prevent loading of x86_64 images

A via -kernel supplied x86_64 ELF image is being started in 32bit mode. Detect and exit if a 64bit image has been supplied. Signed-off-by: Adam Lackorzynski Acked-by: Alexander Graf --- hw/multiboot.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/hw/multiboot.c

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

Refine check on bkpt so that smc and undefined instruction encodings are handled as an undefined instruction and trap. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |9 - 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target

Re: [Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

On Thu Sep 02, 2010 at 23:14:23 +0100, Peter Maydell wrote: > On Thu, Sep 02, 2010 at 11:40:50PM +0200, Adam Lackorzynski wrote: > > +case 7: > > +/* SMC? */ > > +if ((insn & 0xfff0) == 0xe1600070) { > > +

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

Handle smc as an undefined instruction instead of having it wrongly interpreted as some other one. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |7 ++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index

[Qemu-devel] [PATCH] multiboot: Prevent loading of x86_64 images

A via -kernel supplied x86_64 ELF image is being started in 32bit mode. Detect and exit if a 64bit image has been supplied. Signed-off-by: Adam Lackorzynski Acked-by: Alexander Graf --- hw/multiboot.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/hw/multiboot.c

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

Handle smc as an undefined instruction instead of having it wrongly interpreted as some other one. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index

Re: [Qemu-devel] [PATCH] multiboot: Prevent loading of x86_64 images

On Thu Aug 19, 2010 at 14:34:10 +0200, Alexander Graf wrote: > > On 19.08.2010, at 14:32, Adam Lackorzynski wrote: > > > > > On Thu Aug 19, 2010 at 13:40:54 +0200, Alexander Graf wrote: > >> > >> On 19.08.2010, at 13:36, Adam Lackorzynski wrote: > >

Re: [Qemu-devel] [PATCH] multiboot: Prevent loading of x86_64 images

On Thu Aug 19, 2010 at 13:40:54 +0200, Alexander Graf wrote: > > On 19.08.2010, at 13:36, Adam Lackorzynski wrote: > > > > > On Thu Aug 19, 2010 at 13:27:32 +0200, Alexander Graf wrote: > >> > >> On 19.08.2010, at 13:24, Adam Lackorzynski wrote: > &

Re: [Qemu-devel] [PATCH] multiboot: Prevent loading of x86_64 images

On Thu Aug 19, 2010 at 13:27:32 +0200, Alexander Graf wrote: > > On 19.08.2010, at 13:24, Adam Lackorzynski wrote: > > > A via -kernel supplied x86_64 ELF image is being started in 32bit mode. > > Detect and exit if a 64bit image has been supplied. > > According to

[Qemu-devel] [PATCH] multiboot: Prevent loading of x86_64 images

A via -kernel supplied x86_64 ELF image is being started in 32bit mode. Detect and exit if a 64bit image has been supplied. Signed-off-by: Adam Lackorzynski --- hw/multiboot.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/hw/multiboot.c b/hw/multiboot.c index

[Qemu-devel] [PATCH] target-i386: svm: Fix MSRPM check

Correct the calculation of the offset in the msrpm for the MSR range 0 - 0x1fff. Signed-off-by: Adam Lackorzynski --- target-i386/op_helper.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c index c50e818..ec6b3e9

[Qemu-devel] [PATCH] Resend-3: target-arm: Handle 'smc' as an undefined instruction

Handle smc as an undefined instruction instead of having it wrongly interpreted as some other one. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index

[Qemu-devel] [PATCH] Resend: target-arm: Handle 'smc' as an undefined instruction

Handle smc as an undefined instruction instead of having it wrongly interpreted as some other one. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

Handle smc as undefined instruction instead of having it wrongly interpreted as some other instruction. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 0eccca5..afd6716 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -6344,7 +6344,11

[Qemu-devel] [PATCH] target-i386: Fix variable in (disabled) debugging code

Signed-off-by: Adam Lackorzynski --- target-i386/op_helper.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c index 22259df..dcbdfe7 100644 --- a/target-i386/op_helper.c +++ b/target-i386/op_helper.c @@ -1231,7 +1231,7

[Qemu-devel] [PATCH] Debugcon: Fix debugging printf

Signed-off-by: Adam Lackorzynski --- hw/debugcon.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/debugcon.c b/hw/debugcon.c index d549091..5ee6821 100644 --- a/hw/debugcon.c +++ b/hw/debugcon.c @@ -60,7 +60,7 @@ static uint32_t debugcon_ioport_read(void *opaque

[Qemu-devel] [PATCH] arm: make RFE usable with any register

The rfe instruction can be used with any register, not just sp. Adjust the condition check accordingly. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index

[Qemu-devel] [PATCH] arm: Fix missing 'return' in SRS handling.

There's a return missing in the srs handling which leads to srs always being treated an an invalid op. Signed-off-by: Adam Lackorzynski --- target-arm/translate.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c

[Qemu-devel] [PATCH 2/2] multiboot: Separate multiboot loading into separate file

Move multiboot loading code into separate files as suggested by Alex Graf. Signed-off-by: Adam Lackorzynski --- Makefile.target |2 +- hw/multiboot.c | 331 +++ hw/multiboot.h | 12 ++ hw/pc.c | 305

[Qemu-devel] [PATCH 1/2] multiboot: Support arbitrary number of modules.

Signed-off-by: Adam Lackorzynski --- hw/pc.c | 268 +++ 1 files changed, 167 insertions(+), 101 deletions(-) diff --git a/hw/pc.c b/hw/pc.c index 83f8dd0..2dca777 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -51,6 +51,12 @@ /* Show

[Qemu-devel] [PATCH 2/2] multiboot: Separate multiboot loading into separate file

multiboot: Separate multiboot loading into separate file Move multiboot loading code into a separate file as suggested by Alex Graf. Signed-off-by: Adam Lackorzynski --- Makefile.target |2 +- hw/multiboot.c | 326 +++ hw/multiboot.h

[Qemu-devel] [PATCH 1/2] multiboot: Support arbitrary number of modules.

multiboot: Support arbitrary number of modules. Signed-off-by: Adam Lackorzynski --- hw/pc.c | 268 +++ 1 files changed, 167 insertions(+), 101 deletions(-) diff --git a/hw/pc.c b/hw/pc.c index db7d58e..2f5b3a1 100644 --- a/hw/pc.c

[Qemu-devel] [PATCH 2/2] multiboot: Separate multiboot loading into separate file

Move multiboot loading code into a separate files as suggested by Alex Graf. Signed-off-by: Adam Lackorzynski --- Makefile.target |2 +- hw/multiboot.c | 326 +++ hw/multiboot.h | 12 ++ hw/pc.c | 300

[Qemu-devel] [PATCH 1/2] multiboot: Support arbitrary number of modules.

mode?). > > mb_buf_phys should not be a u32. It should be a target address type. The spec defines all values as u32 but since the offsets are relative to mb_buf_phys I've made them of type target_phys_addr_t too. Signed-off-by: Adam Lackorzynski --- hw/pc.c | 268 +++

[Qemu-devel] [PATCH 2/2] multiboot: Separate multiboot loading into separate file

multiboot: Separate multiboot loading into separate file Move multiboot loading functionality to a separate file as suggested by Alex Graf. Signed-off-by: Adam Lackorzynski --- Makefile.target |2 +- hw/multiboot.c | 318 +++ hw

[Qemu-devel] [PATCH 1/2] multiboot: Support arbitrary number of modules.

multiboot: Support arbitrary number of modules. Addressed comments by Anthony. Signed-off-by: Adam Lackorzynski --- hw/pc.c | 260 ++ 1 files changed, 159 insertions(+), 101 deletions(-) diff --git a/hw/pc.c b/hw/pc.c index 8c1b7ea

[Qemu-devel] [PATCH 2/2] multiboot: Support arbitrary number of modules

multiboot: Support arbitrary number of modules Signed-off-by: Adam Lackorzynski --- hw/pc.c | 216 +- 1 files changed, 143 insertions(+), 73 deletions(-) diff --git a/hw/pc.c b/hw/pc.c index 6bcfe1b..163bec1 100644 --- a/hw/pc.c

[Qemu-devel] [PATCH 1/2] multiboot: Fix module loading and setting of mmap.

multiboot: Fix module loading and setting of mmap. Signed-off-by: Adam Lackorzynski Acked-by: Alexander Graf --- hw/pc.c |2 +- pc-bios/multiboot.bin | Bin 512 -> 1024 bytes pc-bios/optionrom/multiboot.S |5 - 3 files changed, 5 insertions(+)

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