Re: [PATCH 10/16] rust: introduce alternative implementation of offset_of!

2024-10-17 Thread Paolo Bonzini
Il ven 18 ott 2024, 05:16 Junjie Mao ha scritto: > > Paolo Bonzini writes: > > > On Thu, Oct 17, 2024 at 7:35 AM Junjie Mao > wrote: > >> Paolo Bonzini writes: > >> > offset_of! was stabilized in Rust 1.77.0. Use an alternative > implemenation > >> > that was found on the Rust forums, and who

[PATCH v1 09/16] test/qtest/aspeed_smc-test: Introduce a new TestData to test different BMC SOCs

2024-10-17 Thread Jamin Lin via
Currently, these test cases are only used for testing fmc_cs0 for AST2400. To test others BMC SOCs, introduces a new TestData structure. Users can set the spi base address, flash base address, jedesc id and so on for different BMC SOCs and flash model testing. Introduce new helper functions to mak

Re: [PATCH v3 1/8] target/riscv: Add Ssdbltrp CSRs handling

2024-10-17 Thread LIU Zhiwei
On 2024/10/17 17:12, Clément Léger wrote: On 17/10/2024 10:35, Clément Léger wrote: On 16/10/2024 11:40, LIU Zhiwei wrote: On 2024/10/14 19:22, Clément Léger wrote: Add ext_ssdbltrp in RISCVCPUConfig and implement MSTATUS.SDT, {H|M}ENVCFG.DTE and modify the availability of MTVAL2 based on

Re: [PATCH v2 6/6] virtio-gpu: Support DRM native context

2024-10-17 Thread Akihiko Odaki
On 2024/10/15 13:32, Dmitry Osipenko wrote: Add support for DRM native contexts to VirtIO-GPU. DRM context is enabled using a new virtio-gpu-gl device option "drm=on". Unlike Virgl and Venus contexts that operate on application API level, DRM native contexts work on a kernel UAPI level. This low

[PATCH v1 16/16] test/qtest/ast2700-smc-test: Support to test AST2700

2024-10-17 Thread Jamin Lin via
Add test_ast2700_evb function and reused testcases which are from aspeed_smc-test.c for AST2700 testing. The base address, flash base address and ce index of fmc_cs0 are 0x1400, 0x1 and 0, respectively. The default flash model of fmc_cs0 is "w25q01jvq" whose size is 128MB, so set jedec_

[PATCH v1 10/16] test/qtest/aspeed_smc-test: Support to test all CE pins

2024-10-17 Thread Jamin Lin via
Currently, these test cases only support to test CE0. To test all CE pins, introduces new ce and node members in TestData structure. The ce member is used for saving the ce index and node member is used for saving the node path, respectively. Signed-off-by: Jamin Lin --- tests/qtest/aspeed_smc-t

[PATCH v1 02/16] hw/block:m25p80: Fix coding style

2024-10-17 Thread Jamin Lin via
Fix coding style issues from checkpatch.pl Signed-off-by: Jamin Lin --- hw/block/m25p80.c | 22 ++ 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index f7123f9e68..3f55b8f385 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m

[PATCH v1 08/16] test/qtest/aspeed_smc-test: Move testcases to test_palmetto_bmc function

2024-10-17 Thread Jamin Lin via
So far, the test cases are used for testing SMC model with AST2400 BMC. However, AST2400 is end off live and ASPEED is no longer support this SOC. To test SMC model for AST2500, AST2600 and AST1030, move the test cases from main to test_palmetto_bmc function. Signed-off-by: Jamin Lin --- tests/q

[PATCH v1 03/16] hw/block:m25p80: Support write status register 2 command (0x31) for w25q01jvq

2024-10-17 Thread Jamin Lin via
According to the w25q01jv datasheet at page 16, it is required to set QE bit in "Status Register 2" to enable quad mode. Currently, m25p80 support users utilize "Write Status Register 1(0x01)" command to set QE bit in "Status Register 2" and utilize "Read Status Register 2(0x35)" command to get th

[PATCH v1 01/16] aspeed/smc: Fix write incorrect data into flash in user mode

2024-10-17 Thread Jamin Lin via
According to the design of ASPEED SPI controllers user mode, users write the data to flash, the SPI drivers set the Control Register(0x10) bit 0 and 1 enter user mode. Then, SPI drivers send flash commands for writing data. Finally, SPI drivers set the Control Register (0x10) bit 2 to stop active c

[PATCH v1 11/16] test/qtest/aspeed_smc-test: Support to test all flash models

2024-10-17 Thread Jamin Lin via
Currently, these test cases used the hardcode offset 0x140 (0x14000 * 256) which was beyond the 16MB flash size for flash page read/write command testing. However, the default fmc flash model of ast1030-a1 EVB is "w25q80bl" whose size is 1MB. To test all flash models, introduces a new page_addr

[PATCH v1 05/16] hw/arm/aspeed: Correct spi_model w25q256 for ast1030-a1 EVB.

2024-10-17 Thread Jamin Lin via
Currently, the default spi_model was "sst25vf032b" whose size was 4MB for ast1030-a1 EVB. However, according to the schematic of ast1030-a1 EVB, ASPEED shipped default flash of spi1 and spi2 were w25q256 whose size was 32MB. Correct spi_model default flash to w25q256 for ast1030-a1 EVB. Signed-of

[PATCH v1 15/16] test/qtest/aspeed_smc-test: Support write page command with QPI mode

2024-10-17 Thread Jamin Lin via
Add a new testcase for write page command with QPI mode testing. Currently, only run this testcase for AST2500, AST2600 and AST1030. Signed-off-by: Jamin Lin --- tests/qtest/aspeed_smc-test.c | 74 +++ 1 file changed, 74 insertions(+) diff --git a/tests/qtest/asp

[PATCH v1 04/16] hw/block/m25p80: Add SFDP table for w25q80bl flash

2024-10-17 Thread Jamin Lin via
Add the SFDP table for the Windbond w25q80bl flash. Signed-off-by: Jamin Lin --- hw/block/m25p80.c | 3 ++- hw/block/m25p80_sfdp.c | 36 hw/block/m25p80_sfdp.h | 2 +- 3 files changed, 39 insertions(+), 2 deletions(-) diff --git a/hw/block/m25p80.c b/

[PATCH v1 12/16] test/qtest/aspeed_smc-test: Support to test AST2500

2024-10-17 Thread Jamin Lin via
Add test_ast2500_evb function and reused testcases for AST2500 testing. The spi base address, flash base address and ce index of fmc_cs0 are 0x1E62, 0x2000 and 0, respectively. The default flash model of fmc_cs0 is "mx25l25635e" whose size is 32MB, so set jedec_id 0xc22019. Signed-off-by:

[PATCH v1 13/16] test/qtest/aspeed_smc-test: Support to test AST2600

2024-10-17 Thread Jamin Lin via
Add test_ast2600_evb function and reused testcases for AST2600 testing. The spi base address, flash base address and ce index of fmc_cs0 are 0x1E62, 0x2000 and 0, respectively. The default flash model of fmc_cs0 is "mx66u51235f" whose size is 64MB, so set jedec_id 0xc2253a. Signed-off-by:

[PATCH v1 14/16] test/qtest/aspeed_smc-test: Support to test AST1030

2024-10-17 Thread Jamin Lin via
Add test_ast1030_evb function and reused testcases for AST1030 testing. The base address, flash base address and ce index of fmc_cs0 are 0x7E62, 0x8000 and 0, respectively. The default flash model of fmc_cs0 is "w25q80bl" whose size is 1MB, so set jedec_id 0xef4014. Signed-off-by: Jamin Li

[PATCH v1 07/16] test/qtest/aspeed_smc-test: Fix coding style

2024-10-17 Thread Jamin Lin via
Fix coding style issues from checkpatch.pl Signed-off-by: Jamin Lin --- tests/qtest/aspeed_smc-test.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qtest/aspeed_smc-test.c index c713a3700b..4673371d95 100644 --- a/tests/qtest/aspe

[PATCH v1 06/16] hw/arm/aspeed: Correct fmc_model w25q80bl for ast1030-a1 EVB

2024-10-17 Thread Jamin Lin via
Currently, the default fmc_model was "sst25vf032b" whose size was 4MB for ast1030-a1 EVB. However, according to the schematic of ast1030-a1 EVB, ASPEED shipped default flash of fmc_cs0 and fmc_cs1 were "w25q80bl" and "w25q256", respectively. The size of w25q80bl is 1MB and the size of w25q256 is 32

[PATCH v1 00/16] Fix write incorrect data into flash in user mode

2024-10-17 Thread Jamin Lin via
change from v1: 1. Fix write incorrect data into flash in user mode. 2. Refactor aspeed smc qtest testcases to support AST2600, AST2500 and AST1030. 3. Add ast2700 smc qtest testcase to support AST2700. QEMU version: https://github.com/qemu/qemu/commit/95a16ee753d6da651fce8df876333bf7fcf134d9

Re: [PATCH v2 5/6] virtio-gpu: Support asynchronous fencing

2024-10-17 Thread Akihiko Odaki
On 2024/10/15 13:32, Dmitry Osipenko wrote: Support asynchronous fencing feature of virglrenderer. It allows Qemu to handle fence as soon as it's signalled instead of periodically polling the fence status. This feature is required for enabling DRM context support in Qemu because legacy fencing mo

Re: [PATCH v2 2/6] ui/sdl2: Implement dpy dmabuf functions

2024-10-17 Thread Akihiko Odaki
On 2024/10/15 13:32, Dmitry Osipenko wrote: From: Pierre-Eric Pelloux-Prayer If EGL is used, we can rely on dmabuf to import textures without doing copies. To get this working on X11, we use the existing SDL hint: SDL_HINT_VIDEO_X11_FORCE_EGL (because dmabuf can't be used with GLX). Signed-of

Re: [PATCH] spapr: nested: Add support for DPDES SPR in GSB for TCG L0

2024-10-17 Thread Harsh Prateek Bora
Hi Amit, On 10/17/24 16:30, Amit Machhiwal wrote: The DPDES support for doorbell emulation and handling for KVM on PAPR guests was added in Linux via [1]. Subsequently, a new GSB element for DPDES was added in Linux; the same has been missing in QEMU L0. Add s/QEMU L0/ TCG L0 implementation?

Re: [PATCH V1 3/4] hw/acpi: Reflect ACPI vCPU {present,enabled} states in ACPI _STA.{PRES,ENA} Bits

2024-10-17 Thread Zhao Liu
Hi Salil, On Mon, Oct 14, 2024 at 08:22:04PM +0100, Salil Mehta wrote: > Date: Mon, 14 Oct 2024 20:22:04 +0100 > From: Salil Mehta > Subject: [PATCH V1 3/4] hw/acpi: Reflect ACPI vCPU {present,enabled} states > in ACPI _STA.{PRES,ENA} Bits > X-Mailer: git-send-email 2.34.1 > > Reflect the ACPI

Re: [PATCH] Fix calculation of minimum in colo_compare_tcp

2024-10-17 Thread Jason Wang
On Fri, Oct 18, 2024 at 10:48 AM Zhang, Chen wrote: > > Add Trivial patches Maintainers. > > > > Hi Jason/Michael/Laurent, > > Can you help to pick up this patch for upstream and stable? Queued. Btw, if you want -stable next time, please cc it. Thanks > > > > Thanks > > Chen > > > > From: Stef

Re: [PULL 08/20] virtio-net: Add only one queue pair when realizing

2024-10-17 Thread Jason Wang
On Thu, Oct 17, 2024 at 5:42 PM Akihiko Odaki wrote: > > On 2024/10/17 18:17, Laurent Vivier wrote: > > On 17/10/2024 11:07, Akihiko Odaki wrote: > >> On 2024/10/17 16:32, Laurent Vivier wrote: > >>> On 17/10/2024 08:59, Jason Wang wrote: > On Mon, Oct 14, 2024 at 11:16 PM Laurent Vivier > >

Re: [PATCH v2] intel_iommu: Introduce property "x-stale-tm" to control Transient Mapping (TM) field

2024-10-17 Thread Jason Wang
On Thu, Oct 17, 2024 at 3:58 PM Duan, Zhenzhong wrote: > > > > >-Original Message- > >From: Jason Wang > >Subject: Re: [PATCH v2] intel_iommu: Introduce property "x-stale-tm" to > >control > >Transient Mapping (TM) field > > > >On Thu, Oct 10, 2024 at 3:57 PM Zhenzhong Duan > >wrote: >

Re: [PATCH v16 04/13] s390x/pci: Avoid creating zpci for VFs

2024-10-17 Thread Akihiko Odaki
On 2024/10/14 17:43, Cédric Le Goater wrote: Hello Akihiko, On 10/12/24 13:05, Akihiko Odaki wrote: On 2024/10/11 0:44, Cédric Le Goater wrote: Hello Akihiko, Sorry for the late reply. On 9/18/24 17:32, Akihiko Odaki wrote: On 2024/09/18 17:02, Cédric Le Goater wrote: Hello, On 9/13/24 05

Re: [PATCH v3 1/7] hw/core: Make CPU topology enumeration arch-agnostic

2024-10-17 Thread Zhao Liu
Hi Marcin, On Thu, Oct 17, 2024 at 06:19:59PM +0200, Marcin Juszkiewicz wrote: > Date: Thu, 17 Oct 2024 18:19:59 +0200 > From: Marcin Juszkiewicz > Subject: Re: [PATCH v3 1/7] hw/core: Make CPU topology enumeration > arch-agnostic > > W dniu 12.10.2024 o 12:44, Zhao Liu pisze: > > Cache topolog

Re: [PATCH] hw/nvme: Remove references to PCI IRQ "pulsing" when asserting

2024-10-17 Thread Julia
Actually, it seems that trace_pci_nvme_irq_pin is emitted even if the IRQ is not asserted due to a setting of the interrupt masks. Which is weird because there's no corresponding one for deasserting. Possibly this should be reworded for 'interrupt is high (but might be masked?)', or just leave

Re: [PATCH v3 6/7] i386/pc: Support cache topology in -machine for PC machine

2024-10-17 Thread Zhao Liu
Hi Daniel, > > +``smp-cache.0.cache=cachename,smp-cache.0.topology=topologylevel`` > > +Define cache properties for SMP system. > > + > > +``cache=cachename`` specifies the cache that the properties will be > > +applied on. This field is the combination of cache level a

Re: [PATCH 10/16] rust: introduce alternative implementation of offset_of!

2024-10-17 Thread Junjie Mao
Paolo Bonzini writes: > On Thu, Oct 17, 2024 at 7:35 AM Junjie Mao wrote: >> Paolo Bonzini writes: >> > offset_of! was stabilized in Rust 1.77.0. Use an alternative implemenation >> > that was found on the Rust forums, and whose author agreed to license as >> > MIT for use in QEMU. >> > >> >

Re: [PATCH 12/16] rust: allow version 1.63.0 of rustc

2024-10-17 Thread Junjie Mao
Junjie Mao writes: > Paolo Bonzini writes: > >> Il mer 16 ott 2024, 08:10 Junjie Mao ha scritto: >> >> In my Ubuntu 22.04 environment (rustc 1.76.0 and bindgen 0.59.1 from >> apt) the feature `proc_macro_byte_character` is not yet stablized but >> used in proc-macro2. Downgrading proc-macr

RE: [PATCH] Fix calculation of minimum in colo_compare_tcp

2024-10-17 Thread Zhang, Chen
Add Trivial patches Maintainers. Hi Jason/Michael/Laurent, Can you help to pick up this patch for upstream and stable? Thanks Chen From: Stefan Weil Sent: Friday, October 18, 2024 3:44 AM To: Zhang, Chen ; Li Zhijian ; Jason Wang ; qemu-stable ; QEMU Trivial Cc: qemu-devel@nongnu.org Subject

Re: [PATCH 0/1] Insert LibSPDM in QEMU enabling in-tree compilation

2024-10-17 Thread Alistair Francis
On Thu, Oct 17, 2024 at 11:37 PM Ágatha Freitas wrote: > > > > On Thu, Oct 17, 2024 at 7:00 AM Daniel P. Berrangé > wrote: >> >> On Thu, Oct 17, 2024 at 02:00:35PM +1000, Alistair Francis wrote: >> > On Thu, Oct 17, 2024 at 2:35 AM htafr wrote: >> > > >> > > (I) Summary >> > > =

Re: [PATCH v2 3/8] target/riscv: Implement Ssdbltrp exception handling

2024-10-17 Thread Alistair Francis
On Thu, Oct 17, 2024 at 5:45 PM Clément Léger wrote: > > > > On 17/10/2024 06:29, Alistair Francis wrote: > > On Mon, Oct 14, 2024 at 5:43 PM Clément Léger wrote: > >> > >> > >> > >> On 11/10/2024 05:22, Alistair Francis wrote: > >>> On Wed, Sep 25, 2024 at 9:59 PM Clément Léger wrote: > >

Re: [PATCH v2 2/8] target/riscv: Implement Ssdbltrp sret, mret and mnret behavior

2024-10-17 Thread Alistair Francis
On Fri, Oct 18, 2024 at 4:27 AM Ved Shanbhogue wrote: > > Alistair Francis wrote: > >$ grep -r sstatus.SDT | grep SRET > >src/hypervisor.adoc:if the new privilege mode is VU, the `SRET` > >instruction sets `vsstatus.SDT` > > > >What am I missing here? > > https://github.com/riscv/riscv-isa-manual/

Re: [PATCH v3 1/7] hw/core: Make CPU topology enumeration arch-agnostic

2024-10-17 Thread Zhao Liu
Hi Daniel, > > -/* > > - * CPUTopoLevel is the general i386 topology hierarchical representation, > > - * ordered by increasing hierarchical relationship. > > - * Its enumeration value is not bound to the type value of Intel > > (CPUID[0x1F]) > > - * or AMD (CPUID[0x8026]). > > - */ > > -enum

Re: [PATCH v4 5/6] migration: Support periodic RAMBlock dirty bitmap sync

2024-10-17 Thread Yong Huang
On Fri, Oct 18, 2024 at 3:33 AM Peter Xu wrote: > On Thu, Oct 17, 2024 at 02:42:54PM +0800, yong.hu...@smartx.com wrote: > > +void cpu_throttle_dirty_sync_timer_tick(void *opaque) > > +{ > > +static uint64_t prev_sync_cnt; > > We may need to reset this in case migration got cancelled and invo

Re: [PATCH] hw/sd/omap_mmc: Don't use sd_cmd_type_t

2024-10-17 Thread Philippe Mathieu-Daudé
On 17/10/24 13:27, Peter Maydell wrote: In commit 1ab08790bb75e4 we did some refactoring of the SD card implementation, which included a rearrangement of the sd_cmd_type_t enum values. Unfortunately we didn't notice that this enum is not used solely inside the SD card model itself, but is also u

Re: [PATCH] tcg/s390x: fix constraint for 32-bit TSTEQ/TSTNE

2024-10-17 Thread Philippe Mathieu-Daudé
On 17/10/24 06:14, Paolo Bonzini wrote: 32-bit TSTEQ and TSTNE is subject to the same constraints as for 64-bit, but setcond_i32 and negsetcond_i32 were incorrectly using TCG_CT_CONST ("i") instead of TCG_CT_CONST_CMP ("C"). Adjust the constraint and make tcg_target_const_match use the same sequ

[PATCH 1/2] ui: Allow injection of vnc display name

2024-10-17 Thread Roque Arcudia Hernandez
From: Andrew Keesler Thanks to 72d277a7, 1ed2cb32, and others, EDID (Extended Display Identification Data) is propagated by QEMU such that a virtual display presents legitimate metadata (e.g., name, serial number, preferred resolutions, etc.) to its connected guest. This change propagates an opt

[PATCH 0/2] Allow injection of virtio-gpu EDID name

2024-10-17 Thread Roque Arcudia Hernandez
Thanks to 72d277a7, 1ed2cb32, and others, EDID (Extended Display Identification Data) is propagated by QEMU such that a virtual display presents legitimate metadata (e.g., name, serial number, preferred resolutions, etc.) to its connected guest. This change adds the ability to specify the EDID nam

[PATCH 2/2] hw/display: Allow injection of virtio-gpu EDID name

2024-10-17 Thread Roque Arcudia Hernandez
From: Andrew Keesler Thanks to 72d277a7, 1ed2cb32, and others, EDID (Extended Display Identification Data) is propagated by QEMU such that a virtual display presents legitimate metadata (e.g., name, serial number, preferred resolutions, etc.) to its connected guest. This change adds the ability

Seeking your thoughts on LLM-generated contributions

2024-10-17 Thread Daniel Pono Takamori
Heya qemu developers, We at Software Freedom Conservancy have been hearing from member projects that people are asking whether they can submit code to these projects that was generated by large language models (LLMs), sometimes called AI coding assistants. We'd like to better understand the natur

Re: [PATCH] Fix calculation of minimum in colo_compare_tcp

2024-10-17 Thread Stefan Weil via
It looks like nobody has sent a pull request for this fix up to now. Is it trivial enough for qemu-trivial? And maybe qemu-stable could also apply it to older versions. Stefan W. Am 10.09.24 um 04:38 schrieb Zhang, Chen: -Original Message- From: Stefan Weil Sent: Tuesday, September 10

Re: [PATCH v2 09/31] hw: adapt to new import path for qobject data type headers

2024-10-17 Thread Halil Pasic
On Thu, 17 Oct 2024 12:33:21 +0100 Daniel P. Berrangé wrote: > diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c > index bf22d6863e..1b89092fe7 100644 > --- a/hw/s390x/s390-skeys.c > +++ b/hw/s390x/s390-skeys.c > @@ -16,7 +16,7 @@ > #include "hw/s390x/storage-keys.h" > #include "qapi/e

Re: [PATCH v4 5/6] migration: Support periodic RAMBlock dirty bitmap sync

2024-10-17 Thread Fabiano Rosas
Peter Xu writes: > On Thu, Oct 17, 2024 at 02:42:54PM +0800, yong.hu...@smartx.com wrote: >> +void cpu_throttle_dirty_sync_timer_tick(void *opaque) >> +{ >> +static uint64_t prev_sync_cnt; > > We may need to reset this in case migration got cancelled and invoked > again, to make sure it keeps

Re: [PATCH V1 1/4] hw/acpi: Initialize ACPI Hotplug CPU Status with Support for vCPU `Persistence`

2024-10-17 Thread Gustavo Romero
Hi Salil, On 10/14/24 16:22, Salil Mehta wrote: Certain CPU architecture specifications [1][2][3] prohibit changes to CPU presence after the kernel has booted. This limitation exists because many system initializations rely on the exact CPU count at boot time and do not expect it to change later

Re: [PATCH] hw/sd/omap_mmc: Don't use sd_cmd_type_t

2024-10-17 Thread Guenter Roeck
On 10/17/24 09:27, Peter Maydell wrote: In commit 1ab08790bb75e4 we did some refactoring of the SD card implementation, which included a rearrangement of the sd_cmd_type_t enum values. Unfortunately we didn't notice that this enum is not used solely inside the SD card model itself, but is also u

Re: [PATCH v4 5/6] migration: Support periodic RAMBlock dirty bitmap sync

2024-10-17 Thread Peter Xu
On Thu, Oct 17, 2024 at 02:42:54PM +0800, yong.hu...@smartx.com wrote: > +void cpu_throttle_dirty_sync_timer_tick(void *opaque) > +{ > +static uint64_t prev_sync_cnt; We may need to reset this in case migration got cancelled and invoked again, to make sure it keeps working in the 2nd run. > +

Re: [Stable-9.1.1 00/49] Patch Round-up for stable 9.1.1, freeze on 2024-10-16 (frozen)

2024-10-17 Thread Michael Tokarev
On 17.10.2024 20:47, Paolo Bonzini wrote: My next pull request includes a few more: https://gitlab.com/bonzini/qemu/-/commit/15d955975bd484c2c66af0d6daaa02a7d04d2256.patch https://gitlab.com/bonzini/qemu/-/commit/64e0e63ea16aa0122dc0c41a0679da0ae4616208.patch https://gitlab.com/bonzini/qemu/-/c

Re: [PATCH] pcie: enable Extended tag field capability

2024-10-17 Thread Marcin Juszkiewicz
W dniu 17.10.2024 o 18:58, Michael S. Tsirkin pisze: diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 4b2f0805c6..54c0f1ec67 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -86,7 +86,8 @@ pcie_cap_v1_fill(PCIDevice *dev, uint8_t port, uint8_t type, uint8_t version) * Specification, Revi

Re: [PATCH v6 10/12] migration/multifd: Add migration option set packet size.

2024-10-17 Thread Fabiano Rosas
Yichen Wang writes: > From: Hao Xiang > > During live migration, if the latency between sender and receiver is > high and bandwidth is also high (a long and fat pipe), using a bigger > packet size can help reduce migration total time. The current multifd > packet size is 128 * 4kb. In addition,

Re: [PATCH v6 09/12] migration/multifd: Enable DSA offloading in multifd sender path.

2024-10-17 Thread Fabiano Rosas
Yichen Wang writes: > From: Hao Xiang > > Multifd sender path gets an array of pages queued by the migration > thread. It performs zero page checking on every page in the array. > The pages are classfied as either a zero page or a normal page. This > change uses Intel DSA to offload the zero pag

Re: [PATCH v4 6/6] tests/migration: Add case for periodic ramblock dirty sync

2024-10-17 Thread Fabiano Rosas
yong.hu...@smartx.com writes: > From: Hyman Huang > > Signed-off-by: Hyman Huang > Reviewed-by: Peter Xu Reviewed-by: Fabiano Rosas

Re: [PATCH v4 5/6] migration: Support periodic RAMBlock dirty bitmap sync

2024-10-17 Thread Fabiano Rosas
yong.hu...@smartx.com writes: > From: Hyman Huang > > When VM is configured with huge memory, the current throttle logic > doesn't look like to scale, because migration_trigger_throttle() > is only called for each iteration, so it won't be invoked for a long > time if one iteration can take a lon

Re: [PATCH v2 2/8] target/riscv: Implement Ssdbltrp sret, mret and mnret behavior

2024-10-17 Thread Ved Shanbhogue
Alistair Francis wrote: $ grep -r sstatus.SDT | grep SRET src/hypervisor.adoc:if the new privilege mode is VU, the `SRET` instruction sets `vsstatus.SDT` What am I missing here? https://github.com/riscv/riscv-isa-manual/blob/ef2ec9dc9afd003d0dab6d5ca36db59864c8483c/src/machine.adoc?plain=1#L53

Re: [PATCH v4 3/6] migration: Move cpu-throttole.c from system to migration

2024-10-17 Thread Fabiano Rosas
yong.hu...@smartx.com writes: > From: Hyman Huang > > Move cpu-throttle.c from system to migration since it's > only used for migration; this makes us avoid exporting the > util functions and variables in misc.h but export them in > migration.h when implementing the periodic ramblock dirty > sync

Re: [PATCH v4 2/6] migration: Stop CPU throttling conditionally

2024-10-17 Thread Fabiano Rosas
yong.hu...@smartx.com writes: > From: Hyman Huang > > Since CPU throttling only occurs when auto-converge > is on, stop it conditionally. > > Signed-off-by: Hyman Huang > --- > migration/migration.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/migration/migration.

Re: [PATCH v4 1/6] accel/tcg/icount-common: Remove the reference to the unused header file

2024-10-17 Thread Fabiano Rosas
yong.hu...@smartx.com writes: > From: Hyman Huang > > Signed-off-by: Hyman Huang > --- > accel/tcg/icount-common.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c > index 8d3d3a7e9d..30bf8500dc 100644 > --- a/accel/tcg/icount-common.

Re: possible deprecation and removal of some old QEMU Arm machine types (pxa2xx, omap, sa1110)

2024-10-17 Thread Philippe Mathieu-Daudé
On 17/10/24 13:07, Peter Maydell wrote: On Thu, 17 Oct 2024 at 16:29, Guenter Roeck wrote: By the way, it looks to me like QEMU has a regression somewhere where we can't boot that sx1 test for the SD card version -- it hangs during kernel boot waiting for the MMC card. (An elderly QEMU binar

Re: [Stable-9.1.1 00/49] Patch Round-up for stable 9.1.1, freeze on 2024-10-16 (frozen)

2024-10-17 Thread Paolo Bonzini
On 10/16/24 22:09, Michael Tokarev wrote: The following patches are queued for QEMU stable v9.1.1: https://gitlab.com/qemu-project/qemu/-/commits/staging-9.1 Patch freeze is 2024-10-16 (frozen), and the release is planned for 2024-10-18: https://wiki.qemu.org/Planning/9.1 Please respond

Re: [PATCH] target/arm: Don't assert in regime_is_user() for E10 mmuidx values

2024-10-17 Thread Richard Henderson
On 10/17/24 10:23, Peter Maydell wrote: In regime_is_user() we assert if we're passed an ARMMMUIdx_E10_* mmuidx value. This used to make sense because we only used this function in ptw.c and would never use it on this kind of stage 1+2 mmuidx, only for an individual stage 1 or stage 2 mmuidx. Ho

[PULL v2 00/26] x86 and KVM patches for 2024-10-15

2024-10-17 Thread Paolo Bonzini
The following changes since commit f774a677507966222624a9b2859f06ede7608100: Merge tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-10-15 15:18:22 +0100) are available in the Git repository at: https://gitlab.com/bonzini/qemu.git tags/f

[PATCH] target/arm: Don't assert in regime_is_user() for E10 mmuidx values

2024-10-17 Thread Peter Maydell
In regime_is_user() we assert if we're passed an ARMMMUIdx_E10_* mmuidx value. This used to make sense because we only used this function in ptw.c and would never use it on this kind of stage 1+2 mmuidx, only for an individual stage 1 or stage 2 mmuidx. However, when we implemented FEAT_E0PD we ad

Re: [PATCH 2/2] tests/functional: Add a functional test for the sx1 board

2024-10-17 Thread Thomas Huth
On 17/10/2024 18.32, Peter Maydell wrote: Add a functional test for the sx1 board that uses the kernel and rootfs provided by Guenter Roeck in the linux-test-downloads repo: https://github.com/groeck/linux-test-downloads/ We have three variants of the test for this board: * just boot initrd

Re: [PATCH 1/2] tests/functional: Add a functional test for the collie board

2024-10-17 Thread Thomas Huth
On 17/10/2024 18.32, Peter Maydell wrote: Add a functional test for the collie board that uses the kernel and rootfs provided by Guenter Roeck in the linux-test-downloads repo: https://github.com/groeck/linux-test-downloads/ This just boots Linux with a userspace that immediately reboots the b

Re: [PATCH] pcie: enable Extended tag field capability

2024-10-17 Thread Michael S. Tsirkin
_EXT_TAG); > > pci_set_long(exp_cap + PCI_EXP_LNKCAP, > (port << PCI_EXP_LNKCAP_PN_SHIFT) | We can't change capabilities unconditionally. It needs at least a machine type compat thing. > --- > base-commit: f774a677507966222624a9b2859f06ede7608100 > change-id: 20241017-pcie-extend-a6a9de74dbd0 > > Best regards, > -- > Marcin Juszkiewicz

Re: [PATCH RFC 0/5] hw/cxl: Type 2 Device RFC

2024-10-17 Thread Cédric Le Goater
Hello, On 5/18/23 04:45, Ira Weiny wrote: Type 2 devices are not yet a reality. Developing core kernel support is difficult without some test device to model against. Define a type 2 device 'cxl-accel'. This device is derived from the type 3 device and retains all that functionality for now.

[PATCH 0/2] arm: Add collie and sx functional tests

2024-10-17 Thread Peter Maydell
This patchset adds new functional tests for the collie and sx1 boards, which are the only remaining ones that survived the culling of the OMAP/PXA2xx/strongarm machines. For these tests I'm indebted to Guenter Roeck, who has kindly built and made available the kernel images, rootfs, etc and docume

Re: [PULL 0/5] loongarch-to-apply queue

2024-10-17 Thread Peter Maydell
On Wed, 16 Oct 2024 at 09:49, Song Gao wrote: > > The following changes since commit f774a677507966222624a9b2859f06ede7608100: > > Merge tag 'pull-target-arm-20241015-1' of > https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-10-15 > 15:18:22 +0100) > > are available in the Git

[PATCH 2/2] tests/functional: Add a functional test for the sx1 board

2024-10-17 Thread Peter Maydell
Add a functional test for the sx1 board that uses the kernel and rootfs provided by Guenter Roeck in the linux-test-downloads repo: https://github.com/groeck/linux-test-downloads/ We have three variants of the test for this board: * just boot initrd * boot with filesystem on SD card * boot

[PATCH 1/2] tests/functional: Add a functional test for the collie board

2024-10-17 Thread Peter Maydell
Add a functional test for the collie board that uses the kernel and rootfs provided by Guenter Roeck in the linux-test-downloads repo: https://github.com/groeck/linux-test-downloads/ This just boots Linux with a userspace that immediately reboots the board, so we wait for the reboot log line. Si

Re: [PATCH 4/4] ci: Add check-migration-quick to the clang job

2024-10-17 Thread Fabiano Rosas
Daniel P. Berrangé writes: > On Thu, Oct 17, 2024 at 11:32:11AM -0300, Fabiano Rosas wrote: >> Recent changes to how we invoke the migration tests have >> (intentionally) caused them to not be part of the check-qtest target >> anymore. Add the check-migration-quick target so we don't lose >> migr

[PATCH] hw/sd/omap_mmc: Don't use sd_cmd_type_t

2024-10-17 Thread Peter Maydell
In commit 1ab08790bb75e4 we did some refactoring of the SD card implementation, which included a rearrangement of the sd_cmd_type_t enum values. Unfortunately we didn't notice that this enum is not used solely inside the SD card model itself, but is also used by the OMAP MMC controller device. In

Re: [PATCH] tcg/s390x: fix constraint for 32-bit TSTEQ/TSTNE

2024-10-17 Thread Richard Henderson
On 10/17/24 02:14, Paolo Bonzini wrote: 32-bit TSTEQ and TSTNE is subject to the same constraints as for 64-bit, but setcond_i32 and negsetcond_i32 were incorrectly using TCG_CT_CONST ("i") instead of TCG_CT_CONST_CMP ("C"). Adjust the constraint and make tcg_target_const_match use the same sequ

Re: [PATCH v3 1/7] hw/core: Make CPU topology enumeration arch-agnostic

2024-10-17 Thread Marcin Juszkiewicz
W dniu 12.10.2024 o 12:44, Zhao Liu pisze: Cache topology needs to be defined based on CPU topology levels. Thus, define CPU topology enumeration in qapi/machine.json to make it generic for all architectures. I have a question: how to create other than default cache topology in C source? If

Re: possible deprecation and removal of some old QEMU Arm machine types (pxa2xx, omap, sa1110)

2024-10-17 Thread Peter Maydell
On Thu, 17 Oct 2024 at 16:29, Guenter Roeck wrote: > > On 10/17/24 07:29, Peter Maydell wrote: > > On Thu, 17 Oct 2024 at 15:12, Guenter Roeck wrote: > >> > >> On 10/17/24 05:42, Peter Maydell wrote: > >>> On Tue, 15 Oct 2024 at 19:12, Guenter Roeck wrote: > Please let me know if https://gi

Re: [RFC V1 00/14] precreate phase

2024-10-17 Thread Peter Xu
On Thu, Oct 17, 2024 at 11:19:51AM -0400, Steven Sistare wrote: > On 10/17/2024 11:14 AM, Steve Sistare wrote: > > Define a new qemu initialization phase called 'precreate' which occurs > > before most backends or devices have been created. The only exception > > is monitor and qtest devices and t

[PATCH v2 2/2] gdbstub: Apply breakpoints only to the relevant CPUs

2024-10-17 Thread Roque Arcudia Hernandez
In the context of using the remote gdb with multiple processes/inferiors (multi cluster machine) a given breakpoint will target an specific inferior. Current implementation of tcg_insert_breakpoint and tcg_remove_breakpoint apply a given breakpoint to all the cpus available in the system. This is

[PATCH v2 0/2] Fix for multi-process gdbstub breakpoints

2024-10-17 Thread Roque Arcudia Hernandez
This patch series modifies the gdbstub to address a bug running a multi cluster machine in QEMU using TCG. The machine where the problem was seen had several clusters of CPUs with similar architectures and similar memory layout all working with physical addresses. It was discovered under gdb debugg

[PATCH v2 1/2] gdbstub: Fix wrong CPUState pointer in breakpoint functions

2024-10-17 Thread Roque Arcudia Hernandez
In the context of using the remote gdb with multiple processes/inferiors (multiple cluster machine) a given breakpoint will target an specific inferior. If needed the remote protocol will use the packet 'H op thread-id' with op = 'g' to change focus to the inferior we want to insert/remove the brea

Re: [PATCH 2/2] gdbstub: Apply breakpoints only to the selected PID

2024-10-17 Thread Roque Arcudia Hernandez
I'm reimplementing this in a new patchset with a new function gdb_cpu_in_source_group instead of making public the PID and multiptocess functions. On Mon, Oct 7, 2024 at 3:15 AM Alex Bennée wrote: > > Roque Arcudia Hernandez writes: > > > In the context of using the remote gdb with multiple > >

Re: [PATCH 1/2] gdbstub: Fix wrong CPUState pointer in breakpoint functions

2024-10-17 Thread Roque Arcudia Hernandez
I'm adding extra documentation to those fields in a new patchset. On Fri, Oct 4, 2024 at 1:46 PM Alex Bennée wrote: > > Roque Arcudia Hernandez writes: > > > In the context of using the remote gdb with multiple > > processes/inferiors (multiple cluster machine) a given breakpoint > > will target

Re: [PATCH v3 1/7] hw/core: Make CPU topology enumeration arch-agnostic

2024-10-17 Thread Daniel P . Berrangé
On Sat, Oct 12, 2024 at 06:44:23PM +0800, Zhao Liu wrote: > Cache topology needs to be defined based on CPU topology levels. Thus, > define CPU topology enumeration in qapi/machine.json to make it generic > for all architectures. > > To match the general topology naming style, rename CPU_TOPO_LEVE

Re: possible deprecation and removal of some old QEMU Arm machine types (pxa2xx, omap, sa1110)

2024-10-17 Thread Guenter Roeck
On 10/17/24 07:29, Peter Maydell wrote: On Thu, 17 Oct 2024 at 15:12, Guenter Roeck wrote: On 10/17/24 05:42, Peter Maydell wrote: On Tue, 15 Oct 2024 at 19:12, Guenter Roeck wrote: Please let me know if https://github.com/groeck/linux-test-downloads.git meets your needs. For now I added 'c

Re: [PATCH v3 6/7] i386/pc: Support cache topology in -machine for PC machine

2024-10-17 Thread Daniel P . Berrangé
On Sat, Oct 12, 2024 at 06:44:28PM +0800, Zhao Liu wrote: > Allow user to configure l1d, l1i, l2 and l3 cache topologies for PC > machine. > > Additionally, add the document of "-machine smp-cache" in > qemu-options.hx. > > Signed-off-by: Zhao Liu > Tested-by: Yongwei Ma > Reviewed-by: Jonathan

Re: [RFC V1 13/14] net: cleanup for precreate phase

2024-10-17 Thread Steven Sistare
cc jason. The cover letter for this series is here: https://lore.kernel.org/qemu-devel/1729178055-207271-1-git-send-email-steven.sist...@oracle.com - Steve On 10/17/2024 11:14 AM, Steve Sistare wrote: Guard against unconfigured state if cleanup is called early, such as during the precreate ph

Re: [RFC V1 02/14] accel: accel preinit function

2024-10-17 Thread Steven Sistare
cc Xen, whpx, and nvmm accelerator maintainers for this accelerator-specific patch. The cover letter for this series is here: https://lore.kernel.org/qemu-devel/1729178055-207271-1-git-send-email-steven.sist...@oracle.com - Steve On 10/17/2024 11:14 AM, Steve Sistare wrote: Extract the firs

Re: [RFC V1 00/14] precreate phase

2024-10-17 Thread Steven Sistare
On 10/17/2024 11:14 AM, Steve Sistare wrote: Define a new qemu initialization phase called 'precreate' which occurs before most backends or devices have been created. The only exception is monitor and qtest devices and their associated chardevs. QEMU runs in the main loop during this phase. Mo

[RFC V1 14/14] migration: allow commands during precreate and preconfig

2024-10-17 Thread Steve Sistare
Allow various migration commands during the precreate and preconfig phases so migration may be set up and initiated at that time. Signed-off-by: Steve Sistare --- hmp-commands.hx | 2 ++ qapi/migration.json | 16 +++- qapi/misc.json | 3 ++- 3 files changed, 15 insertions(

[RFC V1 05/14] migration: init and listen during precreate

2024-10-17 Thread Steve Sistare
Initialize the migration object as early as possible so that migration configuration commands may be sent during the precreate phase. Also, start listening for the incoming migration connection during precreate, so that the listen port number is assigned (if dynamic), and the user can discover it

[RFC V1 04/14] accel: set accelerator and machine props earlier

2024-10-17 Thread Steve Sistare
Make all global and compat properties available before the first objects are created. Set accelerator compatibility properties in configure_accelerators, when the accelerator is chosen, and call configure_accelerators earlier. Set machine options earlier. Signed-off-by: Steve Sistare --- accel

[RFC V1 10/14] qemu-options: pass object to filter

2024-10-17 Thread Steve Sistare
Pass the entire options object to the foreach filter function, rather than just the type name, so more aspects of the object can be used as filter criteria in future patches. No functional change. Signed-off-by: Steve Sistare --- system/vl.c | 20 1 file changed, 12 inserti

[RFC V1 08/14] qom: get properties

2024-10-17 Thread Steve Sistare
Extract a subroutine from user_creatable_add_qapi that converts object options to a dictionary of properties and returns them. Use g_autoptr to simplify the code. No functional change. Signed-off-by: Steve Sistare --- include/qapi/visitor.h | 1 + include/qom/object_interfaces.h | 8

[RFC V1 13/14] net: cleanup for precreate phase

2024-10-17 Thread Steve Sistare
Guard against unconfigured state if cleanup is called early, such as during the precreate phase. Signed-off-by: Steve Sistare --- net/net.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/net/net.c b/net/net.c index d9b23a8..207fdb0 100644 --- a/net/net.c +++ b/net/net.c @

[RFC V1 11/14] monitor: connect in precreate

2024-10-17 Thread Steve Sistare
Complete monitor connections as early as possible, prior to qemu_create_early_backends, so the user can issue commands during the precreate phase. Make a list of the chardev's referenced by all monitors. Create the chardevs, then create the monitors. Exclude monitor chardevs and monitors from th

[RFC V1 07/14] monitor: chardev name

2024-10-17 Thread Steve Sistare
Define an accessor that returns the chardev name in monitor options. Signed-off-by: Steve Sistare --- include/monitor/monitor.h | 1 + monitor/monitor.c | 21 + 2 files changed, 22 insertions(+) diff --git a/include/monitor/monitor.h b/include/monitor/monitor.h inde

[RFC V1 06/14] vl: precreate phase

2024-10-17 Thread Steve Sistare
Refactor qemu_init into actions performed during the precreate phase, and actions performed when exiting precreate. For now, always exit the precreate phase immediately at init time. Future patches will add conditions that cause QEMU to linger in the precreate phase while running the main loop.

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