Eric Blake writes:
> On 3/17/20 6:54 AM, Markus Armbruster wrote:
>> Policy is separate for input and output.
>>
>> Input policy can be "accept" (accept silently), or "reject" (reject
>> the request with an error).
>>
>> Output policy can be "accept" (pass on unchanged), or "hide" (filter
>> out
Common VM users sometimes care about CPU speed, so we add two new
options to allow VM vendors to present CPU speed to their users.
Normally these information can be fetched from host smbios.
v3 -> v4:
- Fix the default value when not specifying "-smbios type=4" option;
it would be 0 instead of 2
Common VM users sometimes care about CPU speed, so we add two new
options to allow VM vendors to present CPU speed to their users.
Normally these information can be fetched from host smbios.
Strictly speaking, the "max speed" and "current speed" in type 4
are not really for the max speed and curre
Add smbios type 4 CPU speed check for we added new options to set
smbios type 4 "max speed" and "current speed". The default value
should be 2000 when no option is specified, just as the old version
did.
We add the test case to one machine of each architecture, though it
doesn't really run on aarc
On Wed, Mar 18, 2020 at 10:58:46AM +1100, Alexey Kardashevskiy wrote:
>
>
> On 18/03/2020 09:33, David Gibson wrote:
> > On Tue, Mar 17, 2020 at 11:30:31AM +0100, Paolo Bonzini wrote:
> >> On 17/03/20 11:03, David Gibson wrote:
> >>> pseries: Update SLOF firmware image
> >>> ppc/spapr
With clang at HEAD, linking fails with "undefined symbol:
qemu_build_not_reached". It's because `store_helper` and
`helper_ret_stb_mmu` are mutually recursive and clang inlined latter
inside the former, making `store_helper` a recursive function and no
longer fully inlineable preventing constant pr
Linux using the hash MMU ("disable_radix" command line) on a POWER9
machine quickly hits translation bugs due to using v3.0 slbia
features that are not implemented in TCG. Add them.
Signed-off-by: Nicholas Piggin
---
target/ppc/helper.h | 2 +-
target/ppc/mmu-hash64.c | 57 +
slbia must invalidate TLBs even if it does not remove a valid SLB
entry, because slbmte can overwrite valid entries without removing
their TLBs.
As the architecture says, slbia invalidates all lookaside information,
not conditionally based on if it removed valid entries.
It does not seem possible
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1859418
Title:
disk driver
On 3/17/20 4:23 AM, Stefan Hajnoczi wrote:
>> Code is posted here
>> https://github.com/AndrzejJakowski/qemu/commit/3a7762a1d13ff1543d1da430748eb24e38faab6f
>>
>> QEMU command line:
>>
>> # below are just relevant pieces of configuration, other stuff omitted
>> # tried different setting (e.g. pmem=
Patchew URL:
https://patchew.org/QEMU/20200318011217.2102748-1-ehabk...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PULL 0/4] Python queue for 5.0 soft freeze
Message-id: 20200318011217.2102748-1-ehabk...@redhat.com
Ty
On 2020-03-17 17:11:22 Tue, Greg Kurz wrote:
> On Tue, 17 Mar 2020 08:51:50 -0700 (PDT)
> no-re...@patchew.org wrote:
>
> > Patchew URL:
> > https://patchew.org/QEMU/158444819283.31599.12155058652686614304.stgit@jupiter/
> >
> >
> >
> > Hi,
> >
> > This series seems to have some coding style
Patchew URL: https://patchew.org/QEMU/20200317195042.282977-1-pet...@redhat.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#
On 2020/3/17 下午4:25, Zhang, Chen wrote:
Hi Jason,
No news for a while.
Please review this series when you have time.
Thanks
Zhang Chen
Sorry for the delay.
Patch looks good to me.
But it can not be applied cleanly on master.
Please rebase and send V2 (btw, I notice some typos in the com
[AMD Official Use Only - Internal Distribution Only]
> -Original Message-
> From: Eduardo Habkost
> Sent: Tuesday, March 17, 2020 6:46 PM
> To: Moger, Babu
> Cc: marcel.apfelb...@gmail.com; pbonz...@redhat.com; r...@twiddle.net;
> m...@redhat.com; imamm...@redhat.com; qemu-devel@nongnu
On 2020/3/17 下午6:47, Philippe Mathieu-Daudé wrote:
Ping?
This series is fully reviewed.
Sorry for the delay.
Applied.
Thanks
On 2020/3/17 下午6:49, P J P wrote:
+-- On Tue, 17 Mar 2020, Jason Wang wrote --+
| > +-- On Fri, 6 Mar 2020, Stefan Hajnoczi wrote --+
| > | > +static int
| > | > +tulip_can_receive(NetClientState *nc)
| > | > +{
| > | > +TULIPState *s = qemu_get_nic_opaque(nc);
| > | > +
| > | > +if (s-
On 2020/3/17 下午10:13, Peter Xu wrote:
On Tue, Mar 17, 2020 at 11:04:26AM +0800, Jason Wang wrote:
On 2020/3/17 上午2:14, Peter Xu wrote:
On Mon, Mar 16, 2020 at 01:19:54PM -0400, Michael S. Tsirkin wrote:
On Fri, Mar 13, 2020 at 12:31:22PM -0400, Peter Xu wrote:
On Fri, Mar 13, 2020 at 11:29:
From: Babu Moger
Update structures X86CPUTopoIDs and CPUX86State to hold the number of
nodes per package. This is required to build EPYC mode topology.
Signed-off-by: Babu Moger
Reviewed-by: Igor Mammedov
Acked-by: Michael S. Tsirkin
Message-Id: <158396720035.58170.1973738805301006456.st...@n
From: Babu Moger
The function pc_cpu_pre_plug takes care of initialization of CPUX86State.
So, remove the initialization here.
Suggested-by: Igor Mammedov
Signed-off-by: Babu Moger
Reviewed-by: Igor Mammedov
Acked-by: Michael S. Tsirkin
Message-Id: <158396719336.58170.11951852360759449871.st
From: "Moger, Babu"
Adds the support for 2nd Gen AMD EPYC Processors. The model display
name will be EPYC-Rome.
Adds the following new feature bits on top of the feature bits from the
first generation EPYC models.
perfctr-core : core performance counter extensions support. Enables the VM to
From: Peter Maydell
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now
From: Babu Moger
For consistency rename apicid_from_topo_ids to x86_apicid_from_topo_ids.
No functional change.
Signed-off-by: Babu Moger
Reviewed-by: Igor Mammedov
Acked-by: Michael S. Tsirkin
Message-Id: <158396720748.58170.5335409429390890145.st...@naples-babu.amd.com>
---
hw/i386/pc.c
From: Babu Moger
Store the smp sockets in CpuTopology. The socket information required to
build the apic id in EPYC mode. Right now socket information is not passed
to down when decoding the apic id. Add the socket information here.
Signed-off-by: Babu Moger
Reviewed-by: Eduardo Habkost
Revie
From: Babu Moger
This is an effort to re-arrange few data structure for better readability.
1. Add X86CPUTopoInfo which will have all the topology informations
required to build the cpu topology. There is no functional changes.
2. Introduce init_topo_info to initialize X86CPUTopoInfo members
From: Babu Moger
Now that we have all the parameters in X86CPUTopoInfo, we can just
pass the structure to calculate the offsets and width.
Signed-off-by: Babu Moger
Reviewed-by: Igor Mammedov
Acked-by: Michael S. Tsirkin
Message-Id: <158396717953.58170.5628042059144117669.st...@naples-babu.am
From: "Dr. David Alan Gilbert"
When a host is running with memory encryption, the memory isn't visible
to the host kernel; attempts to merge that memory are futile because
what it's really comparing is encrypted memory, usually encrypted
with different keys.
Automatically turn mem-merge off when
From: Tao Xu
Add additional information for -cpu help to indicate the changes in this
version of CPU model.
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
Message-Id: <20200212081328.7385-4-tao3...@intel.com>
Signed-off-by: Eduardo Habkost
---
target/i386/cpu.c | 11 +--
1 file
From: Babu Moger
Rename few data structures related to X86 topology. X86CPUTopoIDs will
have individual arch ids. Next patch introduces X86CPUTopoInfo which will
have all topology information(like cores, threads etc..).
Signed-off-by: Babu Moger
Reviewed-by: Eduardo Habkost
Message-Id: <15832
The following changes since commit d649689a8ecb2e276cc20d3af6d416e3c299cb17:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2020-03-17 18:33:05 +)
are available in the Git repository at:
git://github.com/ehabkost/qemu.git tags/x86-and-machine-pull-request
From: "Moger, Babu"
Adds the following missing CPUID bits:
perfctr-core : core performance counter extensions support. Enables the VM
to use extended performance counter support. It enables six
programmable counters instead of 4 counters.
clzero : instruction z
From: Tao Xu
Because MPX is being removed from the linux kernel, remove MPX feature
from Denverton.
Signed-off-by: Tao Xu
Message-Id: <20200212081328.7385-2-tao3...@intel.com>
Signed-off-by: Eduardo Habkost
---
target/i386/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git
From: Vladimir Sementsov-Ogievskiy
This example may be used as a template for custom benchmark.
It illustrates three things to prepare:
- define bench_func
- define test environments (columns)
- define test cases (rows)
And final call of simplebench API.
Signed-off-by: Vladimir Sementsov-Ogie
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Aleksandar Markovic
Message-Id: <20200228071914.11746-5-vsement...@virtuozzo.com>
Signed-off-by: Eduardo Habkost
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/M
From: Vladimir Sementsov-Ogievskiy
Add block-job benchmarking helper functions.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Aleksandar Markovic
Message-Id: <20200228071914.11746-3-vsement...@virtuozzo.com>
Signed-off-by: Eduardo Habkost
---
scripts/simplebench/bench_block_job.py
From: Vladimir Sementsov-Ogievskiy
Add simple benchmark table creator.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Aleksandar Markovic
Message-Id: <20200228071914.11746-2-vsement...@virtuozzo.com>
Signed-off-by: Eduardo Habkost
---
scripts/simplebench/simplebench.py | 128 ++
The following changes since commit d649689a8ecb2e276cc20d3af6d416e3c299cb17:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2020-03-17 18:33:05 +)
are available in the Git repository at:
git://github.com/ehabkost/qemu.git tags/python-next-pull-request
fo
Patchew URL: https://patchew.org/QEMU/20200317163616.30027-1-f4...@amsat.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PULL 00/13] target: Add the Renesas RX architecture
Message-id: 20200317163616.30027-1-f4...@amsat.org
Type:
On 2020-03-17 18:27, Paolo Bonzini wrote:
On 17/03/20 09:55, Colin Xu wrote:
On 2020-03-17 16:26, Paolo Bonzini wrote:
On 17/03/20 08:46, Colin Xu wrote:
Hi Paolo,
For future HAX patch, once it's "Reviewed-by" haxm maintainers and other
reviewers, do we need "SubmitAPullRequest" separately
Podman users will most often be using buildah to build containers.
Among the differences between "buildah bud|build-using-dockerfile" and
a traditional "docker build" is that buildah does not run a container
during build.
To the best of my knowledge and experiments, this means that runtime
variabl
Which is currenly missing, and will be referenced later in the
contributed CI playbooks.
Signed-off-by: Cleber Rosa
Reviewed-by: Alex Bennée
Message-Id: <20200312193616.438922-2-cr...@redhat.com>
Signed-off-by: Cleber Rosa
---
tests/docker/dockerfiles/centos8.docker | 32 ++
This acceptance test, validates that a full blown Linux guest can
successfully boot in QEMU. In this specific case, the guest chosen is
Fedora version 31.
* x86_64, pc-i440fx and pc-q35 machine types, with TCG and KVM as
accelerators
* aarch64 and virt machine type, with TCG and KVM as acce
The newly introduced "boot linux" tests make use of Linux images that
are larger than usual, and fall into what Avocado calls "vmimages",
and can be referred to by name, version and architecture.
The images can be downloaded automatically during the test. But, to
make for more reliable test result
Some tests may benefit from using resources from a build directory.
This introduces three variables that can help tests find resources in
those directories.
First, a BUILD_DIR is assumed to exist, given that the primary form of
running the acceptance tests is from a build directory (which may or
m
From: Oksana Vohchana
QEMUMachine writes some messages to the default logger.
But it sometimes hard to read the output if we have requests to
more than one VM.
This patch adds a label to the logger in the debug mode.
Signed-off-by: Oksana Vohchana
Reviewed-by: John Snow
Reviewed-by: Wainer dos
The following changes since commit d649689a8ecb2e276cc20d3af6d416e3c299cb17:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2020-03-17 18:33:05 +)
are available in the Git repository at:
git://github.com/clebergnu/qemu.git tags/python-next-pull-request
f
Also affects me when running Qemu 4.0.0 with -machine pc-q35-3.1. I get
this on the command line:
"qemu-system-x86_64: vhost_region_add_section: Overlapping but not
coherent sections at 11a000".
h/w: AMD Ryzen 3900X, Gigabyte Aorus Pro X570 (latest BIOS), kernel
5.3.0.
With -machine q35 (i.e. pc
On 18/03/2020 09:33, David Gibson wrote:
> On Tue, Mar 17, 2020 at 11:30:31AM +0100, Paolo Bonzini wrote:
>> On 17/03/20 11:03, David Gibson wrote:
>>> pseries: Update SLOF firmware image
>>> ppc/spapr: Move GPRs setup to one place
>>> pseries: Update SLOF firmware image
>>>
Hi
On Wed, Mar 18, 2020 at 12:21 AM Alex Bennée wrote:
>
>
> Dr. David Alan Gilbert writes:
>
> > * Stefan Hajnoczi (stefa...@redhat.com) wrote:
> >> On Mon, Mar 16, 2020 at 10:33:31AM +, Daniel P. Berrangé wrote:
> >> > On Sat, Mar 14, 2020 at 02:33:25PM +0100, Marc-André Lureau wrote:
> >>
On Tue, Mar 17, 2020 at 07:22:06PM -0400, Eduardo Habkost wrote:
> On Thu, Mar 12, 2020 at 11:28:47AM -0500, Babu Moger wrote:
> > Eduardo, Can you please queue the series if there are no concerns.
> > Thanks
>
> I had queued it for today's pull request, but it looks like it
> breaks "make check".
Patchew URL:
https://patchew.org/QEMU/20200317190013.25036-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PULL 0/5] tcg patch queue
Message-id: 20200317190013.25036-1-richard.hender...@linaro.org
Type:
From: BALATON Zoltan
The pci_ide_create_devs() function takes a hd_table parameter but all
callers just pass what ide_drive_get() returns so we can do it locally
simplifying callers and removing hd_table parameter.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Markus
[AMD Official Use Only - Internal Distribution Only]
Ok. I am looking at it.
> -Original Message-
> From: Eduardo Habkost
> Sent: Tuesday, March 17, 2020 6:22 PM
> To: Moger, Babu
> Cc: marcel.apfelb...@gmail.com; pbonz...@redhat.com; r...@twiddle.net;
> m...@redhat.com; imamm...@redhat
Sorry I didn't see this yesterday.
We've (Apple) signed up for taking over HVF ownership. I didn't realize I
needed to add to the MAINTAINERS list.
Roman, we also have a bunch of pending fixes for some of the issues you've
listed. We're in the process of upstreaming them.
Cameron Esfahani
di
From: BALATON Zoltan
This removes pci_piix4_ide_init() function similar to clean up done to
other ide devices.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Markus Armbruster
Message-id:
fe46b6536abbae77695f6d1c711a04a3f4b5481d.1584457537.git.bala...@eik.bme.hu
Sig
From: BALATON Zoltan
After previous clean ups we can drop direct inclusion of hw/ide.h from
several places.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Markus Armbruster
Message-id:
a3f72b663e537701c63cec5fc9cb8ed4f4249f28.1584457537.git.bala...@eik.bme.hu
Signed
From: BALATON Zoltan
Spaces are required around a + operator and if statements should have
braces even for single line. Also make it simpler by reversing the
condition instead of breaking the loop.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
From: BALATON Zoltan
This removes pci_piix3_ide_init() and pci_piix3_xen_ide_init()
functions similar to clean up done to other ide devices.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Message-id:
adddfa21552
From: BALATON Zoltan
We can move this define now that less files use it to internal.h to
further reduce dependency on hw/ide.h.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Markus Armbruster
Message-id:
e68675d2f6252f229cf788b7cd163bb76fa3e26b.1584457537.git.bala.
From: BALATON Zoltan
After previous patches we don't need hw/pci/pci.h any more in
hw/ide.h. Some files depended on implicit inclusion by this header
which are also fixed up here.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Mark
From: BALATON Zoltan
To avoid any problem with reassigning pci variable store devfn in a
variable instead of acessing it from the PCIDevice.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-id:
1020e0bfcfc6e364f967ccb2a9a3778ac174ccbe.1584457537.git.bala...@eik.bme.hu
From: Mark Cave-Ayland
According to both the VT82C686B and VT8231 datasheets the VIA Southbridge IDE
controller is initialised in legacy mode.
This allows Linux to correctly determine that legacy rather than PCI IRQ routing
should be used since the boot console text in the fulong2e test image ch
From: Markus Armbruster
valgrind reports write unitialized bytes from buf[]. Clear them.
ASan reports we store to misaligned address in buf[]. Use stl_le_p()
for that.
Cc: Sam Eiderman
Cc: John Snow
Signed-off-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 202003170
From: BALATON Zoltan
The pci_do_device_reset() function (called from pci_device_reset)
clears the PCI_INTERRUPT_LINE config reg of devices on the bus but did
this without taking wmask into account. We'll have a device model now
that needs to set a constant value for this reg and this patch allows
From: Mark Cave-Ayland
MorphOS writes to PCI_CLASS_PROG during IDE initialisation to place the
controller in native mode, but thinks the initialisation has failed
because the native mode bits aren't set when reading the register back.
Signed-off-by: Mark Cave-Ayland
Tested-by: BALATON Zoltan
S
From: BALATON Zoltan
Follow example of CMD646 and remove via_ide_init function and do it
directly in board code instead.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Tested-by: BALATON Zoltan
Signed-off-by: Mark Cave-Ayland
Message-id: 20200313082444.2439-3-mark.cave-ayl...@il
From: Mark Cave-Ayland
The existing code uses fixed PCI IRQ routing on IRQ 14 rather than legacy IRQ
14/15 routing as documented in the datasheet.
With the changes in this patchset guest OSs now correctly detect and configure
the VIA controller in legacy IRQ routing mode, allowing the incorrect
From: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: BALATON Zoltan
Message-id: 20200313082444.2439-2-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow
---
hw/ide/via.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a
From: Mark Cave-Ayland
Some firmwares accidentally write to PCI_INTERRUPT_LINE on startup which has
no effect on real hardware since it is hard-wired to its default value, but
causes the guest OS to become confused trying to initialise IDE devices
when running under QEMU.
Signed-off-by: Mark Cav
From: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20200307091313.24190-3-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow
---
include/hw/ide.h | 2 --
hw/ide/cmd646.c | 12
2 files change
The following changes since commit 373c7068dd610e97f0b551b5a6d0a27cd6da4506:
qemu.nsi: Install Sphinx documentation (2020-03-09 16:45:00 +)
are available in the Git repository at:
https://github.com/jnsnow/qemu.git tags/ide-pull-request
for you to fetch changes up to 7d0776ca7f853d466b6
From: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20200307151536.32709-3-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow
---
hw/ide/cmd646.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/ide/cmd646.c b/hw/i
From: Mark Cave-Ayland
Remove the call to pci_cmd646_ide_init() since global device init functions
are deprecated in preference of using qdev directly.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20200307091313.24190-2-mark.ca
From: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20200307151536.32709-2-mark.cave-ayl...@ilande.co.uk
Signed-off-by: John Snow
---
hw/ide/cmd646.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ide/cmd646.c b/
On Thu, Mar 12, 2020 at 11:28:47AM -0500, Babu Moger wrote:
> Eduardo, Can you please queue the series if there are no concerns.
> Thanks
I had queued it for today's pull request, but it looks like it
breaks "make check". See
https://travis-ci.org/github/ehabkost/qemu/jobs/663529282
PASS 4 bi
On 3/17/20 11:05 AM, BALATON Zoltan wrote:
> Avoid problems from reassigning variable in piix4_create and fix
> compilation problem with mips_r4k
>
> BALATON Zoltan (8):
> hw/ide: Get rid of piix3_init functions
> hw/isa/piix4.c: Introduce variable to store devfn
> hw/ide: Get rid of piix
Dr. David Alan Gilbert writes:
> * Stefan Hajnoczi (stefa...@redhat.com) wrote:
>> On Mon, Mar 16, 2020 at 10:33:31AM +, Daniel P. Berrangé wrote:
>> > On Sat, Mar 14, 2020 at 02:33:25PM +0100, Marc-André Lureau wrote:
>> > > Hi
>> > >
>> > > On Thu, Mar 12, 2020 at 11:49 AM Daniel P. Berr
On Tue, Mar 17, 2020 at 06:36:18PM +, Alex Bennée wrote:
>
> Cleber Rosa writes:
>
> > The newly introduced "boot linux" tests make use of Linux images that
> > are larger than usual, and fall into what Avocado calls "vmimages",
> > and can be referred to by name, version and architecture.
>
On Tue, Mar 17, 2020 at 11:06:15AM -0400, Programmingkid wrote:
>
> > On Mar 17, 2020, at 7:01 AM, qemu-ppc-requ...@nongnu.org wrote:
> >
> > Message: 3
> > Date: Tue, 17 Mar 2020 11:47:32 +0100
> > From: Cédric Le Goater
> > To: David Gibson , Nicholas Piggin
> >
> > Cc: qemu-...@nongnu.or
On Tue, Mar 17, 2020 at 11:30:31AM +0100, Paolo Bonzini wrote:
> On 17/03/20 11:03, David Gibson wrote:
> > pseries: Update SLOF firmware image
> > ppc/spapr: Move GPRs setup to one place
> > pseries: Update SLOF firmware image
> > spapr/rtas: Reserve space for RTAS blob and
On Tue, 17 Mar 2020 18:49:23 -0400
Peter Xu wrote:
> This is majorly only for X86 because that's the only one that supports
> split irqchip for now.
>
> When the irqchip is split, we face a dilemma that KVM irqfd will be
> enabled, however the slow irqchip is still running in the userspace.
> It
On Tue, 17 Mar 2020 15:50:40 -0400
Peter Xu wrote:
> So that kvm_irqchip_assign_irqfd() can have access to the
> EventNotifiers, especially the resample event. It is needed in follow
> up patch to cache and kick resamplefds from QEMU.
>
> Reviewed-by: Eric Auger
> Signed-off-by: Peter Xu
> --
On Tue, 17 Mar 2020 15:50:42 -0400
Peter Xu wrote:
> With the resamplefd list introduced, we can savely enable VFIO INTx
> fast path again with split irqchip so it can still be faster than the
> complete slow path.
>
> Reviewed-by: Eric Auger
> Signed-off-by: Peter Xu
> ---
> hw/vfio/pci.c |
On Tue, 17 Mar 2020 15:50:38 -0400
Peter Xu wrote:
> It's currently broken. Let's use the slow path to at least make it
> functional.
>
> Tested-by: Eric Auger
> Reviewed-by: Eric Auger
> Signed-off-by: Peter Xu
> ---
> hw/vfio/pci.c | 12
> 1 file changed, 12 insertions(+)
Re
On Tue, 17 Mar 2020 15:50:39 -0400
Peter Xu wrote:
> VFIO is currently the only one left that is not using the generic
> function (kvm_irqchip_add_irqfd_notifier_gsi()) to register irqfds.
> Let VFIO use the common framework too.
>
> Follow up patches will introduce extra features for kvm irqfd,
This is majorly only for X86 because that's the only one that supports
split irqchip for now.
When the irqchip is split, we face a dilemma that KVM irqfd will be
enabled, however the slow irqchip is still running in the userspace.
It means that the resamplefd in the kernel irqfds won't take any
ef
On Mon, Mar 16, 2020 at 03:22:07PM +0100, Philippe Mathieu-Daudé wrote:
> On 3/16/20 3:16 PM, Alex Bennée wrote:
> >
> > Gerd Hoffmann writes:
> >
> > > Run "tail -f /var/tmp/*/qemu*console.raw" in another terminal
> > > to watch the install console.
> > >
> > > Signed-off-by: Gerd Hoffmann
>
On Tue, Mar 17, 2020 at 04:12:00PM -0600, Alex Williamson wrote:
> On Tue, 17 Mar 2020 17:41:08 -0400
> Peter Xu wrote:
>
> > On Tue, Mar 17, 2020 at 03:06:46PM -0600, Alex Williamson wrote:
> >
> > [...]
> >
> > > > diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
> > > > index 15747fe2c2..81a
On Mar 17, 2020, at 5:31 AM, Linus Walleij wrote:
>
> It was brought to my attention that this bug from 2018 was
> still unresolved: 32 bit emulators like QEMU were given
> 64 bit hashes when running 32 bit emulation on 64 bit systems.
>
> The personality(2) system call supports to let processes
On Tue, 17 Mar 2020 17:41:08 -0400
Peter Xu wrote:
> On Tue, Mar 17, 2020 at 03:06:46PM -0600, Alex Williamson wrote:
>
> [...]
>
> > > diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
> > > index 15747fe2c2..81a17cc2b8 100644
> > > --- a/hw/intc/ioapic.c
> > > +++ b/hw/intc/ioapic.c
> > > @@ -
On Mon, Mar 16, 2020 at 12:32:03PM +0200, Oksana Vohchana wrote:
> QEMUMachine writes some messages to the default logger.
> But it sometimes hard to read the output if we have requests to
> more than one VM.
> This patch adds a label to the logger in the debug mode.
>
> Signed-off-by: Oksana Vohc
On Tue, Mar 17, 2020 at 11:17 AM Cleber Rosa wrote:
>
> The newly introduced "boot linux" tests make use of Linux images that
> are larger than usual, and fall into what Avocado calls "vmimages",
> and can be referred to by name, version and architecture.
>
> The images can be downloaded automatic
On Tue, Mar 17, 2020 at 11:17 AM Cleber Rosa wrote:
>
> This acceptance test, validates that a full blown Linux guest can
> successfully boot in QEMU. In this specific case, the guest chosen is
> Fedora version 31.
>
> * x86_64, pc-i440fx and pc-q35 machine types, with TCG and KVM as
>accele
On Tue, Mar 17, 2020 at 03:06:46PM -0600, Alex Williamson wrote:
[...]
> > diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
> > index 15747fe2c2..81a17cc2b8 100644
> > --- a/hw/intc/ioapic.c
> > +++ b/hw/intc/ioapic.c
> > @@ -236,8 +236,29 @@ void ioapic_eoi_broadcast(int vector)
> > for
Please note: a new patch is in the works to extend the SCCB for the SCLP
response for RSCPI. This will help alleviate the issue of losing space
for CPU
entries. The appropriate patch will be introduced at the beginning of this
series once it is ready for upstream.
Thanks for your patience and
Signed-off-by: Markus Armbruster
Reviewed-by: Marc-André Lureau
Message-Id: <20200317115459.31821-21-arm...@redhat.com>
---
docs/devel/qapi-code-gen.txt| 4 +++-
tests/qapi-schema/doc-good.texi | 2 ++
qapi/introspect.json| 6 +-
scripts/qapi/expr.p
Unlike regular feature flags, the new special feature flag
"deprecated" is recognized by the QAPI generator. For now, it's only
permitted with commands, events, and struct members. It will be put
to use shortly.
Signed-off-by: Markus Armbruster
Message-Id: <20200317115459.31821-26-arm...@redhat
The value of @qmp_schema_qlit is generated from an expression tree.
Tree nodes are created in several places. Factor out the common code
into _make_tree(). This isn't much of a win now. It will pay off
when we add feature flags in the next few commits.
Signed-off-by: Markus Armbruster
Reviewed
QAPISchemaEntity calls doc.connect_feature() in .check(). Improper
since commit ee1e6a1f6c8 split .connect_doc() off .check(). Move the
call. Requires making the children call super().connect_doc() as they
should.
Signed-off-by: Markus Armbruster
Reviewed-by: Marc-André Lureau
Reviewed-by: Er
Move QAPISchemaAlternateType up some, so that all QAPISchemaFOOType
are together. Move QAPISchemaObjectTypeVariants right behind its
users.
Signed-off-by: Markus Armbruster
Reviewed-by: Marc-André Lureau
Message-Id: <20200317115459.31821-18-arm...@redhat.com>
---
scripts/qapi/schema.py | 284 +
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