The following changes since commit d649689a8ecb2e276cc20d3af6d416e3c299cb17:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2020-03-17 18:33:05 +0000) are available in the Git repository at: git://github.com/ehabkost/qemu.git tags/x86-and-machine-pull-request for you to fetch changes up to 3c6712eca07255803b61ca3d632f61a65c078c36: hw/i386: Rename apicid_from_topo_ids to x86_apicid_from_topo_ids (2020-03-17 19:48:10 -0400) ---------------------------------------------------------------- x86 and machine queue for 5.0 soft freeze Bug fixes: * memory encryption: Disable mem merge (Dr. David Alan Gilbert) Features: * New EPYC CPU definitions (Babu Moger) * Denventon-v2 CPU model (Tao Xu) * New 'note' field on versioned CPU models (Tao Xu) Cleanups: * x86 CPU topology cleanups (Babu Moger) * cpu: Use DeviceClass reset instead of a special CPUClass reset (Peter Maydell) ---------------------------------------------------------------- Babu Moger (7): hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs hw/i386: Introduce X86CPUTopoInfo to contain topology info hw/i386: Consolidate topology functions machine: Add SMP Sockets in CpuTopology hw/i386: Remove unnecessary initialization in x86_cpu_new hw/i386: Update structures to save the number of nodes per package hw/i386: Rename apicid_from_topo_ids to x86_apicid_from_topo_ids Dr. David Alan Gilbert (1): machine/memory encryption: Disable mem merge Moger, Babu (2): i386: Add missing cpu feature bits in EPYC model i386: Add 2nd Generation AMD EPYC processors Peter Maydell (1): cpu: Use DeviceClass reset instead of a special CPUClass reset Tao Xu (2): target/i386: Add Denverton-v2 (no MPX) CPU model target/i386: Add new property note to versioned CPU models hw/core/cpu.c | 19 +--- hw/core/machine.c | 9 ++ hw/i386/pc.c | 53 +++++---- hw/i386/x86.c | 51 +++++---- include/hw/boards.h | 2 + include/hw/core/cpu.h | 6 - include/hw/i386/topology.h | 113 +++++++++---------- include/hw/i386/x86.h | 3 + scripts/coccinelle/cpu-reset.cocci | 47 ++++++++ softmmu/vl.c | 1 + target/alpha/cpu-qom.h | 2 +- target/arm/cpu-qom.h | 2 +- target/arm/cpu.c | 8 +- target/cris/cpu-qom.h | 2 +- target/cris/cpu.c | 8 +- target/hppa/cpu-qom.h | 2 +- target/i386/cpu-qom.h | 2 +- target/i386/cpu.c | 174 +++++++++++++++++++++++++---- target/i386/cpu.h | 3 + target/lm32/cpu-qom.h | 2 +- target/lm32/cpu.c | 8 +- target/m68k/cpu-qom.h | 2 +- target/m68k/cpu.c | 8 +- target/microblaze/cpu-qom.h | 2 +- target/microblaze/cpu.c | 8 +- target/mips/cpu-qom.h | 2 +- target/mips/cpu.c | 8 +- target/moxie/cpu.c | 7 +- target/moxie/cpu.h | 2 +- target/nios2/cpu.c | 8 +- target/nios2/cpu.h | 2 +- target/openrisc/cpu.c | 8 +- target/openrisc/cpu.h | 2 +- target/ppc/cpu-qom.h | 2 +- target/ppc/translate_init.inc.c | 8 +- target/riscv/cpu.c | 7 +- target/riscv/cpu.h | 2 +- target/s390x/cpu-qom.h | 2 +- target/s390x/cpu.c | 8 +- target/sh4/cpu-qom.h | 2 +- target/sh4/cpu.c | 8 +- target/sparc/cpu-qom.h | 2 +- target/sparc/cpu.c | 8 +- target/tilegx/cpu.c | 7 +- target/tilegx/cpu.h | 2 +- target/tricore/cpu-qom.h | 2 +- target/tricore/cpu.c | 7 +- target/xtensa/cpu-qom.h | 2 +- target/xtensa/cpu.c | 8 +- tests/test-x86-cpuid.c | 116 +++++++++++-------- 50 files changed, 490 insertions(+), 279 deletions(-) create mode 100644 scripts/coccinelle/cpu-reset.cocci -- 2.24.1
