[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1010484
Title:
slirp to ac
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1809453
Title:
Windows qe
Qemu as server currently won't accept export names larger than 256
bytes, so most uses of qemu as client have no reason to get anywhere
near the NBD spec maximum of a 4k limit per string. However, we
didn't actually have any code that prevented the client from violating
the protocol, which, while
Patchew URL:
https://patchew.org/QEMU/1569590461-12562-1-git-send-email-mjros...@linux.ibm.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#
Patchew URL:
https://patchew.org/QEMU/20190927134224.14550-1-marcandre.lur...@redhat.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT B
Patchew URL:
https://patchew.org/QEMU/20190927134224.14550-1-marcandre.lur...@redhat.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/
On Fri, Sep 27, 2019 at 03:33:20PM +0200, Igor Mammedov wrote:
> On Thu, 26 Sep 2019 07:52:35 +0800
> Peter Xu wrote:
>
> > On Wed, Sep 25, 2019 at 01:51:05PM +0200, Igor Mammedov wrote:
> > > On Wed, 25 Sep 2019 11:27:00 +0800
> > > Peter Xu wrote:
> > >
> > > > On Tue, Sep 24, 2019 at 10:47
Patchew URL: https://patchew.org/QEMU/20190927090453.24712-1-laur...@vivier.eu/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190927090453.24712-1-laur...@vivier.eu
Subject: [PATCH v13 0/9] hw/m68k: add Apple Machint
On 9/27/19 8:23 AM, Vladimir Sementsov-Ogievskiy wrote:
> Hi all!
>
> Bitmaps reopening is buggy, reopening-rw just not working at all and
> reopening-ro may lead to producing broken incremental
> backup if we do temporary snapshot in a meantime.
>
> v5:
> 01: - add Max's r-b
> - fix s/QSI
On 9/23/19 9:09 AM, Max Reitz wrote:
> On 18.09.19 01:45, John Snow wrote:
>> verify_platform will check an explicit whitelist and blacklist instead.
>> The default will now be assumed to be allowed to run anywhere.
>>
>> For tests that do not specify their platforms explicitly, this has the
>>
On 9/27/19 8:23 AM, Vladimir Sementsov-Ogievskiy wrote:
> Hi all!
>
> Bitmaps reopening is buggy, reopening-rw just not working at all and
> reopening-ro may lead to producing broken incremental
> backup if we do temporary snapshot in a meantime.
>
> v5:
> 01: - add Max's r-b
> - fix s/QSI
On Thu, Sep 26, 2019 at 10:42 AM Philippe Mathieu-Daudé wrote:
>
> Map the thermal sensor in the BCM2835 block.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/arm/bcm2835_peripherals.c | 13 +
> include/hw/arm/bcm2835_periphera
On Wed, Sep 25, 2019 at 2:00 AM Markus Armbruster wrote:
>
> Alistair Francis writes:
>
> > On Mon, Sep 23, 2019 at 2:46 PM Peter Maydell
> > wrote:
> >>
> >> On Fri, 20 Sep 2019 at 23:23, Alistair Francis
> >> wrote:
> >> > On Thu, Sep 19, 2019 at 10:15 PM Bin Meng wrote:
> >> > > I don't t
On Thu, Sep 26, 2019 at 10:44 AM Philippe Mathieu-Daudé
wrote:
>
> Base addresses and sizes taken from the "BCM2835 ARM Peripherals"
> datasheet from February 06 2012:
> https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
>
> Reviewed-by: Peter Maydell
> Signed-off-by: Ph
On Wed, Jun 19, 2019 at 3:50 AM Palmer Dabbelt wrote:
>
> On Mon, 17 Jun 2019 15:38:45 PDT (-0700), richard.hender...@linaro.org wrote:
> > On 6/14/19 10:11 AM, Alex Bennée wrote:
> >> +++ b/target/riscv/translate.c
> >> @@ -793,7 +793,7 @@ static void riscv_tr_translate_insn(DisasContextBase
> >
On Fri, Sep 27, 2019 at 12:57 AM Bin Meng wrote:
>
> On Fri, Sep 27, 2019 at 8:52 AM Alistair Francis
> wrote:
> >
> > On reset only a single L2 cache way is enabled, the others are exposed
> > as memory that can be used by early boot firmware. This L2 region is
> > generally disabled using the W
On Thu, Sep 26, 2019 at 10:36 AM Philippe Mathieu-Daudé wrote:
>
> Various address spaces from the BCM2835 are reported as
> 'anonymous' in memory tree:
>
> (qemu) info mtree
>
> address-space: anonymous
> -008f (prio 0, i/o): bcm2835-mbox
> 00
On Thu, Sep 26, 2019 at 10:40 AM Philippe Mathieu-Daudé wrote:
>
> The UART1 is part of the AUX peripheral,
> the PCM_CLOCK (yet unimplemented) is part of the CPRMAN.
>
> Reviewed-by: Peter Maydell
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> I dunno
On Thu, Sep 26, 2019 at 10:40 AM Philippe Mathieu-Daudé wrote:
>
> Various logging improvements as once:
> - Use 0x prefix for hex numbers
> - Display value written during write accesses
> - Move some logs from GUEST_ERROR to UNIMP
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair
On Thu, Sep 26, 2019 at 10:36 AM Philippe Mathieu-Daudé wrote:
>
> IEC binary prefixes ease code review: the unit is explicit.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/arm/raspi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Patchew URL:
https://patchew.org/QEMU/20190927062302.110144-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190927062302.110144-1-ys...@users.sourceforge.jp
Subject: [PATCH v25 00/22] Add
On Fri, Sep 27, 2019 at 10:53 AM Richard Henderson
wrote:
>
> On 9/27/19 10:23 AM, Alistair Francis wrote:
> >> I'm curious about the motivation here.
> >>
> >> In particular, what difference does it make what cpu the TB is generated
> >> for?
> >> It would seem like the more relevant place to lo
Adding a ditto to this.
== Command and output ==
$ qemu-system-x86_64 -m 2G -hda mydisk.vdi -accel hvf -vga std
qemu-system-x86_64: warning: host doesn't support requested feature:
CPUID.8001H:ECX.svm [bit 2]
Unimplemented handler (7fe3aac905e8) for 0 (f 11)
This is for a customized Ubuntu
El mié., 4 sept. 2019 a las 19:13, Philippe Mathieu-Daudé ()
escribió:
> Various logging improvements as once:
> - Use 0x prefix for hex numbers
> - Display value written during write accesses
> - Move some logs from GUEST_ERROR to UNIMP
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> v2: Use P
Searching this property in the kernel, I found a lot of properties not
implemented.
https://github.com/raspberrypi/linux/blob/rpi-4.19.y/include/soc/bcm2835/raspberrypi-firmware.h#L41
Are the properties only added when they are necessaries for the standard
kernel use?
Reviewed-by: EstebanB
El mié
I checked with qemu-system-i386 --version and it reports version 3.1.0
I installed via sudo apt-get install qemu, does this mean I will have to
compile qemu 4.1 for the raspberry or is the a binary somewhere I can
install?
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d
Patchew URL: https://patchew.org/QEMU/20190927045838.2968-1-qi1.zh...@intel.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190927045838.2968-1-qi1.zh...@intel.com
Subject: [PATCH V2] intel_iommu: TM field should
On 9/27/19 8:23 AM, Vladimir Sementsov-Ogievskiy wrote:
> Reopening bitmaps to RW was broken prior to previous commit. Check that
> it works now.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> tests/qemu-iotests/165 | 57 --
> tests/qemu-iotest
On 9/27/19 10:17 AM, Cleber Rosa wrote:
> Signed-off-by: Cleber Rosa
> ---
> tests/qemu-iotests/044 | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/tests/qemu-iotests/044 b/tests/qemu-iotests/044
> index eb42df0fe1..0ca4bcfc6d 100755
> --- a/tests/qemu-iotests/044
> +++ b/tests/qemu-i
On 9/27/19 10:17 AM, Cleber Rosa wrote:
> Signed-off-by: Cleber Rosa
Reviewed-by: John Snow
On 18/09/19 09:23, Tao Xu wrote:
> +} else if (function == 7 && index == 0 && reg == R_ECX) {
> +if (enable_cpu_pm) {
> +ret |= CPUID_7_0_ECX_WAITPKG;
> +}
This should be the opposite; remove the bit if enable_cpu_pm is not set.
Paolo
On 18/09/19 12:07, Dmitry Poletaev wrote:
> There is a problem, that you don't have access to the data using
> cpu_memory_rw_debug() function when in SMM. You can't remotely debug SMM mode
> program because of that for example.
> Likely attrs version of get_phys_page_debug should be used to get c
On 24/09/19 23:31, Alex Williamson wrote:
> On Tue, 24 Sep 2019 10:25:15 +0200
> Eric Auger wrote:
>
>> This series allows the memory_region_register_iommu_notifier()
>> to fail. As of now, when a MAP notifier is attempted to be
>> registered along with SMMUv3 or AMD IOMMU, we exit in the IOMMU
>
Which version of QEMU are you using? If it's anything older than 4.1,
please update to 4.1. There was a bug in QEMU somewhen between 2.12 and
4.0 which looks like the one you reported.
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h
All but one caller passes ILEN_UNWIND, which is not stored.
For the one use case in s390_cpu_tlb_fill, set int_pgm_ilen
directly, simply to avoid the assert within do_program_interrupt.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/internal.h| 2 +-
target
The single caller passes ILEN_UNWIND; pass that along to
trigger_pgm_exception directly.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/mmu_helper.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/s390x/mmu_helper.c b/target/s39
We currently set ilen to AUTO, then overwrite that during
unwinding, then overwrite that for the code access case.
This can be simplified to setting ilen to our arbitrary
value for the (undefined) code access case, then rely on
unwinding to overwrite that with the correct value for
the data access
27 сент. 2019 г. 21:59 пользователь John Snow написал:
On 9/27/19 3:52 AM, Vladimir Sementsov-Ogievskiy wrote:
> 27.09.2019 2:21, John Snow wrote:
>>
>>
>> On 8/7/19 10:12 AM, Vladimir Sementsov-Ogievskiy wrote:
>>> - Correct check for write access to file child, and in correct place
>>>(o
On 9/26/19 1:44 PM, Mark Cave-Ayland wrote:
> This allows us to remove more endian-specific defines from int_helper.c.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> target/ppc/int_helper.c | 72 ++---
> 1 file changed, 25 insertions(+), 47 deletions(-)
Reviewed
We currently call trigger_pgm_exception to set cs->exception_index
and env->int_pgm_code and then read the values back and then
reset cs->exception_index so that the exception is not delivered.
Instead, use the exception type that we already have directly
without ever triggering an exception that
27 сент. 2019 г. 21:30 пользователь John Snow написал:
On 9/27/19 6:29 AM, Vladimir Sementsov-Ogievskiy wrote:
> 27.09.2019 10:28, Vladimir Sementsov-Ogievskiy wrote:
>> 27.09.2019 1:57, John Snow wrote:
>>>
>>>
>>> On 8/7/19 10:12 AM, Vladimir Sementsov-Ogievskiy wrote:
Reopening bitmaps
Do not raise the exception directly within translate_pages,
but pass it back so that caller may do so.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/mmu_helper.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/
Reviewed-by: Esteban
El mié., 4 sept. 2019 a las 19:13, Philippe Mathieu-Daudé ()
escribió:
> IEC binary prefixes ease code review: the unit is explicit.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/arm/raspi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a
Now that mmu_translate_asce returns the exception instead of
raising it, the argument is unused.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/mmu_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/s390x/mmu_helper.c b/targ
This setting is no longer used.
Signed-off-by: Richard Henderson
---
target/s390x/cpu.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 686cbe41e0..fe1bf746f3 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -803,8 +803,6 @@ int cpu_s
This is no longer used, and many of the existing uses -- particularly
within hw/s390x -- seem questionable.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/cpu.h | 3 +-
hw/s390x/s390-pci-inst.c | 58 ++--
target/s3
Do not raise the exception directly within mmu_translate,
but pass it back so that caller may do so.
Signed-off-by: Richard Henderson
---
target/s390x/internal.h| 2 +-
target/s390x/excp_helper.c | 4 ++--
target/s390x/mem_helper.c | 13 +++---
target/s390x/mmu_helper.c | 49
This setting is no longer used.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/cpu.h | 2 --
target/s390x/excp_helper.c | 3 ---
2 files changed, 5 deletions(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 67126acc99..686cbe41e0 100644
--
Replace all uses of s390_program_interrupt within files
that are marked CONFIG_TCG. These are necessarily tcg-only.
This lets each of these users benefit from the QEMU_NORETURN
attribute on tcg_s390_program_interrupt.
Acked-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s39
From: Richard Henderson
Use ILEN_UNWIND to signal that we have in fact that cpu_restore_state
will have been called by the time we arrive in do_program_interrupt.
Signed-off-by: Richard Henderson
---
target/s390x/cpu.h | 4 +++-
target/s390x/interrupt.c | 5 -
target/s390x/translat
For TCG, we will always call s390_cpu_virt_mem_handle_exc,
which will go through the unwinder to set ILEN. For KVM,
we do not go through do_program_interrupt, so this argument
is unused.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/mmu_helper.c | 2 +-
1 fil
As a step toward moving all excption handling out of mmu_translate,
copy handling of the LowCore tec value from trigger_access_exception
into s390_cpu_tlb_fill. So far this new plumbing isn't used.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/excp_helper.c |
Do not raise the exception directly within mmu_translate_real,
but pass it back so that caller may do so.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/internal.h| 2 +-
target/s390x/excp_helper.c | 4 ++--
target/s390x/mmu_helper.c | 15 ++-
Now that excp always contains a real exception number, we can
use that instead of a separate fail variable. This allows a
redundant test to be removed.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/excp_helper.c | 19 +++
1 file changed, 7 ins
Delay triggering an exception until the end, after we have
determined ultimate success or failure, and also taken into
account whether this is a non-faulting probe.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/excp_helper.c | 9 +++--
1 file changed, 7 in
Since we begin the operation with an unwind, we have the proper
value of ilen immediately available.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/tcg_s390x.h | 4 ++--
target/s390x/excp_helper.c | 8
target/s390x/interrupt.c | 2 +-
target/s390x/
Based-on: <20190925125236.4043-1-da...@redhat.com> \
("s390x/mmu: DAT translation rewrite")
Based-on: <20190926101627.23376-1-da...@redhat.com> \
("s390x/mmu: Implement more facilities") \
With the suggested follow-up for patch 2 re ilen.
Which should mean that this applies on top of Davi
On 9/27/19 3:52 AM, Vladimir Sementsov-Ogievskiy wrote:
> 27.09.2019 2:21, John Snow wrote:
>>
>>
>> On 8/7/19 10:12 AM, Vladimir Sementsov-Ogievskiy wrote:
>>> - Correct check for write access to file child, and in correct place
>>>(only if we want to write).
>>> - Support reopen rw -> rw (
On 9/27/19 6:29 AM, Vladimir Sementsov-Ogievskiy wrote:
> 27.09.2019 10:28, Vladimir Sementsov-Ogievskiy wrote:
>> 27.09.2019 1:57, John Snow wrote:
>>>
>>>
>>> On 8/7/19 10:12 AM, Vladimir Sementsov-Ogievskiy wrote:
Reopening bitmaps to RW was broken prior to previous commit. Check that
>>
On 9/27/19 3:23 AM, David Hildenbrand wrote:
>> +pc = env->psw.addr;
>> +if (!(flags & FLAG_MASK_64)) {
>> +pc &= 0x7fff;
>> +}
>
> If you're fancy, you could also add 24-bit addressing mode wrapping.
>
> Maybe unlikely(!(flags & FLAG_MASK_64)), but not sure how big the ga
On 9/27/19 2:58 AM, David Hildenbrand wrote:
> A non-recursive implementation allows to make better use of the
> branch predictor, avoids function calls, and makes the implementation of
> new features only for a subset of region table levels easier.
>
> We can now directly compare our implementati
On 9/27/19 2:58 AM, David Hildenbrand wrote:
> Let's use consitent names for the region/section/page table entries and
> for the macros to extract relevant parts from virtual address. Make them
> match the definitions in the PoP - e.g., how the relevant bits are actually
> called.
>
> Introduce de
On 9/27/19 2:58 AM, David Hildenbrand wrote:
> Let's document how it works and inject PGM_ADDRESSING if reading of
> table entries fails.
>
> Reviewed-by: Thomas Huth
> Signed-off-by: David Hildenbrand
Typo in the subject: "bogus". Otherwise,
Reviewed-by: Richard Henderson
r~
On 9/26/19 5:45 PM, Alistair Francis wrote:
> Signed-off-by: Alistair Francis
> ---
> target/riscv/translate.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index adeddb85f6..537af0003e 100644
> --- a/target/riscv/translate.
Patchew URL: https://patchew.org/QEMU/20190925110639.100699-1-sam...@google.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190925110639.100699-1-sam...@google.com
Subject: [PATCH v7 0/8] Add Qemu to SeaBIOS LCHS
On 9/27/19 4:37 AM, Vladimir Sementsov-Ogievskiy wrote:
> 26.09.2019 22:01, John Snow wrote:
>>
>>
>> On 9/20/19 4:25 AM, Vladimir Sementsov-Ogievskiy wrote:
>>> Hi all!
>>>
>>> We need to lock qcow2 mutex on accessing in-image metadata, especially
>>> on updating this metadata. Let's implement
On 9/27/19 10:23 AM, Alistair Francis wrote:
>> I'm curious about the motivation here.
>>
>> In particular, what difference does it make what cpu the TB is generated for?
>> It would seem like the more relevant place to look for this is with -d cpu or
>> -d exec where the TB is actually executed, w
On Fri, Sep 27, 2019 at 10:26:27AM -0500, Eric Blake wrote:
> On 9/27/19 5:11 AM, Daniel P. Berrangé wrote:
> > Some distros are now defaulting to LUKS version 2 which QEMU cannot
> > process. For our I/O test that validates interoperability between the
> > kernel/cryptsetup and QEMU, we need to ex
On 9/27/19 9:17 AM, Cleber Rosa wrote:
Signed-off-by: Cleber Rosa
---
tests/qemu-iotests/044 | 1 -
1 file changed, 1 deletion(-)
diff --git a/tests/qemu-iotests/044 b/tests/qemu-iotests/044
index eb42df0fe1..0ca4bcfc6d 100755
--- a/tests/qemu-iotests/044
+++ b/tests/qemu-iotests/044
@@ -34,
On 9/27/19 9:17 AM, Cleber Rosa wrote:
Signed-off-by: Cleber Rosa
---
tests/qemu-iotests/044 | 3 ---
1 file changed, 3 deletions(-)
It's useful when there is nothing else, but here we definitely have
something else.
Reviewed-by: Eric Blake
diff --git a/tests/qemu-iotests/044 b/tests
On 9/27/19 4:02 AM, David Hildenbrand wrote:
> On 26.09.19 18:26, Richard Henderson wrote:
>> We currently set ilen to AUTO, then overwrite that during
>> unwinding, then overwrite that for the code access case.
>>
>> This can be simplified to setting ilen to our arbitrary
>> value for the (undefin
On 9/27/19 3:01 AM, Peter Maydell wrote:
> (2) call the device's callback function directly when the
> ptimer triggers from the QEMU timer expiry. But for
> the case of "a call to ptimer_set_count() etc caused
> the timer to trigger", don't call the callback, instead
> return a
On Fri, 2019-09-27 at 11:15 +0100, Daniel P. Berrangé wrote:
> On Thu, Sep 26, 2019 at 12:35:15AM +0300, Maxim Levitsky wrote:
> > * rename the write_func to create_write_func,
> > and init_func to create_init_func
> > this is preparation for other write_func that will
> > be used to update
On Fri, Sep 27, 2019 at 2:10 AM Philippe Mathieu-Daudé
wrote:
>
> On 9/27/19 2:45 AM, Alistair Francis wrote:
> > Signed-off-by: Alistair Francis
> > ---
> > target/riscv/translate.c | 7 +++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/target/riscv/translate.c b/target/riscv/tra
Hi; I just saw this iotest failure (on an s390x box, as it happens):
TESTiotest-qcow2: 130 [fail]
QEMU --
"/home/linux1/qemu/build/all/tests/qemu-iotests/../../s390x-softmmu/qemu-system-s390x"
-nodefaults -display none -machine accel=qtest
QEMU_IMG -- "/home/linux1/qemu/build/a
On Fri, Sep 27, 2019 at 10:18 AM Richard Henderson
wrote:
>
> On 9/26/19 5:45 PM, Alistair Francis wrote:
> > Signed-off-by: Alistair Francis
> > ---
> > target/riscv/translate.c | 7 +++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/target/riscv/translate.c b/target/riscv/transla
On Thu, 26 Sep 2019 at 19:35, Alex Bennée wrote:
>
> The following changes since commit eb13d1cf4a0478fc29f80abfbac8209479325f35:
>
> Merge remote-tracking branch
> 'remotes/dgilbert/tags/pull-migration-20190925a' into staging (2019-09-26
> 14:23:58 +0100)
>
> are available in the Git reposito
On 9/27/19 8:46 AM, Markus Armbruster wrote:
check_if()'s errors don't point to the offending part of the
expression. For instance:
tests/qapi-schema/alternate-branch-if-invalid.json:2: 'if' condition ' '
makes no sense
Other check_FOO() do, with the help of a @source argument. Make
che
On 9/27/19 5:11 AM, Daniel P. Berrangé wrote:
Some distros are now defaulting to LUKS version 2 which QEMU cannot
process. For our I/O test that validates interoperability between the
kernel/cryptsetup and QEMU, we need to explicitly ask for version 1
of the LUKS format.
Ultimately, it would b
On Thu, 26 Sep 2019 10:56:46 +1000
David Gibson wrote:
> On Wed, Sep 25, 2019 at 10:55:35AM +0200, Cédric Le Goater wrote:
> > On 25/09/2019 10:40, Greg Kurz wrote:
> > > On Wed, 25 Sep 2019 16:45:20 +1000
> > > David Gibson wrote:
> > >
> > >> We create a subtype of TYPE_ICS specifically for s
On 9/27/19 9:17 AM, Cleber Rosa wrote:
Should not be necessary on files that are not executed standalone.
Signed-off-by: Cleber Rosa
---
tests/qemu-iotests/common.config | 3 ---
tests/qemu-iotests/common.filter | 3 ---
tests/qemu-iotests/common.rc | 3 ---
3 files changed, 9 deletion
On Wed, 11 Sep 2019 at 15:07, Alistair wrote:
>
> On Wed, Sep 11, 2019, at 11:49 AM, Peter Maydell wrote:
> > On Fri, 6 Sep 2019 at 07:10, Alistair Francis
> > wrote:
> > > Now that the Arm-M4 CPU has been added to QEMU we can add the Netduino
> > > Plus 2 machine. This is very similar to the ST
On 27.09.19 18:39, Peter Maydell wrote:
> Hi; I just saw this iotest failure (on an s390x box, as it happens):
>
> TESTiotest-qcow2: 130 [fail]
> QEMU --
> "/home/linux1/qemu/build/all/tests/qemu-iotests/../../s390x-softmmu/qemu-system-s390x"
> -nodefaults -display none -machine acc
On Fri, 27 Sep 2019 15:50:22 +1000
David Gibson wrote:
> Both XICS and XIVE have routines to connect and disconnect KVM with similar
> but not identical signatures. This adjusts them to match exactly, which
Maybe mention this includes a return value to be able to streamline error
reporting.
>
On 9/27/19 8:46 AM, Markus Armbruster wrote:
Many error messages refer to the offending definition even though
they're preceded by an "in definition" line. Rephrase them.
Signed-off-by: Markus Armbruster
---
Comparing to v1 shows that you did indeed improve a few more messages.
Reviewed-by:
On Fri, Sep 06, 2019 at 04:31:49PM +0800, Xiang Zheng wrote:
> From: Dongjiu Geng
>
> This patch implements APEI GHES Table generation via fw_cfg blobs. Now
> it only supports ARMv8 SEA, a type of GHESv2 error source. Afterwards,
> we can extend the supported types if needed. For the CPER section
On 9/27/19 9:17 AM, Cleber Rosa wrote:
Due to not being able to find a reason to have shebangs on files that
are not executable.
Signed-off-by: Cleber Rosa
---
tests/qemu-iotests/common.config | 2 --
tests/qemu-iotests/common.filter | 2 --
tests/qemu-iotests/common.nbd | 1 -
tests
From: Alex Bennée
We already use semihosting for the system stuff so this is a simple
smoke test to ensure we are working OK on linux-user.
Signed-off-by: Alex Bennée
Message-id: 20190913151845.12582-7-alex.ben...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
tests/t
On Fri, 2019-09-27 at 10:26 -0500, Eric Blake wrote:
> On 9/27/19 5:11 AM, Daniel P. Berrangé wrote:
> > Some distros are now defaulting to LUKS version 2 which QEMU cannot
> > process. For our I/O test that validates interoperability between the
> > kernel/cryptsetup and QEMU, we need to explicitl
On 9/27/19 3:36 PM, Peter Maydell wrote:
> On Fri, 27 Sep 2019 at 14:26, Guenter Roeck wrote:
>>
>> On Fri, Sep 27, 2019 at 02:54:10PM +0200, bzt wrote:
>>> Hi,
>>>
>>> On 9/26/19, Philippe Mathieu-Daudé wrote:
Currently we are limited to use the first serial console available.
>>>
>>> I'm n
From: Alex Bennée
These were missed in the recent de-tangling so have been updated to be
more actuate. I've also built up ARM_TESTS in a manner similar to
AARCH64_TESTS for better consistency.
Signed-off-by: Alex Bennée
Reviewed-by: Peter Maydell
Message-id: 20190913151845.12582-2-alex.ben...@
From: Alex Bennée
We do this for other semihosting calls so we might as well do it for
M-profile as well.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id: 20190913151845.12582-3-alex.ben...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/ar
On 26.09.19 16:10, Matthew Rosato wrote:
> The fix in dbe9cf606c shrinks the IOMMU memory region to a size
> that seems reasonable on the surface, however is actually too
> small as it is based against a 0-mapped address space. This
> causes breakage with small guests as they can overrun the IO
From: Luc Michel
For AArch64 CPUs with a CBAR register, we have two views for it:
- in AArch64 state, the CBAR_EL1 register (S3_1_C15_C3_0), returns the
full 64 bits CBAR value
- in AArch32 state, the CBAR register (cp15, opc1=1, CRn=15, CRm=3, opc2=0)
returns a 32 bits view such that
On 9/27/19 3:44 AM, David Hildenbrand wrote:
> Note that
>
> [PATCH v1 2/5] s390x/mmu: Implement ESOP-2 and
> access-exception-fetch/store-indication facility
>
> also messes with the tec (which is okay), but also with the ILEN on
> instruction fetches.
Yes, I saw that minor conflict. Easy to f
On Fri, 27 Sep 2019 15:50:20 +1000
David Gibson wrote:
> This method depends only on the active irq controller. Now that we've
> formalized the notion of active controller we can dispatch directly
> through that, rather than dispatching via SpaprIrq with the dual
> version having to do a second
On Wed, 25 Sep 2019 at 19:45, Richard Henderson
wrote:
>
> This is v4 of my notdirty + rom patch set with two suggested name
> changes (qemu_build_not_reached, TLB_DISCARD_WRITE) from David and Alex.
>
>
> r~
>
>
> The following changes since commit 240ab11fb72049d6373cbbec8d788f8e411a00bc:
>
>
6 16:14:03 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20190927
for you to fetch changes up to e4e34855e658b78ecac50a651cc847662ff02cfd:
hw/arm/boot: Use the IEC binary prefix definitions (2019-09-27 11:4
On 27.09.19 15:33, Claudio Imbrenda wrote:
> From: Janosch Frank
>
> Requests over 4k are not a spec exception.
>
> Signed-off-by: Janosch Frank
> Reviewed-by: Jason J. Herne
> ---
> hw/s390x/sclp.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/hw/s390x/sclp.c b/
From: Philippe Mathieu-Daudé
IEC binary prefixes ease code review: the unit is explicit.
Reviewed-by: Richard Henderson
Reviewed-by: Stefano Garzarella
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20190923131108.21459-1-phi...@redhat.com
Signed-off-by: Peter May
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