Looking through old bug tickets... can you still reproduce these issues
with the latest version of QEMU?
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/
On Fri, Mar 15, 2019 at 4:54 AM Markus Armbruster wrote:
>
> Cleaned up with scripts/clean-header-guards.pl.
>
> Signed-off-by: Markus Armbruster
For the RISC-V part:
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/ide/ahci_internal.h | 2 +-
> include/block/aio-wait.h
On Fri, Mar 15, 2019 at 7:16 AM Markus Armbruster wrote:
>
> Philippe Mathieu-Daudé writes:
>
> > On 3/15/19 3:51 PM, Markus Armbruster wrote:
> >> Leading underscores are ill-advised because such identifiers are
> >> reserved. Trailing underscores are merely ugly. Strip both.
> >>
> >> Our hea
On Fri, Mar 15, 2019 at 6:17 AM Philippe Mathieu-Daudé
wrote:
>
> On 3/15/19 3:51 PM, Markus Armbruster wrote:
> > Reuse of the same guard symbol in multiple headers is okay as long as
> > they cannot be included together. scripts/clean-header-guards.pl
> > can't tell, so it warns.
> >
> > Since
On Thu, Mar 21, 2019 at 11:49 PM Peter Maydell wrote:
>
> Alex and I just noticed that we didn't pick up this
> MAINTAINERS patch for the "Device Tree" section.
> In the interim Peter Crosthwaite has also removed himself
> from maintainership, so by default this will move into
> the "Orphan" state
On 22/03/2019 17.30, Andrew Jones wrote:
> In the kconfig shuffle arm lost pci-testdev which is used by
> kvm-unit-tests. Let's add it back.
... the other architectures use "imply TEST_DEVICES" in the Kconfig
files, but since the Kconfig-for-arm patches have not included before
the hard-freeze, yo
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1812694
Title:
qemu-system
> On Friday, March 22, 2019, 11:01:34 PM GMT+9, Luc Michel
wrote: > Lucien: do you plan to send a re-roll?
Otherwise I'll do it on next
> Monday (25/03) because I would like this bug to be fixed before it hits 4.0.
I am on assignment in China which is why I havent gotten to it, I will att
Public bug reported:
I'm using qemu-user-arm for crosscompilation needs, usually via a wrapper.
qemu-user-arm (4.0.0-rc0) crashes with SIGILL on at least 2 instructions:
first case (sadly I don't have more data handy, can reproduce at a later time
if needed):
(gdb) x/i $pc
=> 0xfffce314: vseleq
The second word has been loaded from the unincremented
address since the first commit.
Fixes: 44ac14b06fa
Reported-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/tar
- Original Message -
> From: "Laszlo Ersek"
> To: "Paolo Bonzini" , qemu-devel@nongnu.org
> Cc: th...@redhat.com
> Sent: Thursday, March 21, 2019 8:34:46 PM
> Subject: Re: [PATCH] virtio-vga: only enable for specific boards
>
> On 03/21/19 15:29, Paolo Bonzini wrote:
> > When virtio-vg
On 3/22/19 4:02 PM, no-re...@patchew.org wrote:
Patchew URL:
https://patchew.org/QEMU/20190322175241.5954-1-danielhb...@gmail.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can pro
From: Kito Cheng
Before falling back to softfloat FMA, we do not restore the original
values of inputs A and C. Fix it.
This bug was caught by running gcc's testsuite on RISC-V qemu.
Note that this change gives a small perf increase for fp-bench:
Host: Intel(R) Core(TM) i7-4790K CPU @ 4.00GH
On 3/22/19 3:22 PM, Nir Soffer wrote:
> Thanks for fixing this! This will be a very important performance fix for
> importing
> VMs.
>
> The change description sounds good to me.
>
> Can you make these patches available on some git repo to make it easy to
> test?
Based on commit titles, this br
On Fri, Mar 22, 2019 at 3:22 PM Kevin Wolf wrote:
> If qemu-img convert sees that the target image isn't zero-initialised
> yet, it tries to do an efficient zero write for the whole image first
> to save the overhead of repeated explicit zero writes during the
> conversion. Obviously, this provid
On Sat, Mar 23, 2019 at 01:39:26 +0800, Kito Cheng wrote:
> hardfloat fused multiply-add might fallback to softfloat mode in some
> situation, but it might already changed the value of input operands,
> so we must restore those value before fallback.
>
> This bug is catched by running gcc testsuit
Don't announce that exit simcall has been invoked: this is just noise.
Signed-off-by: Max Filippov
---
target/xtensa/xtensa-semi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c
index 2f762162768c..5f5ce4f344c6 100644
--- a/target/xte
Drop test_fail: we know that exit simcall works. Now that it's not run
automatically there's no point in keeping it.
Drop test_pipeline: we're not modeling pipeline, we don't control ccount
and there's no plan to do so.
Enable test_boolean: it won't break on cores without boolean option, it
will do
Add SPDX license identifier to clarify the license of files without
explicit license header.
Signed-off-by: Marc-André Lureau
Reviewed-by: Thomas Huth
---
slirp/src/bootp.h | 1 +
slirp/src/ip6.h| 1 +
slirp/src/ip6_icmp.h | 1 +
slirp/src/libslirp.h | 1 +
slirp/src/slirp.h
Add SPDX license identifier to clarify the license of files with
explicit MIT license header.
Signed-off-by: Marc-André Lureau
Reviewed-by: Thomas Huth
---
slirp/src/util.h | 1 +
slirp/src/arp_table.c | 1 +
slirp/src/bootp.c | 1 +
slirp/src/dnssearch.c | 1 +
slirp/src/slirp.c |
According to commit 2f5f89963186d42a7ded253bc6cf5b32abb45cec ("Remove
the advertising clause from the slirp license"), Danny Gasparovski
gave permission to license slirp code under 3-clause BSD license:
Subject: RE: Slirp license
Date: Thu, 8 Jan 2009 10:51:00 +1100
From: "Gasparovski,
The following changes since commit d97a39d903fe33c45be83ac6943a2f82a3649a11:
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request'
into staging (2019-03-22 09:37:38 +)
are available in the Git repository at:
https://github.com/elmarco/qemu.git tags/slirp-pull-reques
On Thu, Mar 21, 2019 at 11:09 PM Roger Pau Monné wrote:
>
> On Wed, Mar 20, 2019 at 01:28:47PM -0400, Jason Andryuk wrote:
> > On Fri, Mar 15, 2019 at 12:28 PM Andrew Cooper
> > wrote:
> > >
> > > On 15/03/2019 09:17, Paul Durrant wrote:
> > > >> -Original Message-
> > > >> From: Jason An
Add SPDX license identifier to clarify the license of files with
reference to BSD license from slirp COPYRIGHT file.
Signed-off-by: Marc-André Lureau
Reviewed-by: Thomas Huth
---
slirp/src/debug.h | 1 +
slirp/src/if.h | 1 +
slirp/src/main.h | 1 +
slirp/src/misc.h | 1 +
slirp/src/sb
Add SPDX license identifier to clarify the license of files with
explicit 3-clause BSD license header.
Signed-off-by: Marc-André Lureau
Reviewed-by: Thomas Huth
---
slirp/src/dhcpv6.h | 1 +
slirp/src/ip.h | 1 +
slirp/src/ip_icmp.h| 1 +
slirp/src/mbuf.h | 1 +
slirp/src/
In order to make slirp a standalone project, the project must have a
clear license, and be compatible with the GPL or LGPL.
Since commit 2f5f89963186d42a7ded253bc6cf5b32abb45cec ("Remove the
advertising clause from the slirp license"), slirp is BSD-3. But new
files have been added under slirp/ wit
The slirp COPYRIGHT file is a BSD-3 license. Instead of referring to
another project file, the SPDX license notice present in all source
files states that unequivocally.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
---
slirp/src/debug.h | 3 ---
slirp/src/if.h | 3 ---
slirp has been maintained by the QEMU maintainers and will be
maintained under an independent project soon.
Reviewed-by: Eric Blake
Signed-off-by: Kelly Price
Signed-off-by: Marc-André Lureau
---
slirp/COPYRIGHT | 2 --
1 file changed, 2 deletions(-)
diff --git a/slirp/COPYRIGHT b/slirp/COPYR
Patchew URL:
https://patchew.org/QEMU/20190322175241.5954-1-danielhb...@gmail.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ==
On 22.3.19. 18:45, Aleksandar Markovic wrote:
From: Mateja Marjanovic
Subject: [PATCH 2/4] target/mips: Fix copy_s. for MIPS big endian host
From: Mateja Marjanovic
Signed element copy from MSA registers to GPR when
executed on a MIPS big endian CPU, didn't pick the
right element, and was b
On 22.3.19. 19:04, Aleksandar Markovic wrote:
@@ -1511,9 +1518,11 @@ void helper_msa_insert_df(CPUMIPSState *env, uint32_t
df, uint32_t wd,
case DF_WORD:
pwd->w[n] = (int32_t)rs;
break;
+#ifdef TARGET_MIPS64
case DF_DOUBLE:
pwd->d[n] = (int64_t)rs
On 22/03/2019 18:54, Alberto Garcia wrote:
> On Thu 21 Mar 2019 03:51:12 PM CET, Alberto Garcia wrote:
>
>> I was checking the tests that run commit and stream in parallel in
>> 030, but they do commit on the upper images and stream on the lower
>> ones, so that's safe. I'll try to run them the
> >> @@ -1511,9 +1518,11 @@ void helper_msa_insert_df(CPUMIPSState *env,
> >> uint32_t df, uint32_t wd,
> >> case DF_WORD:
> >> pwd->w[n] = (int32_t)rs;
> >> break;
> >> +#ifdef TARGET_MIPS64
> >> case DF_DOUBLE:
> >> pwd->d[n] = (int64_t)rs;
> >>
We use PPC_SEGMENT_64B in various places to guard code that is specific
to 64-bit server processors compliant with arch 2.x. Consolidate the
logic in a helper macro with an explicit name.
Signed-off-by: Greg Kurz
---
hw/ppc/ppc.c |2 +-
target/ppc/cpu.h |6 ++
tar
This is a patch series that follows up the patch [1] after
the review from Daniel P. Berrange.
The new interface is being implemented only by the LUKS driver
because this is the error condition I'm trying to fix. My first
idea when coding it was to implement this interface in all drivers
that deal
Signed-off-by: Greg Kurz
---
target/ppc/translate.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 98b37cebc2f5..aaafa3a715d8 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -3749,6 +3749,8 @@ static void gen_bcon
Adding to Block Drivers the capability of being able to clean up
its created files can be useful in certain situations. For the
LUKS driver, for instance, a failure in one of its authentication
steps can leave files in the host that weren't there before.
This patch adds the 'bdrv_co_delete_file' i
Since recent commit 2782ad4c4102 "target/ppc/spapr: Enable mitigations by
default for pseries-4.0 machine type", some recent distros, eg. fedora29,
fail to boot under TCG because of a kernel panic:
[0.614425] Oops: Exception in kernel mode, sig: 4 [#1]
[0.618832] LE SMP NR_CPUS=1024 NUMA p
Even if all ISAs up to v3 indeed mention:
If the "decrement and test CTR" option is specified (BO2=0), the
instruction form is invalid.
The UMs of all existing 64-bit server class processors say:
If BO[2] = 0, the contents of CTR (before any update) are used as the
target address
Using the new 'bdrv_co_delete_file' interface, bdrv_delete_file
can be used in a way similar of the existing bdrv_create_file to
invoke a driver, given by a format @fmt, to clean up a created
file.
The logic is also similar to what is already done in bdrv_create_file:
a qemu_coroutine is created i
When using a non-UTF8 secret to create a volume using qemu-img, the
following error happens:
$ qemu-img create -f luks --object
secret,id=vol_1_encrypt0,file=vol_resize_pool.vol_1.secret.qzVQrI -o
key-secret=vol_1_encrypt0 /var/tmp/pool_target/vol_1 10240K
Formatting '/var/tmp/pool_target/vol_1
> From: Mateja Marjanovic
> Subject: [PATCH 2/4] target/mips: Fix copy_s. for MIPS big endian host
>
> From: Mateja Marjanovic
>
> Signed element copy from MSA registers to GPR when
> executed on a MIPS big endian CPU, didn't pick the
> right element, and was behaving like on little endian.
>
On 22.3.19. 18:16, Aleksandar Markovic wrote:
From: Mateja Marjanovic
Subject: [PATCH 4/4] target/mips: Fix insert. for MIPS big endian host
From: Mateja Marjanovic
Inserting from GPR to an element in a MSA register when
executed on a MIPS big endian CPU, didn't pick the
right element, and
On 3/22/19 7:05 AM, JafarAbdi wrote:
> Signed-off-by: JafarAbdi
> ---
Thank you for your submission - it looks like your first contribution to
qemu. However, I have some suggestions that will make it easier to get
your patches applied:
- Use a cover letter. Since you sent a series, including a
hardfloat fused multiply-add might fallback to softfloat mode in some
situation, but it might already changed the value of input operands,
so we must restore those value before fallback.
This bug is catched by running gcc testsuite on RISC-V qemu.
Signed-off-by: Kito Cheng
---
fpu/softfloat.c |
> From: Mateja Marjanovic
> Subject: [PATCH 4/4] target/mips: Fix insert. for MIPS big endian host
>
> From: Mateja Marjanovic
>
> Inserting from GPR to an element in a MSA register when
> executed on a MIPS big endian CPU, didn't pick the
> right element, and was behaving like on little endian
These functions are not used outside helper.c
Signed-off-by: Andrew Jones
---
target/arm/cpu.h| 11 ---
target/arm/helper.c | 4 ++--
2 files changed, 2 insertions(+), 13 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 5f23c621325c..d4d2836923df 100644
--- a/tar
In the kconfig shuffle arm lost pci-testdev which is used by
kvm-unit-tests. Let's add it back.
Signed-off-by: Andrew Jones
---
default-configs/arm-softmmu.mak | 1 +
1 file changed, 1 insertion(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2a7efc11674a
Hi TCG GIC developers,
There are a few gicv2 test failures when running over TCG that we don't
see when running over KVM. I don't believe these are regressions - I'm
pretty sure they've been failing since Andre first introduced the tests.
I'm just pointing them out now in case anybody would like
On Fri, 22 Mar 2019 at 16:40, Andrew Jones wrote:
> Hi TCG GIC developers,
>
> There are a few gicv2 test failures when running over TCG that we don't
> see when running over KVM. I don't believe these are regressions - I'm
> pretty sure they've been failing since Andre first introduced the tests.
Hi
On Fri, Mar 22, 2019 at 5:43 PM Marc-André Lureau
wrote:
>
> Hi,
>
> In order to make slirp a standalone project, the project must have a
> clear license, and be compatible with the GPL or LGPL.
>
> Since commit 2f5f89963186d42a7ded253bc6cf5b32abb45cec ("Remove the
> advertising clause from the
Add SPDX license identifier to clarify the license of files with
reference to BSD license from slirp COPYRIGHT file.
Signed-off-by: Marc-André Lureau
Reviewed-by: Thomas Huth
---
slirp/src/debug.h | 1 +
slirp/src/if.h | 1 +
slirp/src/main.h | 1 +
slirp/src/misc.h | 1 +
slirp/src/sb
On Fri, Mar 22, 2019 at 05:23:30PM +0100, Andrew Jones wrote:
> The first two patches fix a regression I found when running
> the arm (as opposed to arm64) pmu kvm-unit-tests test on tcg,
>
> $ git clone git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
> $ cd kvm-unit-tests
> $ ./con
Add SPDX license identifier to clarify the license of files without
explicit license header.
Signed-off-by: Marc-André Lureau
Reviewed-by: Thomas Huth
---
slirp/src/bootp.h | 1 +
slirp/src/ip6.h| 1 +
slirp/src/ip6_icmp.h | 1 +
slirp/src/libslirp.h | 1 +
slirp/src/slirp.h
According to commit 2f5f89963186d42a7ded253bc6cf5b32abb45cec ("Remove
the advertising clause from the slirp license"), Danny Gasparovski
gave permission to license slirp code under 3-clause BSD license:
Subject: RE: Slirp license
Date: Thu, 8 Jan 2009 10:51:00 +1100
From: "Gasparovski,
Add SPDX license identifier to clarify the license of files with
explicit 3-clause BSD license header.
Signed-off-by: Marc-André Lureau
Reviewed-by: Thomas Huth
---
slirp/src/dhcpv6.h | 1 +
slirp/src/ip.h | 1 +
slirp/src/ip_icmp.h| 1 +
slirp/src/mbuf.h | 1 +
slirp/src/
Marc-André Lureau, le ven. 22 mars 2019 17:46:12 +0100, a ecrit:
> On Fri, Mar 22, 2019 at 5:43 PM Marc-André Lureau
> wrote:
> >
> > Hi,
> >
> > In order to make slirp a standalone project, the project must have a
> > clear license, and be compatible with the GPL or LGPL.
> >
> > Since commit 2f5
Add SPDX license identifier to clarify the license of files with
explicit MIT license header.
Signed-off-by: Marc-André Lureau
Reviewed-by: Thomas Huth
---
slirp/src/util.h | 1 +
slirp/src/arp_table.c | 1 +
slirp/src/bootp.c | 1 +
slirp/src/dnssearch.c | 1 +
slirp/src/slirp.c |
The slirp COPYRIGHT file is a BSD-3 license. Instead of referring to
another project file, the SPDX license notice present in all source
files states that unequivocally.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
---
slirp/src/debug.h | 3 ---
slirp/src/if.h | 3 ---
slirp has been maintained by the QEMU maintainers and will be
maintained under an independent project soon.
Reviewed-by: Eric Blake
Signed-off-by: Kelly Price
Signed-off-by: Marc-André Lureau
---
slirp/COPYRIGHT | 2 --
1 file changed, 2 deletions(-)
diff --git a/slirp/COPYRIGHT b/slirp/COPYR
Hi,
In order to make slirp a standalone project, the project must have a
clear license, and be compatible with the GPL or LGPL.
Since commit 2f5f89963186d42a7ded253bc6cf5b32abb45cec ("Remove the
advertising clause from the slirp license"), slirp is BSD-3. But new
files have been added under slirp
In order to make slirp a standalone project, the project must have a
clear license, and be compatible with the GPL or LGPL.
Since commit 2f5f89963186d42a7ded253bc6cf5b32abb45cec ("Remove the
advertising clause from the slirp license"), slirp is BSD-3. But new
files have been added under slirp/ wit
The first two patches fix a regression I found when running
the arm (as opposed to arm64) pmu kvm-unit-tests test on tcg,
$ git clone git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
$ cd kvm-unit-tests
$ ./configure --arch=arm --cross-prefix=arm-linux-gnu-
$ make -j
$ export QEM
cortex-a7 and cortex-a15 have pmus (PMUv2) and they advertise
them in ID_DFR0. Let's allow them to function. This also enables
the pmu cpu property to work with these cpu types, i.e. we can
now do '-cpu cortex-a15,pmu=off' to remove the pmu.
Signed-off-by: Andrew Jones
---
target/arm/cpu.c | 3 +
25.01.2019 17:21, Vladimir Sementsov-Ogievskiy wrote:
> drv_co_block_status digs bs->file for additional, more accurate search
> for hole inside region, reported as DATA by bs since 5daa74a6ebc.
>
> This accuracy is not free: assume we have qcow2 disk. Actually, qcow2
> knows, where are holes and
On Thu, Mar 14, 2019 at 07:09:24PM +0100, Markus Armbruster wrote:
> Markus Armbruster (5):
> trace-events: Consistently point to docs/devel/tracing.txt
> trace-events: Shorten file names in comments
> scripts/cleanup-trace-events: Update for current practice
> trace-events: Delete unused t
Fix a QEMU NULL derefence that occurs when the guest attempts to
enable PMU counters with a non-v8 cpu model or a v8 cpu model
which has not configured a PMU.
Fixes: 4e7beb0cc0f3 ("target/arm: Add a timer to predict PMU counter overflow")
Signed-off-by: Andrew Jones
---
target/arm/helper.c | 4 +
From: Mateja Marjanovic
Unsigned element copy from MSA registers to GPR when
executed on a MIPS big endian CPU, didn't pick the
right element, and was behaving like on little endian.
Signed-off-by: Mateja Marjanovic
---
target/mips/msa_helper.c | 7 +++
1 file changed, 7 insertions(+)
dif
On Thu, Mar 21, 2019 at 05:08:29PM +, Stefan Hajnoczi wrote:
> These patches fix compilation issues spotted by Markus Armbruster
> . See the patches for details.
>
> Stefan Hajnoczi (2):
> trace: handle tracefs path truncation
> trace: avoid SystemTap dtrace(1) warnings on empty files
>
From: Mateja Marjanovic
Inserting from GPR to an element in a MSA register when
executed on a MIPS big endian CPU, didn't pick the
right element, and was behaving like on little endian.
Signed-off-by: Mateja Marjanovic
---
target/mips/msa_helper.c | 9 +
1 file changed, 9 insertions(+)
On 3/22/19 4:22 AM, Fabien Chouteau wrote:
> +/* Wrapper around tcg_gen_exit_tb that handles single stepping */
> +static void exit_tb(DisasContext *ctx, TranslationBlock *tb, unsigned idx)
> +{
> +if (ctx->base.singlestep_enabled) {
> +gen_exception_debug();
> +} else {
> +
From: Mateja Marjanovic
Signed element copy from MSA registers to GPR when
executed on a MIPS big endian CPU, didn't pick the
right element, and was behaving like on little endian.
Signed-off-by: Mateja Marjanovic
---
target/mips/msa_helper.c | 7 +++
1 file changed, 7 insertions(+)
diff
From: Mateja Marjanovic
Load and store MSA instructions when executed on a MIPS
big endian CPU, didn't change the endianness, and were
behaving like on little endian.
Signed-off-by: Mateja Marjanovic
---
target/mips/op_helper.c | 79 ++---
1 file cha
From: Mateja Marjanovic
Change endianness when the host machine has a big endian CPU, for
MSA instructions ., copy_., insert..
Mateja Marjanovic (4):
target/mips: Fix . MSA instructions for MIPS big
endian host
target/mips: Fix copy_s. for MIPS big endian host
target/mips: Fix copy_u.
On Thu 21 Mar 2019 03:51:12 PM CET, Alberto Garcia wrote:
> I was checking the tests that run commit and stream in parallel in
> 030, but they do commit on the upper images and stream on the lower
> ones, so that's safe. I'll try to run them the other way around
> because we might have a problem
On Mon, 18 Mar 2019 22:08:50 +0100
Philippe Mathieu-Daudé wrote:
> Le lun. 18 mars 2019 11:34, Marcel Apfelbaum a
> écrit :
>
> > Hi Christian,
> >
> > On 3/18/19 11:27 AM, Christian Borntraeger wrote:
> > >
> > > On 16.03.19 12:09, Philippe Mathieu-Daudé wrote:
> > >> Hi Marcel,
> > >>
> > >>
On Thu, 21 Mar 2019 at 19:36, Eduardo Habkost wrote:
>
> The following changes since commit 62a172e6a77d9072bb1a18f295ce0fcf4b90a4f2:
>
> Update version for v4.0.0-rc0 release (2019-03-19 17:17:22 +)
>
> are available in the Git repository at:
>
> git://github.com/ehabkost/qemu.git tags/x8
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On Fri, 22 Mar 2019 at 10:12, Dr. David Alan Gilbert
> wrote:
> > Right, so in Catherine's patch there's a simple in_incoming_migration
> > and checking ramblock_is_ignored
>
> Mmm, but I think it is in the wrong place. It is being checked
> in
On 3/22/19 9:21 AM, Eric Blake wrote:
> On 3/22/19 8:21 AM, Kevin Wolf wrote:
>> If qemu-img convert sees that the target image isn't zero-initialised
>> yet, it tries to do an efficient zero write for the whole image first
>> to save the overhead of repeated explicit zero writes during the
>> conv
The watch IDs are mistakenly only unique within the scope of the
directory being monitored. This is not useful for clients which are
monitoring multiple directories. They require watch IDs to be unique
globally within the QFileMonitor scope.
Reviewed-by: Marc-André Lureau
Tested-by: Bandan Das
R
Previously posted in 2 separate pieces at
https://lists.gnu.org/archive/html/qemu-devel/2019-03/msg04885.html
https://lists.gnu.org/archive/html/qemu-devel/2019-03/msg05833.html
And a failed pull request
https://lists.gnu.org/archive/html/qemu-devel/2019-03/msg06035.html
The last patch ha
On 3/22/19 2:29 PM, Jan Kiszka wrote:
> On 07.12.18 10:01, Luc Michel wrote:
>> Add the gdb_first_attached_cpu() and gdb_next_attached_cpu() to iterate
>> over all the CPUs in currently attached processes.
>>
>> Add the gdb_first_cpu_in_process() and gdb_next_cpu_in_process() to
>> iterate over CPU
On Thu, 21 Mar 2019 10:43:37 +0900,
Richard Henderson wrote:
>
> On 3/20/19 7:27 AM, Yoshinori Sato wrote:
> > Hi.
> > I found some problem in tested RX instructions.
> > It is usable in RX instructions, but I think that there
> > is a better fix because I am not familiar with Python.
>
> The pat
Watch IDs are allocated from incrementing a int counter against
the QFileMonitor object. In very long life QEMU processes with
a huge amount of USB MTP activity creating & deleting directories
it is just about conceivable that the int counter can wrap
around. This would result in incorrect behaviou
On Thu, 21 Mar 2019 10:35:07 +0900,
Richard Henderson wrote:
>
> On 3/20/19 7:05 AM, Yoshinori Sato wrote:
> > OK. fixed another way.
> > But RX big-endian mode only data access.
> > So operand value always little-endian order.
>
> Oh that is convenient.
> Therefore the operand can always be put
The current file monitor unit tests are too clever for their own good
making it hard to understand the desired output.
Instead of trying to infer the expected events, explicitly list the
events we expect in the operation sequence.
Instead of dynamically building a matrix of tests, just have one g
On 22.03.19 15:01, Luc Michel wrote:
On 3/22/19 2:29 PM, Jan Kiszka wrote:
On 07.12.18 10:01, Luc Michel wrote:
Add the gdb_first_attached_cpu() and gdb_next_attached_cpu() to iterate
over all the CPUs in currently attached processes.
Add the gdb_first_cpu_in_process() and gdb_next_cpu_in_proc
On Fri, 22 Mar 2019 11:57:04 +0200
"П, Алексей" wrote:
> Hi there. Cannot find any info and examples about "proxy" and "handle"
> types of fsdriver of virtfs. Can anyone advise me description of?
> Witrh regards/
Hi,
The "handle" backend was deprecated in QEMU 2.12, for various reasons...
requi
On 3/22/19 8:21 AM, Kevin Wolf wrote:
> If qemu-img convert sees that the target image isn't zero-initialised
> yet, it tries to do an efficient zero write for the whole image first
> to save the overhead of repeated explicit zero writes during the
> conversion. Obviously, this provides only an adv
Patchew URL:
https://patchew.org/QEMU/20190322134447.14831-1-jfreim...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190322134447.14831-1-jfreim...@redhat.com
Subject: [Qemu-devel] [RFC PATCH 0/2] implem
There is only a single caller of bdrv_make_zero(), which is qemu-img
convert. If the function fails, we just fall back to a different method
of zeroing out blocks on the target image. There is no good reason to
print error messages on stderr when the higher level operation will
actually succeed.
S
From: Sameeh Jubran
---
hw/net/virtio-net.c| 95 ++
include/hw/virtio/virtio-net.h | 7 +++
2 files changed, 102 insertions(+)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 7e2c2a6f6a..880420a673 100644
--- a/hw/net/virtio-net.c
+++ b/
From: Sameeh Jubran
Signed-off-by: Jens Freimann
---
hw/core/qdev.c | 27
hw/pci/pci.c | 1 +
include/hw/pci/pci.h | 2 ++
include/hw/qdev-core.h | 8 +++
qdev-monitor.c | 48 ++
vl.c
Filter drivers that support .bdrv_co_pwrite_zeroes can safely advertise
BDRV_REQ_NO_FALLBACK because they just forward the request flags to
their child node.
Signed-off-by: Kevin Wolf
---
block/blkdebug.c | 2 +-
block/copy-on-read.c | 7 +++
block/mirror.c | 3 ++-
block/raw-forma
For qemu-img convert, we want an operation that zeroes out the whole
image if this can be done efficiently, but that returns an error
otherwise so we don't write explicit zeroes and immediately overwrite
them with the real data, potentially doubling the amount of data to be
written.
Signed-off-by:
If qemu-img convert sees that the target image isn't zero-initialised
yet, it tries to do an efficient zero write for the whole image first
to save the overhead of repeated explicit zero writes during the
conversion. Obviously, this provides only an advantage if the
pre-zeroing is actually efficien
This is another attempt at implementing the host side of the
net_failover concept
(https://www.kernel.org/doc/html/latest/networking/net_failover.html)
The general idea is that we have a pair of devices, a vfio-pci and a
emulated device. Before migration the vfio device is unplugged and data
flows
On Fri, 22 Mar 2019 at 13:19, Dima Stepanov wrote:
>
> In case of the virtio-blk communication, can get the following assertion
> for the specifically crafted virtio packet:
> qemu-system-x86_64: exec.c:3725: address_space_unmap: Assertion `mr !=
> NULL' failed.
> This assertion is triggered i
This makes the new BDRV_REQ_NO_FALLBACK flag available in the qemu-io
write command.
Signed-off-by: Kevin Wolf
---
qemu-io-cmds.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/qemu-io-cmds.c b/qemu-io-cmds.c
index 35dcdcf413..09750a23ce 100644
--- a/qemu-io-c
If qemu-img convert sees that the target image isn't zero-initialised
yet, it tries to do an efficient zero write for the whole image first
to save the overhead of repeated explicit zero writes during the
conversion. Obviously, this provides only an advantage if the
pre-zeroing is actually efficien
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