> From: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
> Subject: [PATCH 2/4] target/mips: Fix copy_s.<b|h|w> for MIPS big endian host
>
> From: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
>
> Signed element copy from MSA registers to GPR when
> executed on a MIPS big endian CPU, didn't pick the
> right element, and was behaving like on little endian.
>
> Signed-off-by: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
> ---
>From the title, I gather you are testing on a 32-bit big-endian
host. (If you had tested on a 64-bit host, you would most likely
had said "<b|h|w|d>" rather than <b|h|w>.) This means you can
test only MIPS32 MSA, since QEMU can't emulate a 64-bit target
system on a 32-bit host.
But what about COPY_S.D? This instruction is present only in
MIPS64 MSA. If you don't have access to the 64-bit big-endian
host, could you perhaps do some logical analysis of handling
of COPY_S.D on big-endian host?
An almost same question arises for the next patch of course,
regarding COPY_U.D.
Sincerely,
Aleksandar
> target/mips/msa_helper.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
> index 421dced..012f373 100644
> --- a/target/mips/msa_helper.c
> +++ b/target/mips/msa_helper.c
> @@ -1435,6 +1435,13 @@ void helper_msa_copy_s_df(CPUMIPSState *env, uint32_t
> df, uint32_t rd,
> uint32_t ws, uint32_t n)
> {
> n %= DF_ELEMENTS(df);
> +#if defined(HOST_WORDS_BIGENDIAN)
> + if (n < DF_ELEMENTS(df) / 2) {
> + n = DF_ELEMENTS(df) / 2 - n - 1;
> + } else {
> + n = 3 * DF_ELEMENTS(df) / 2 - n - 1;
> + }
> +#endif
>
> switch (df) {
> case DF_BYTE:
