Marc-André Lureau writes:
> Hi
>
> On Thu, Aug 9, 2018 at 1:44 PM, Marc-André Lureau
> wrote:
>> Spotted by ASAN, during make check...
>>
>> Direct leak of 40 byte(s) in 1 object(s) allocated from:
>> #0 0x7f8e27262c48 in malloc (/lib64/libasan.so.5+0xeec48)
>> #1 0x7f8e26a5f3c5 in g_mal
On Fri, Aug 10, 2018 at 07:37:12AM +0200, Hervé Poussineau wrote:
> OpenBIOS gained 40p support in 5b20e4cacecb62fb2bdc6867c11d44cddd77c4ff
> Use it, instead of relying on an unmaintained and very limited firmware.
>
> Signed-off-by: Hervé Poussineau
Applied to ppc-for-3.1, thanks.
> ---
> hw/
Signed-off-by: Leonid Bloch
Reviewed-by: Alberto Garcia
---
block/qcow2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index b4f291765b..b0e20aeffc 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -1324,7 +1324,7 @@ static int coroutine_f
The upper limit on the L2 cache size is increased from 1 MB to 32 MB.
This is done in order to allow default full coverage with the L2 cache
for images of up to 256 GB in size (was 8 GB). Note, that only the
needed amount to cover the full image is allocated. The value which is
changed here is just
Sufficient L2 cache can noticeably improve the performance when using
large images with frequent I/O.
Previously, the L2 cache was allocated without considering the image
size, and an option existed to manually determine its size. Thus to
achieve a full coverage of an image by the L2 cache (i.e. u
Marc-André Lureau writes:
> Spotted by ASAN:
>
> =
> ==5378==ERROR: LeakSanitizer: detected memory leaks
>
> Direct leak of 65536 byte(s) in 1 object(s) allocated from:
> #0 0x7f788f83bc48 in malloc (/lib64/libasan.so.5+0xeec48)
The refcount cache size does not need to be set to its minimum value in
read_cache_sizes(), as it is set to at least its minimum value in
qcow2_update_options_prepare().
Signed-off-by: Leonid Bloch
---
block/qcow2.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --gi
The default cache-clean-interval is set to 10 minutes, in order to lower
the overhead of the qcow2 caches (before the default was 0, i.e.
disabled).
Signed-off-by: Leonid Bloch
Reviewed-by: Alberto Garcia
---
block/qcow2.c| 2 +-
block/qcow2.h| 1 +
docs/qcow2-cache.txt | 4 ++--
The caches are now recalculated upon image resizing. This is done
because the new default behavior of assigning L2 cache relatively to
the image size, implies that the cache will be adapted accordingly
after an image resize.
Signed-off-by: Leonid Bloch
Reviewed-by: Alberto Garcia
---
block/qcow
Signed-off-by: Leonid Bloch
---
block/qcow2.c | 2 +-
block/qcow2.h | 9 +
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index 3f4abc394e..7a2d7a1d48 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -831,7 +831,7 @@ static void read_cache_si
Some refactoring for better readability is done here.
Signed-off-by: Leonid Bloch
---
block/qcow2.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index ec9e6238a0..3f4abc394e 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -790,8 +79
This series makes the qcow2 L2 cache assignment aware of the image size,
with the intention for it to cover the entire image. The importance of
this change is in noticeable performance improvement, especially with
heavy random I/O. The memory overhead is not big in most cases, as only
1 MB of cache
Signed-off-by: Leonid Bloch
---
docs/qcow2-cache.txt | 16 +++-
qemu-options.hx | 9 ++---
2 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/docs/qcow2-cache.txt b/docs/qcow2-cache.txt
index 8a09a5cc5f..0f157d859a 100644
--- a/docs/qcow2-cache.txt
+++ b/docs/qc
Marc-André Lureau writes:
> Spotted by ASAN:
>
> =
> ==27907==ERROR: LeakSanitizer: detected memory leaks
>
> Direct leak of 4120 byte(s) in 1 object(s) allocated from:
> #0 0x7f913458ce50 in calloc (/lib64/libasan.so.5+0xeee50)
Peter Maydell writes:
> We now require Linux-kernel-style multiline comments:
> /*
> * line one
> * line two
> */
>
> Enforce this in checkpatch.pl, by backporting the relevant
> parts of the Linux kernel's checkpatch.pl. (The only changes
> needed are that Linux's checkpatch.p
On Wed, Aug 8, 2018 at 10:07 PM, Julia Suvorova wrote:
> ret = g_test_run();
>
> qtest_quit(global_qtest);
> +
> +close(sock_fd);
> +rmdir(serialtmpdir);
This temporary directory is leaked if the test fails. Please remove
it immediately after connect().
Simon Ruderich writes:
> On Mon, May 21, 2018 at 05:36:39PM +0200, Simon Ruderich wrote:
>> Hello,
>>
>> This is third version of this patch set, rebased on current
>> master.
>>
>> As I've received no answers to [1] (and I'd prefer to keep the
>> patch as is for now if possible) this doesn't inc
On Wed, Aug 8, 2018 at 10:07 PM, Julia Suvorova wrote:
> @@ -70,6 +73,19 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error
> **errp)
> }
> memory_region_add_subregion(&s->container, SRAM_BASE, &s->sram);
>
> +/* UART */
> +qdev_prop_set_chr(DEVICE(&s->uart), "chardev"
On Wed, Aug 8, 2018 at 10:07 PM, Julia Suvorova wrote:
> +static uint64_t uart_read(void *opaque, hwaddr addr, unsigned int size)
> +{
> +NRF51UARTState *s = NRF51_UART(opaque);
> +uint64_t r;
> +
> +if (!s->enabled) {
> +return 0;
> +}
> +
> +switch (addr) {
> +cas
Hi Aleksandar,
On 08/06/2018 01:59 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
[snip]
> This series of patches implements recently announced nanoMIPS on QEMU.
> nanoMIPS is a variable length ISA containing 16, 32 and 48-bit wide
> instructions. It is designed to be portable at asse
On 08/06/2018 01:59 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Add MIPS machine variants ELF flags so that the emulation behavior
> can be adjusted if needed.
>
> Reviewed-by: Laurent Vivier
> Reviewed-by: Richard Henderson
> Signed-off-by: Aleksandar Markovic
> Signed-off
OpenBIOS gained 40p support in 5b20e4cacecb62fb2bdc6867c11d44cddd77c4ff
Use it, instead of relying on an unmaintained and very limited firmware.
Signed-off-by: Hervé Poussineau
---
hw/ppc/prep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
ind
Le 10/08/2018 à 03:04, David Gibson a écrit :
On Thu, Aug 09, 2018 at 10:40:09PM +0200, Hervé Poussineau wrote:
OpenBIOS gained 40p support in 5b20e4cacecb62fb2bdc6867c11d44cddd77c4ff
Use it, instead of relying on the presence of a proprietary
firmware.
Uh.. openhackware might be, well, a hac
--- a/block/qcow2.h
+++ b/block/qcow2.h
@@ -73,7 +73,7 @@
/* Must be at least 4 to cover all cases of refcount table growth */
#define MIN_REFCOUNT_CACHE_SIZE 4 /* clusters */
-#define DEFAULT_L2_CACHE_MAX_SIZE 1048576 /* bytes */
+#define DEFAULT_L2_CACHE_MAX_SIZE 0x200U /* bytes */
I'
On 08/06/2018 01:59 PM, Aleksandar Markovic wrote:
> From: Yongbok Kim
>
> MFHC0 and MTHC0 used to handle EntryLo0 and EntryLo1 registers only,
> and placing ELPA flag checks before switch statement were technically
> correct. However, after adding handling more registers, these checks
> should b
On 08/06/2018 01:59 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Fix two instances of shadow variables. This cleans up entire file
> translate.c from shadow variables.
>
> Reviewed-by: Richard Henderson
> Signed-off-by: Aleksandar Markovic
> Signed-off-by: Stefan Markovic
R
On 08/06/2018 01:59 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Mark switch fallthroughs with comments, in cases fallthroughs
> are intentional.
>
> The comments "/* fall through */" are interpreted by compilers and
> other tools, and they will not issue warnings in such cases
On 08/10/2018 02:18 AM, Philippe Mathieu-Daudé wrote:
> On 08/09/2018 10:01 AM, Peter Maydell wrote:
>> Create a new include file for the pl081's device struct,
>> type macros, etc, so that it can be instantiated using
>> the "embedded struct" coding style.
[...]
>> +#ifndef HW_DMA_PL080_H
>> +#def
On 08/09/2018 10:01 AM, Peter Maydell wrote:
> Create a new include file for the pl081's device struct,
> type macros, etc, so that it can be instantiated using
> the "embedded struct" coding style.
>
> Signed-off-by: Peter Maydell
> ---
> include/hw/dma/pl080.h | 62
On 08/09/2018 10:01 AM, Peter Maydell wrote:
> The PL08x model currently will unconditionally call hw_error()
> if the DMA engine is enabled by the guest. This has been
> present since the PL080 model was edded in 2006, and is
> presumably either unintentional debug code left enabled,
> or a guard
On 08/09/2018 10:01 AM, Peter Maydell wrote:
> The PL080/PL081 model is missing a reset function; implement it.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/dma/pl080.c | 25 +
> 1 file changed, 25 insertions(+)
>
> diff --git a/hw/d
On 08/09/2018 10:01 AM, Peter Maydell wrote:
> Currently our PL080/PL081 model uses a combination of the CPU's
> address space (via cpu_physical_memory_{read,write}()) and the
> system address space for performing DMA accesses.
>
> For the PL081s in the MPS FPGA images, their DMA accesses
> must g
On 08/09/2018 10:01 AM, Peter Maydell wrote:
> On real v7M hardware, the NMI line is an externally visible signal
> that an SoC or board can toggle to assert an NMI. Expose it in
> our QEMU NVIC and armv7m container objects so that a board model
> can wire it up if it needs to.
>
> In particular,
Hi Su,
On 08/03/2018 11:47 AM, Stefan Hajnoczi wrote:
> From: Su Hang
>
> This patch adds Intel Hexadecimal Object File format support to the
> generic loader device. The file format specification is available here:
> http://www.piclist.com/techref/fileext/hex/intel.htm
>
> This file format is
Hi Su,
On 08/03/2018 11:47 AM, Stefan Hajnoczi wrote:
> From: Su Hang
>
> 'test.hex' file is a bare metal ARM software stored in Hexadecimal
> Object Format. When it's loaded by QEMU, it will print "Hello world!\n"
> on console.
... on the console of the Emcraft SmartFusion2 machine.
>
> `pre
This commit includes the support to new module dmg-lzfse into dmg block
driver. It includes the support for block type ULFO (0x8007).
Signed-off-by: Julio Faracco
---
block/dmg.c | 28
block/dmg.h | 3 +++
2 files changed, 31 insertions(+)
diff --git a/block/dm
This commit includes the support to lzfse opensource library. With this
library dmg block driver can decompress images with this type of
compression inside.
Signed-off-by: Julio Faracco
---
block/Makefile.objs | 2 ++
configure | 32
2 files changed, 3
This change is better to understand what kind of block type is being
handled by the code. Using a syntax similar to the DMG documentation is
easier than tracking all hex values assigned to a block type.
Signed-off-by: Julio Faracco
---
block/dmg.c | 43 ---
Since Mac OS X El Capitain (v10.11), Apple uses LZFSE compression to
generate compressed DMGs as an alternative to BZIP2. Possible, Apple
want to keep this algorithm as default in long term. Some years ago,
Apple opened the LZFSE algorithm to opensource and the main source (or
the most active re
QEMU dmg support includes zlib and bzip2, but it does not contains lzfse
support. This commit adds the source file to extend compression support
for new DMGs.
Signed-off-by: Julio Faracco
---
block/dmg-lzfse.c | 54 +++
1 file changed, 54 insertions(+)
On 08/03/2018 11:47 AM, Stefan Hajnoczi wrote:
> The next patch will need to free a rom. There is already code to do
> this in rom_add_file().
>
> Note that rom_add_file() uses:
>
> rom = g_malloc0(sizeof(*rom));
> ...
> if (rom->fw_dir) {
> g_free(rom->fw_dir);
> g_free(rom->f
On 08/03/2018 11:47 AM, Stefan Hajnoczi wrote:
> Define a "cortex-m0" ARMv6-M CPU model.
>
> Most of the register reset values set by other CPU models are not
> relevant for the cut-down ARMv6-M architecture.
>
> Signed-off-by: Stefan Hajnoczi
> Reviewed-by: Peter Maydell
Reviewed-by: Philippe
On 07/30/2018 02:51 PM, Peter Maydell wrote:
> On 27 July 2018 at 06:26, Philippe Mathieu-Daudé wrote:
>> Hi Stefan,
>>
>> On 07/25/2018 05:59 AM, Stefan Hajnoczi wrote:
>>> Define a "cortex-m0" ARMv6-M CPU model.
>>>
>>> Most of the register reset values set by other CPU models are not
>>> releva
On Wed, Aug 08, 2018 at 01:39:31PM +0100, Alex Bennée wrote:
> Given our issues with failing disassembly we could try and re-use the
> decode tree data to output what instruction is being decoded. This
> will be used if registered as a fall-back for when the "proper"
> disassembler fails to decode
On 08/03/2018 11:47 AM, Stefan Hajnoczi wrote:
> Some ARM CPUs have bitbanded IO, a memory region that allows convenient
> bit access via 32-bit memory loads/stores. This eliminates the need for
> read-modify-update instruction sequences.
>
> This patch makes this optional feature an ARMv7MState
Convert to Binary - counterparts of the already implemented Convert
to Decimal (CVD*) instructions.
Example from the Principles of Operation: 25594C becomes 63FA.
Signed-off-by: Pavel Zbitskiy
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 4 +++
target/s390x/int_
Improves "b213c9f5: target/s390x: Implement TRTR" by introducing the
intermediate functions, which are compatible with dx_helper type.
Signed-off-by: Pavel Zbitskiy
---
target/s390x/mem_helper.c | 16 +++
tests/tcg/s390x/Makefile.target | 2 ++
tests/tcg/s390x/exrl-trt.c | 48
CSST is defined as:
C(0xc802, CSST,SSF, CASS, la1, a2, 0, 0, csst, 0)
It means that the first parameter is handled by in1_la1().
in1_la1() fills addr1 field, and not in1.
Furthermore, when extract32() is used for the alignment check, the
third parameter should specify the number of tra
Suppose psw.mask=0x8000, cc=2, r1=0 and we do "ipm 1".
This command must touch only bits 32-39, so the expected output
is r1=0x2000. However, currently qemu yields r1=0x20008000,
because irrelevant parts of PSW leak into r1 during program mask
transfer.
Signed-off-by: Pavel Zbitski
PACK fails on the test from the Principles of Operation: F1F2F3F4
becomes 234C instead of 0001234C due to an off-by-one error.
Furthermore, it overwrites one extra byte to the left of F1.
If len_dest is 0, then we only want to flip the 1st byte and never loop
over the rest. Therefore, the loop
These instructions are provided for compatibility purposes and are
used only by old software, in the new code BAS and BASR are preferred.
The difference between the old and new instruction exists only in the
24-bit mode.
Signed-off-by: Pavel Zbitskiy
---
target/s390x/insn-data.def | 3 +++
targ
Copied from alpha.
Signed-off-by: Pavel Zbitskiy
---
tests/tcg/s390x/Makefile.target | 3 +++
tests/tcg/s390x/hello-s390x.c | 7 +++
2 files changed, 10 insertions(+)
create mode 100644 tests/tcg/s390x/Makefile.target
create mode 100644 tests/tcg/s390x/hello-s390x.c
diff --git a/tests/t
Found while attempting to run an old tool in qemu.
* BAL and BALR:Added.
* CSST:Qemu crashed after an accidental jump to garbage.
* IPM: A tool produced an incorrect output.
* EX TRT/TRTR: A tool ran quite slow.
* PACK:A tool produced an incorrect output
From: Chen Hanxiao
This patch add support for freeze specified fs.
The valid mountpoints list member are [1]:
The path of a mounted folder, for example, Y:\MountX\
A drive letter, for example, D:\
A volume GUID path of the form \\?\Volume{GUID}\,
where GUID identifies the volume
A
On Mon, Jul 30, 2018 at 04:11:33PM +0200, Cédric Le Goater wrote:
> This proposal moves all the related IRQ routines of the sPAPR machine
> behind a sPAPR IRQ backend interface 'spapr_irq' to prepare for future
> changes. First of which will be to increase the size of the IRQ number
> space, then,
On Thu, Aug 09, 2018 at 10:40:10PM +0200, Hervé Poussineau wrote:
> - prep machine is a fictional machine, so has no specifications. Which
> devices can be changed/added/removed without impact? Are interrupts
> correctly mapped?
> - prep firmware (OHW) has support only for IDE drives (no SCSI).
On Thu, Aug 09, 2018 at 10:40:09PM +0200, Hervé Poussineau wrote:
> OpenBIOS gained 40p support in 5b20e4cacecb62fb2bdc6867c11d44cddd77c4ff
> Use it, instead of relying on the presence of a proprietary
> firmware.
Uh.. openhackware might be, well, a hack, but I don't think it's
propietary. Repla
> On 8 Aug 2018, at 12:52, Greg Edwards wrote:
>
> Allow toggling on/off the VIRTIO_SCSI_F_T10_PI feature bit for both
> vhost-scsi and vhost-user-scsi devices.
>
> Signed-off-by: Greg Edwards
> ---
> hw/scsi/vhost-scsi.c | 3 +++
> hw/scsi/vhost-user-scsi.c | 3 +++
> 2 files changed, 6 i
> On 8 Aug 2018, at 12:52, Greg Edwards wrote:
>
> Move the enablement of preset host features into the common
> vhost_scsi_common_get_features() function. This is in preparation for
> having vhost-scsi also make use of host_features.
>
> Signed-off-by: Greg Edwards
> ---
> hw/scsi/vhost-scs
> On 8 Aug 2018, at 12:52, Greg Edwards wrote:
>
> In preparation for having vhost-scsi also make use of host_features,
> move it from struct VHostUserSCSI into struct VHostSCSICommon.
>
> Signed-off-by: Greg Edwards
> ---
> hw/scsi/vhost-user-scsi.c | 15 ---
> include
On Thu, Aug 09, 2018 at 12:13:24PM +0200, Igor Mammedov wrote:
> On Wed, 8 Aug 2018 23:20:25 +0300
> "Michael S. Tsirkin" wrote:
>
> > On Wed, Aug 08, 2018 at 05:15:45PM +0200, Igor Mammedov wrote:
> > > It's an alternative approach to
> > > 1) [PATCH hack dontapply v2 0/7] Dynamic _CST generati
On Thu, Aug 09, 2018 at 12:00:11PM +0200, Igor Mammedov wrote:
> On Wed, 8 Aug 2018 23:17:48 +0300
> "Michael S. Tsirkin" wrote:
>
> > On Wed, Aug 08, 2018 at 05:15:48PM +0200, Igor Mammedov wrote:
> > > Reuse CPU hotplug IO registers for passing a CST entry
> > > containing package for shalowest
On Thu, Aug 09, 2018 at 08:03:03PM +0100, Dr. David Alan Gilbert wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
> > They are all already included in virtio_pci.h.
All I see in virtio_pci.h is:
#include "standard-headers/linux/types.h"
Weird.
BTW what's the point of this patch? Generally
On Thu, Aug 09, 2018 at 07:54:37PM +0300, Ilya Maximets wrote:
> New feature bit for in-order feature of the upcoming
> virtio 1.1. It's already supported by DPDK vhost-user
> and virtio implementations. These changes required to
> allow feature negotiation.
>
> Signed-off-by: Ilya Maximets
> ---
On 2018-08-10 00:31, Max Reitz wrote:
[...]
> v2:
> - Patch 4: We must clear BDS.exact_filename for filter nodes, or we
> basically end up with a random filename for them. This is achieved by
> pulling the !drv->is_filter check into an inner condition.
> (Fixes iotests 40 and 184)
>
> - P
Add a test for committing an overlay in a sub directory to one of the
images in its backing chain, using both relative and absolute filenames.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/020 | 36
tests/qemu-iotests/020.out | 10 ++
2 files ch
On 2018-08-10 00:31, Max Reitz wrote:
> This adds two tests for cases where our old check_to_replace_node()
> function failed to detect that executing this job with these parameters
> would result in a cyclic graph.
>
> Signed-off-by: Max Reitz
> ---
> tests/qemu-iotests/041 | 124 ++
This patch adds some test cases how mirroring relates to filters. One
of them tests what happens when you mirror off a filtered COW node, two
others use the mirror filter node as basically our only example of an
implicitly created filter node so far (besides the commit filter).
Signed-off-by: Max
Parts of the block layer treat BDS.backing_file as if it were whatever
the image header says (i.e., if it is a relative path, it is relative to
the overlay), other parts treat it like a cache for
bs->backing->bs->filename (relative paths are relative to the CWD).
Considering bs->backing->bs->filena
This adds two tests for cases where our old check_to_replace_node()
function failed to detect that executing this job with these parameters
would result in a cyclic graph.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/041 | 124 +
tests/qemu-iotests/041.
Note 1: This series depends on v10 of my “block: Fix some filename
generation issues” series.
Based-on: <20180809213528.14738-1-mre...@redhat.com>
Note 2: This is technically the first part of my active mirror followup.
But just very technically. I noticed that that followup started to
consist o
This patch adds some tests on how commit copes with filter nodes.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/040 | 130 +
tests/qemu-iotests/040.out | 4 +-
2 files changed, 132 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/040 b/te
Enabling TOPOEXT is always allowed, but it can't be enabled
blindly by "-cpu host" because it may make guests crash if the
rest of the cache topology information isn't provided or isn't
consistent.
This addresses the bug reported at:
https://bugzilla.redhat.com/show_bug.cgi?id=1613277
Signed-off-
What bs->file and bs->backing mean depends on the node. For filter
nodes, both signify a node that will eventually receive all R/W
accesses. For format nodes, bs->file contains metadata and data, and
bs->backing will not receive writes -- instead, writes are COWed to
bs->file. Usually.
In any c
There is no reason why the constraints we put on @replaces should be
limited to drive-mirror. Therefore, move the sanity checks from
qmp_drive_mirror() to blockdev_mirror_common() so they apply to
blockdev-mirror as well.
Signed-off-by: Max Reitz
---
blockdev.c | 55
Signed-off-by: Max Reitz
---
tests/qemu-iotests/040 | 61 ++
tests/qemu-iotests/040.out | 4 +--
2 files changed, 63 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/040 b/tests/qemu-iotests/040
index f0544d6107..90c03e745b 100755
--- a/tests
On 08/09/2018 04:53 PM, Leonid Bloch wrote:
The upper limit on the L2 cache size is increased from 1 MB to 32 MB.
This is done in order to allow default full coverage of an image with
the L2 cache for images of up to 256 GB in size (was 8 GB). Note, that
only the needed amount to cover the full i
Currently, check_to_replace_node() only allows mirror to replace a node
in the chain of the source node, and only if it is the first non-filter
node below the source. Well, technically, the idea is that you can
exactly replace a quorum child by mirroring from quorum.
This has (probably) two reaso
On 08/08/2018 07:02 AM, Markus Armbruster wrote:
We reject bytes that can't occur in valid UTF-8 (\xC0..\xC1,
\xF5..\xFF in the lexer. That's insufficient; there's plenty of
invalid UTF-8 not containing these bytes, as demonstrated by
check-qjson:
* Malformed sequences
- Unexpected continua
For completeness' sake, add a function for accessing a node's storage
child, too. For filters, this is there filtered child; for non-filters,
this is bs->file.
Some places are deliberately left unconverted:
- BDS opening/closing functions where bs->file is handled specially
(which is basically
The commit and mirror block nodes are filters, so they should be marked
as such.
Signed-off-by: Max Reitz
---
block/commit.c | 2 ++
block/mirror.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/block/commit.c b/block/commit.c
index 14788b0708..a95b87bb3a 100644
--- a/block/commit.c
+++
The default cache-clean-interval is set to 10 minutes, in order to lower
the overhead of the qcow2 caches (before the default was 0, i.e.
disabled).
Signed-off-by: Leonid Bloch
Reviewed-by: Alberto Garcia
---
block/qcow2.c| 2 +-
block/qcow2.h| 1 +
docs/qcow2-cache.txt | 4 ++--
Let's pretend you didn't see this, as it breaks some iotests... *cough*
*cough*
(This is what I get for last-minute changes and rebases without proper
test running. Yes, I'm ashamed.)
Max
On 2018-08-09 23:37, Max Reitz wrote:
> Note 1: This series depends on v10 of my “block: Fix some filename
Signed-off-by: Leonid Bloch
Reviewed-by: Alberto Garcia
---
block/qcow2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index b4f291765b..b0e20aeffc 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -1324,7 +1324,7 @@ static int coroutine_f
The caches are now recalculated upon image resizing. This is done
because the new default behavior of assigning L2 cache relatively to
the image size, implies that the cache will be adapted accordingly
after an image resize.
Signed-off-by: Leonid Bloch
Reviewed-by: Alberto Garcia
---
block/qcow
The refcount cache size does not need to be set to its minimum value in
read_cache_sizes(), as it is set to at least its minimum value in
qcow2_update_options_prepare().
Signed-off-by: Leonid Bloch
---
block/qcow2.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --gi
This series makes the qcow2 L2 cache assignment aware of the image size,
with the intention for it to cover the entire image. The importance of
this change is in noticeable performance improvement, especially with
heavy random I/O. The memory overhead is not big in most cases, as only
1 MB of cache
Dr. David Alan Gilbert, le jeu. 09 août 2018 12:32:05 +0100, a ecrit:
> >|--datasize>|---m_len--->
> >|--m_size-->
> >|M_ROOM>
> > |-M_FREEROOM-->
> >
> >^
Performance impact of this and the previous commit, measured with
the very-easy-to-cross-compile rv8-bench:
https://github.com/rv8-io/rv8-bench
Host: Intel(R) Core(TM) i7-4790K CPU @ 4.00GHz
- Key:
before: master
after1,2,3: the 3 commits in this series (i.e. 3 is this commit)
- User-mode:
On 8/9/18 8:37 PM, Eric Blake wrote:
On 08/09/2018 11:46 AM, Leonid Bloch wrote:
There are no functional changes, why do you need to change the
indentation here?
It's in the "immediate area (few lines) of the lines [I'm] changing".
But there's no need to change those lines unless there's an
The upper limit on the L2 cache size is increased from 1 MB to 32 MB.
This is done in order to allow default full coverage of an image with
the L2 cache for images of up to 256 GB in size (was 8 GB). Note, that
only the needed amount to cover the full image is allocated. The value
which is changed
Add a test for committing an overlay in a sub directory to one of the
images in its backing chain, using both relative and absolute filenames.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/020 | 36
tests/qemu-iotests/020.out | 10 ++
2 files ch
Sufficient L2 cache can noticeably improve the performance when using
large images with frequent I/O.
Previously, the L2 cache was allocated without considering the image
size, and an option existed to manually determine its size. Thus to
achieve a full coverage of an image by the L2 cache (i.e. u
This patch adds some tests on how commit copes with filter nodes.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/040 | 130 +
tests/qemu-iotests/040.out | 4 +-
2 files changed, 132 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/040 b/te
Some refactoring for better readability is done here.
Signed-off-by: Leonid Bloch
---
block/qcow2.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index ec9e6238a0..3f4abc394e 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -790,8 +79
Signed-off-by: Emilio G. Cota
---
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 0b6be74f2d..ec2988b4f6 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -135,7 +135,7 @@
Parts of the block layer treat BDS.backing_file as if it were whatever
the image header says (i.e., if it is a relative path, it is relative to
the overlay), other parts treat it like a cache for
bs->backing->bs->filename (relative paths are relative to the CWD).
Considering bs->backing->bs->filena
Signed-off-by: Max Reitz
---
tests/qemu-iotests/040 | 61 ++
tests/qemu-iotests/040.out | 4 +--
2 files changed, 63 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/040 b/tests/qemu-iotests/040
index f0544d6107..90c03e745b 100755
--- a/tests
There are a few more places where the lookup could be inserted,
but I think these are the ones that will matter performance-wise.
Perf results in patch 3's log.
Regarding the benchmarks: I'd have used SPEC06 but I don't have
much time to get it to compile. Is there a guide on how to do so?
Ideall
For completeness' sake, add a function for accessing a node's storage
child, too. For filters, this is there filtered child; for non-filters,
this is bs->file.
Some places are deliberately left unconverted:
- BDS opening/closing functions where bs->file is handled specially
(which is basically
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