Hi Shannon,
On 28/03/18 06:02, Shannon Zhao wrote:
>
>
> On 2018/3/27 22:15, Eric Auger wrote:
>> With KVM acceleration and if KVM VGICV3 supports to set multiple
>> redistributor regions, we now allow up to 512 vcpus.
>>
>> Signed-off-by: Eric Auger
>> ---
>> hw/arm/virt.c | 17 ++
Hi,
On 28/03/18 03:19, Tiwei Bie wrote:
> This macro isn't used by any VFIO code. And its name is
> too generic. The vfio-common.h (in include/hw/vfio) can
> be included by other modules in QEMU. It can introduce
> conflicts.
>
> Signed-off-by: Tiwei Bie
Reviewed-by: Eric Auger
Thanks
Eric
>
Hi Peter,
On 28/03/18 04:03, Peter Xu wrote:
> On Fri, Mar 23, 2018 at 01:36:36PM +0100, Auger Eric wrote:
>> Hi,
>>
>> On 23/03/18 13:11, Peter Maydell wrote:
>>> On 23 March 2018 at 12:01, Auger Eric wrote:
Hi,
On 23/03/18 11:26, Peter Maydell wrote:
> On 23 March 2018 at 10:
On 03/28/2018 12:20 PM, Peter Xu wrote:
On Wed, Mar 28, 2018 at 12:08:19PM +0800, jiang.bi...@zte.com.cn wrote:
On Tue, Mar 27, 2018 at 10:35:29PM +0800, Xiao Guangrong wrote:
No, we can't make the assumption that "error _must_ be caused by page update".
No document/ABI about compress/decom
On 2018年03月28日 14:03, Thomas Huth wrote:
On 28.03.2018 04:59, Jason Wang wrote:
On 2018年03月27日 21:16, Thomas Huth wrote:
# launch vde switch
vde_switch -F -sock /tmp/myswitch
# launch QEMU instance
-qemu-system-i386 linux.img -net nic -net vde,sock=/tmp/myswitch
+qemu-system-i386
On 28.03.2018 04:59, Jason Wang wrote:
>
>
> On 2018年03月27日 21:16, Thomas Huth wrote:
# launch vde switch
vde_switch -F -sock /tmp/myswitch
# launch QEMU instance
-qemu-system-i386 linux.img -net nic -net vde,sock=/tmp/myswitch
+qemu-system-i386 linux.img -nic vd
On 03/24/2018 06:57 AM, Laurent Vivier wrote:
> Some files like signal.c are really hard to read
> because all architectures are mixed in the same
> file.
>
> This series moves from signal.c these parts to
> the architecture dedicated directories in linux-user.
> Moreover, this allows to compare e
On 03/27/2018 03:15 AM, Laurent Vivier wrote:
> This series moves from main.c the architecture specific parts
> to the architecture directory.
>
> This is the continuation of my series
> "linux-user: move arch specific parts to arch directories"
> that includes since the v2 only the signal.c par
On Tue, Mar 27, 2018 at 5:35 PM, Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 03/28/2018 01:43 AM, Michael Clark wrote:
> > > +if ((ct & TCG_CT_CONST_N12) && val >= -2047 && val <= 2047) {
> >
> > +2048?
>
Yes of course, you're right. It's safe. I just hadn't thought
On 03/28/2018 08:42 AM, Michael Clark wrote:
> This change is a workaround for a bug where mstatus.FS
> is not correctly reporting dirty after operations that
> modify floating point registers. This a critical bug
> or RISC-V in QEMU as it results in floating point
> register file corruption when r
On 03/28/2018 10:22 AM, Richard Henderson wrote:
> +/* Mark fp status as dirty. */
> +env->mstatus = MSTATUS_FS;
Bah. This should of course be |=.
r~
Hi Richard,
Thanks! I'll test this tomorrow morning and we can choose whether to
include your proper fix or the workaround.
I think we have time assuming we send out PRs tomorrow.
Given our important fixes have review including either this fix by tomorrow
or the workaround, and Philippe has revi
Failure to do so results in the tcg optimizer sign-extending
any constant fold from 32-bits. This turns out to be visible
in the RISC-V testsuite using a host that emits these opcodes
(e.g. any non-x86_64).
Reported-by: Michael Clark
Reviewed-by: Emilio G. Cota
Reviewed-by: Philippe Mathieu-Dau
This is material for stable as well.
r~
The following changes since commit fa3704d87720d7049d483ff669b9e2ff991e7658:
Update version for v2.12.0-rc1 release (2018-03-27 22:04:23 +0100)
are available in the Git repository at:
git://github.com/rth7680/qemu.git tags/pull-tcg-20180328
for yo
On 03/28/2018 03:55 AM, Michael Clark wrote:
> This fixes a bug in the disassembler constraints used
> to lift instructions into pseudo-instructions, whereby
> addiw instructions are always lifted to sext.w instead
> of just lifting addiw with a zero immediate.
>
> An associated fix has been made
On 03/28/2018 03:55 AM, Michael Clark wrote:
> - Model borrowed from target/sh4/cpu.c
> - Rewrote riscv_cpu_list to use object_class_get_list
> - Dropped 'struct RISCVCPUInfo' and used TypeInfo array
> - Replaced riscv_cpu_register_types with DEFINE_TYPES
> - Marked base class as abstract
> - Fixes
On Wed, Mar 28, 2018 at 12:08:19PM +0800, jiang.bi...@zte.com.cn wrote:
> >
> > On Tue, Mar 27, 2018 at 10:35:29PM +0800, Xiao Guangrong wrote:
> >
> >> > > No, we can't make the assumption that "error _must_ be caused by page
> >> > > update".
> >> > > No document/ABI about compress/decompress p
>
> On Tue, Mar 27, 2018 at 10:35:29PM +0800, Xiao Guangrong wrote:
>
>> > > No, we can't make the assumption that "error _must_ be caused by page
>> > > update".
>> > > No document/ABI about compress/decompress promised it. :)
>
> Indeed, I found no good documents about below errors that jiang.b
On 2018/3/27 22:15, Eric Auger wrote:
> With KVM acceleration and if KVM VGICV3 supports to set multiple
> redistributor regions, we now allow up to 512 vcpus.
>
> Signed-off-by: Eric Auger
> ---
> hw/arm/virt.c | 17 -
> include/hw/arm/virt.h | 1 +
> 2 files changed,
On Mon, Mar 26, 2018 at 11:46:13AM +0200, Marc-André Lureau wrote:
> Hi
>
> On Mon, Mar 26, 2018 at 11:08 AM, Peter Xu wrote:
> > On Mon, Mar 26, 2018 at 10:33:27AM +0200, Marc-André Lureau wrote:
> >> Hi
> >>
> >> On Mon, Mar 26, 2018 at 10:07 AM, Peter Xu wrote:
> >> > On Fri, Mar 23, 2018 at
On Wed, Mar 28, 2018 at 12:41:41AM +0800, Fam Zheng wrote:
> Some backends report big max_io_sectors. Making min_io_size the same
> value in this case will make it impossible for guest to align memory,
> therefore the disk may not be usable at all.
>
> Do not enlarge them when they are zero.
>
>
On 03/28/2018 11:01 AM, Wang, Wei W wrote:
On Tuesday, March 13, 2018 3:58 PM, Xiao Guangrong wrote:
As compression is a heavy work, do not do it in migration thread, instead, we
post it out as a normal page
Signed-off-by: Xiao Guangrong
Hi Guangrong,
Dave asked me to help review your p
On Tue, Mar 27, 2018 at 10:35:29PM +0800, Xiao Guangrong wrote:
>
>
> On 03/28/2018 08:43 AM, jiang.bi...@zte.com.cn wrote:
> > > On 03/27/2018 07:17 PM, Peter Xu wrote:
> > > > On Tue, Mar 27, 2018 at 03:42:32AM +0800, Xiao Guangrong wrote:
> > > >
> > > > [...]
> > > >
> > > > > > It'll be un
On Tuesday, March 13, 2018 3:58 PM, Xiao Guangrong wrote:
>
> As compression is a heavy work, do not do it in migration thread, instead, we
> post it out as a normal page
>
> Signed-off-by: Xiao Guangrong
Hi Guangrong,
Dave asked me to help review your patch, so I will just drop my 2 cents
w
On 2018年03月27日 21:16, Thomas Huth wrote:
# launch vde switch
vde_switch -F -sock /tmp/myswitch
# launch QEMU instance
-qemu-system-i386 linux.img -net nic -net vde,sock=/tmp/myswitch
+qemu-system-i386 linux.img -nic vde,sock=/tmp/myswitch
I think we should use -netdev here?
I've had
On 2018年03月27日 22:26, Dr. David Alan Gilbert wrote:
* Jason Wang (jasow...@redhat.com) wrote:
On 2018年03月27日 19:34, Dr. David Alan Gilbert (git) wrote:
From: "Dr. David Alan Gilbert"
Hi Ed, Jason,
This set of patches change the e1000 migration code to make
it easier to keep with compat
since linux 4.9, block device supports fallocate. kernel issues
block device zereout request and invalidates page cache. So
ioctl(fd, FALLOC_FL_ZERO_RANGE...) is safer than ioctl(fd,
BLKZEROOUT...). try to call do_fallocate, if failing, fallback.
use new field "has_fallocate_zero_range" with defau
On 03/28/2018 08:43 AM, jiang.bi...@zte.com.cn wrote:
On 03/27/2018 07:17 PM, Peter Xu wrote:
On Tue, Mar 27, 2018 at 03:42:32AM +0800, Xiao Guangrong wrote:
[...]
It'll be understandable to me if the problem is that the compress()
API does not allow the input buffer to be changed during th
On 03/28/2018 08:15 AM, Michael Clark wrote:
> On looking at this again, I think we may need to remove
> the qemu_tcg_mttcg_enabled conditional and always return dirty if the state is
> initial or clean, but not off.
Yes.
> While testing on uniprocessor worked okay, it's likely because we were lu
Writes to the FP register file mark the register file as dirty.
Signed-off-by: Richard Henderson
---
target/riscv/op_helper.c | 25 +
target/riscv/translate.c | 40 +++-
2 files changed, 56 insertions(+), 9 deletions(-)
diff --git a/ta
We will want to track changes to mstatus_fs through the TB.
As there is nothing else in tb_flags at the moment, remove
the variable from DisasContext.
Signed-off-by: Richard Henderson
---
target/riscv/cpu.h | 6 +++---
target/riscv/translate.c | 10 +-
2 files changed, 8 insertion
Since it was my patch that broke FP state tracking in the
first place, I feel obligated to fix it again.
Mark mstatus[fs] as dirty whenever we write to the file.
This can be optimized by only doing so once within a TB
which initially began with a clean file.
I have not yet put together an environ
On Tue, 27 Mar 2018 12:54:47 PDT (-0700), Michael Clark wrote:
This change is a workaround for a bug where mstatus.FS
is not correctly reporting dirty when MTTCG and SMP are
enabled which results in the floating point register file
not being saved during context switches. This a critical
bug for
On Fri, Mar 23, 2018 at 01:36:36PM +0100, Auger Eric wrote:
> Hi,
>
> On 23/03/18 13:11, Peter Maydell wrote:
> > On 23 March 2018 at 12:01, Auger Eric wrote:
> >> Hi,
> >>
> >> On 23/03/18 11:26, Peter Maydell wrote:
> >>> On 23 March 2018 at 10:24, Auger Eric wrote:
> Hi,
>
> I
On Tue, 03/27 18:14, Daniel Henrique Barboza wrote:
> QEMU SCSI code makes assumptions about how the PROTECT and BYTCHK
> works in the protocol, denying support for PI (Protection
> Information) in case the guest OS requests it. However, in SCSI versions 2
> and older, there is no PI concept in the
On Wed, Mar 28, 2018 at 09:19:53AM +0800, Tiwei Bie wrote:
> This macro isn't used by any VFIO code. And its name is
> too generic. The vfio-common.h (in include/hw/vfio) can
> be included by other modules in QEMU. It can introduce
> conflicts.
>
> Signed-off-by: Tiwei Bie
Reviewed-by: Michael S
This macro isn't used by any VFIO code. And its name is
too generic. The vfio-common.h (in include/hw/vfio) can
be included by other modules in QEMU. It can introduce
conflicts.
Signed-off-by: Tiwei Bie
---
include/hw/vfio/vfio-common.h | 9 -
1 file changed, 9 deletions(-)
diff --git a
> On 03/27/2018 07:17 PM, Peter Xu wrote:
>> On Tue, Mar 27, 2018 at 03:42:32AM +0800, Xiao Guangrong wrote:
>>
>> [...]
>>
It'll be understandable to me if the problem is that the compress()
API does not allow the input buffer to be changed during the whole
period of the call. If
This change is a workaround for a bug where mstatus.FS
is not correctly reporting dirty after operations that
modify floating point registers. This a critical bug
or RISC-V in QEMU as it results in floating point
register file corruption when running SMP Linux due to
task migration and possibly uni
This change is a workaround for a bug where mstatus.FS
is not correctly reporting dirty after operations that
modify floating point registers. This a critical bug
or RISC-V in QEMU as it results in floating point
register file corruption when running SMP Linux due to
task migration and possibly uni
This series includes changes that are considered release critical,
such as floating point register file corruption under SMP Linux.
v2
- reverted to Richard W.M. Jone's original, more conservative fix
- reworded comment to be more concise and more general
Michael Clark (1):
RISC-V: Workaround
On Mon, Mar 26, 2018 at 01:54:28AM +0200, BALATON Zoltan wrote:
> According to the Vector/SIMD extension documentation bit 6 that is
> currently masked is valid (listed as transient bit) but bits 7 and 8
> should be reserved instead. Fix the mask to match this.
>
> Signed-off-by: BALATON Zoltan
On Tue, Mar 27, 2018 at 03:54:55PM +0200, Greg Kurz wrote:
> On Tue, 27 Mar 2018 15:37:34 +1100
> David Gibson wrote:
>
> > CPU definitions for cpus with the 64-bit hash MMU can include a table of
> > available pagesizes. If this isn't supplied ppc_cpu_instance_init() will
> > fill it in a fallb
On Mon, Mar 26, 2018 at 05:24:12AM +0200, BALATON Zoltan wrote:
> On Mon, 26 Mar 2018, David Gibson wrote:
> > On Mon, Mar 26, 2018 at 01:54:28AM +0200, BALATON Zoltan wrote:
> > > According to the Vector/SIMD extension documentation bit 6 that is
> > > currently masked is valid (listed as transien
On 03/28/2018 01:43 AM, Michael Clark wrote:
> > + if ((ct & TCG_CT_CONST_N12) && val >= -2047 && val <= 2047) {
>
> +2048?
>
> We use this constraint for a negatable immediate and the constraint is only
> applied to sub. We have no subi, so we implement subi as addi rd, rs1, -imm
>
>
On Tue, Mar 27, 2018 at 10:28 AM, Paolo Bonzini wrote:
> On 27/03/2018 18:47, Dr. David Alan Gilbert wrote:
>>> So if the subsection is absent you
>>> have to migrate either tx.tso_props or tx.props, depending on s->tx.cptse.
>> Do you mean when sending you have to decide which set to send in the
On Tue, Mar 27, 2018 at 3:17 PM, Philippe Mathieu-Daudé
wrote:
> Cc'ing Alex and Richard.
>
> On 03/27/2018 04:54 PM, Michael Clark wrote:
> > This change is a workaround for a bug where mstatus.FS
> > is not correctly reporting dirty when MTTCG and SMP are
> > enabled which results in the floati
On Tue, Mar 27, 2018 at 06:36:46PM -0300, Eduardo Habkost wrote:
> On Tue, Mar 27, 2018 at 10:42:56PM +0300, Michael S. Tsirkin wrote:
> > On Fri, Mar 16, 2018 at 07:36:42AM -0700, Wanpeng Li wrote:
> > > From: Wanpeng Li
> > >
> > > This patch adds support for KVM_CAP_X86_DISABLE_EXITS. Provides
On Tue, Mar 27, 2018 at 7:26 AM, Dr. David Alan Gilbert
wrote:
> If I understand correctly the d6244b description, there's two pieces of
> state (TSO and non-TSO) where there used to be only one.
> Now, with the new format we migrate both pieces of state, but lets think
> about what happens if we
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of the
second release candidate for the QEMU 2.12 release. This release is meant
for testing purposes and should not be used in a production environment.
http://download.qemu-project.org/qemu-2.12.0-rc1.tar.xz
http://do
On 03/27/2018 04:10 PM, Jeff Cody wrote:
> On Tue, Mar 27, 2018 at 06:07:36PM +0200, Marc-André Lureau wrote:
>> This fixes leaks found by ASAN such as:
>> GTESTER tests/test-blockjob
>> =
>> ==31442==ERROR: LeakSanitizer: detected
On Tue, Mar 27, 2018 at 10:21 PM, Eric Blake wrote:
> gcc 8 on rawhide is picky enough to complain:
>
> /home/dummy/qemu/dump.c: In function 'create_header32':
> /home/dummy/qemu/dump.c:817:5: error: 'strncpy' output truncated before
> terminating nul copying 8 bytes from a string of the same len
On 03/26/2018 04:15 PM, Laurent Vivier wrote:
> No code change, only move code from main.c to
> alpha/cpu_loop.c.
>
> Signed-off-by: Laurent Vivier
Reviewed-by: Philippe Mathieu-Daudé
> ---
> linux-user/alpha/cpu_loop.c | 199 ++
> linux-user/main.c
On 03/26/2018 04:16 PM, Laurent Vivier wrote:
> No code change, only move code from main.c to
> hppa/cpu_loop.c.
>
> Signed-off-by: Laurent Vivier
Reviewed-by: Philippe Mathieu-Daudé
> ---
> linux-user/hppa/cpu_loop.c | 185 ++
> linux-user/main.c
On 03/26/2018 04:15 PM, Laurent Vivier wrote:
> No code change, only move code from main.c to
> mips/cpu_loop.c.
>
> Include mips/cpu_loop.c in mips64/cpu_loop.c
> to avoid to duplicate code.
>
> Signed-off-by: Laurent Vivier
Reviewed-by: Philippe Mathieu-Daudé
> ---
> linux-user/main.c
Cc'ing Alex and Richard.
On 03/27/2018 04:54 PM, Michael Clark wrote:
> This change is a workaround for a bug where mstatus.FS
> is not correctly reporting dirty when MTTCG and SMP are
> enabled which results in the floating point register file
> not being saved during context switches. This a cri
On 03/27/2018 04:55 PM, Michael Clark wrote:
> This fixes a bug in the disassembler constraints used
> to lift instructions into pseudo-instructions, whereby
> addiw instructions are always lifted to sext.w instead
> of just lifting addiw with a zero immediate.
>
> An associated fix has been made
On 27/03/2018 23:05, Eric Blake wrote:
> iotests 123 and 209 fail on 32-bit platforms. The culprit:
> sizeof(extent) is wrong; we want sizeof(*extent). But since
> the struct is 8 bytes, it happened to work on 64-bit platforms
> where the pointer is also 8 bytes (nasty).
>
> Fixes: 78a33ab58
> R
> -Original Message-
> From: Eduardo Habkost
> Sent: Wednesday, March 21, 2018 3:30 PM
> To: Moger, Babu
> Cc: pbonz...@redhat.com; r...@twiddle.net; rkrc...@redhat.com;
> Lendacky, Thomas ; Singh, Brijesh
> ; k...@vger.kernel.org; k...@tripleback.net;
> mtosa...@redhat.com; Hook, Gary
On Tue, Mar 27, 2018 at 10:42:56PM +0300, Michael S. Tsirkin wrote:
> On Fri, Mar 16, 2018 at 07:36:42AM -0700, Wanpeng Li wrote:
> > From: Wanpeng Li
> >
> > This patch adds support for KVM_CAP_X86_DISABLE_EXITS. Provides userspace
> > with
> > per-VM capability(KVM_CAP_X86_DISABLE_EXITS) to n
Enable TOPOEXT feature on EPYC CPU. This is required to support
hyperthreading on VM guests. Also extend xlevel to 0x801E.
Signed-off-by: Babu Moger
---
target/i386/cpu.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
ind
Remove generic non-intel check while validating hyperthreading support.
Certain AMD CPUs can support hyperthreading now.
CPU family with TOPOEXT feature can support hyperthreading now.
Signed-off-by: Babu Moger
---
target/i386/cpu.c | 15 +--
1 file changed, 9 insertions(+), 6 delet
Use the statically loaded cache definitions if available
and legacy-cache parameter is not set.
Signed-off-by: Babu Moger
---
target/i386/cpu.c | 22 +-
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index f4fbe3a..738927d
Populate threads/core_id/apic_ids/socket_id when CPUID_EXT3_TOPOEXT
feature is supported. This is required to support hyperthreading feature
on AMD CPUs. This is supported via CPUID_8000_001E extended functions.
Signed-off-by: Babu Moger
---
target/i386/cpu.c | 14 ++
1 file changed,
Add information for cpuid 0x801D leaf. Populate cache topology information
for different cache types(Data Cache, Instruction Cache, L2 and L3) supported
by 0x801D leaf. Please refer Processor Programming Reference (PPR) for AMD
Family 17h Model for more details.
Signed-off-by: Babu Moger
Initialize pre-determined cache information for EPYC processors.
Signed-off-by: Babu Moger
---
target/i386/cpu.c | 96 +++
1 file changed, 96 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index eec4a97..67faa53 100644
--- a/
This will be used to control the cache information.
By default new information will be displayed. If user
passes "-cpu legacy-cache" then older information will
be displayed even if the hardware supports new information.
Signed-off-by: Babu Moger
---
include/hw/i386/pc.h | 6 +-
target/i386/
Add cache information in X86CPUDefinition and CPUX86State.
Signed-off-by: Babu Moger
---
target/i386/cpu.c | 4
target/i386/cpu.h | 8
2 files changed, 12 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index da59dc4..eec4a97 100644
--- a/target/i386/cpu.c
+++ b/t
This series enables the TOPOEXT feature for AMD CPUs. This is required to
support hyperthreading on kvm guests.
This addresses the issues reported in these bugs:
https://bugzilla.redhat.com/show_bug.cgi?id=1481253
https://bugs.launchpad.net/qemu/+bug/1703506
v5:
In this series I tried to addres
From: Eduardo Habkost
Instead of having a collection of macros that need to be used in
complex expressions to build CPUID data, define a CPUCacheInfo
struct that can hold information about a given cache. Helper
functions will take a CPUCacheInfo struct as input to encode
CPUID leaves for a cache
On 03/27/2018 02:21 PM, Fam Zheng wrote:
On Tue, 03/13 13:43, Daniel Henrique Barboza wrote:
QEMU SCSI code makes assumptions about how the PROTECT and BYTCHK
works in the protocol, denying support for PI (Protection
Information) in case the guest OS requests it. However, in SCSI versions 2
an
QEMU SCSI code makes assumptions about how the PROTECT and BYTCHK
works in the protocol, denying support for PI (Protection
Information) in case the guest OS requests it. However, in SCSI versions 2
and older, there is no PI concept in the protocol.
This means that when dealing with such devices:
iotests 123 and 209 fail on 32-bit platforms. The culprit:
sizeof(extent) is wrong; we want sizeof(*extent). But since
the struct is 8 bytes, it happened to work on 64-bit platforms
where the pointer is also 8 bytes (nasty).
Fixes: 78a33ab58
Reported-by: Max Reitz
Signed-off-by: Eric Blake
---
On 27 March 2018 at 10:31, KONRAD Frederic wrote:
> Peter, can this be cherry-picked in 2.12-rc1?
>
> Thanks,
> Fred
>
>
> On 03/20/2018 10:39 AM, KONRAD Frederic wrote:
>>
>> Since the commit:
>> commit 4486e89c219c0d1b9bd8dfa0b1dd5b0d51ff2268
>> Author: Stefan Hajnoczi
>> Date: Wed Mar 7 14:4
On 03/27/2018 05:21 PM, Eric Blake wrote:
> gcc 8 on rawhide is picky enough to complain:
>
> /home/dummy/qemu/dump.c: In function 'create_header32':
> /home/dummy/qemu/dump.c:817:5: error: 'strncpy' output truncated before
> terminating nul copying 8 bytes from a string of the same length
> [-W
gcc 8 on rawhide is picky enough to complain:
/home/dummy/qemu/dump.c: In function 'create_header32':
/home/dummy/qemu/dump.c:817:5: error: 'strncpy' output truncated before
terminating nul copying 8 bytes from a string of the same length
[-Werror=stringop-truncation]
strncpy(dh->signature,
On 27/03/2018 20:01, Dr. David Alan Gilbert wrote:
>> New->old migration will place tx_legacy_vmstate_props in tx.props on the
>> destination; new->new will realize the subsection was transmitted and
>> ignore the tx_legacy_vmstate_props; old->new will not find data from the
>> subsection and copy
On 27 March 2018 at 16:21, Eric Blake wrote:
> The following changes since commit bdc408e91b14cedfc29be8ff703408936e575721:
>
> Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2018-03-26'
> into staging (2018-03-27 14:11:30 +0100)
>
> are available in the Git repository at:
>
>
On Tue, Mar 27, 2018 at 06:07:36PM +0200, Marc-André Lureau wrote:
> This fixes leaks found by ASAN such as:
> GTESTER tests/test-blockjob
> =
> ==31442==ERROR: LeakSanitizer: detected memory leaks
>
> Direct leak of 24 byte(s) in 1
- Model borrowed from target/sh4/cpu.c
- Rewrote riscv_cpu_list to use object_class_get_list
- Dropped 'struct RISCVCPUInfo' and used TypeInfo array
- Replaced riscv_cpu_register_types with DEFINE_TYPES
- Marked base class as abstract
- Fixes -cpu list
Cc: Igor Mammedov
Cc: Sagar Karandikar
Cc:
This fixes a bug in the disassembler constraints used
to lift instructions into pseudo-instructions, whereby
addiw instructions are always lifted to sext.w instead
of just lifting addiw with a zero immediate.
An associated fix has been made to the metadata used to
machine generate the disseasemble
This series includes changes that are considered important.
i.e. correct user-visible bugs that are exercised by common
operations such as -cpu list or -d in_asm
Michael Clark (2):
RISC-V: Convert cpu definition to future model
RISC-V: Fix incorrect disassembly for addiw
disas/riscv.c |
This change is a workaround for a bug where mstatus.FS
is not correctly reporting dirty when MTTCG and SMP are
enabled which results in the floating point register file
not being saved during context switches. This a critical
bug for RISC-V in QEMU as it results in floating point
register file corr
This series includes changes that are considered release critical,
such as floating point register file corruption under SMP Linux.
Michael Clark (1):
RISC-V: Workaround for critical mstatus.FS MTTCG bug
target/riscv/op_helper.c | 19 +--
1 file changed, 17 insertions(+), 2 del
On Fri, Mar 16, 2018 at 07:36:42AM -0700, Wanpeng Li wrote:
> From: Wanpeng Li
>
> This patch adds support for KVM_CAP_X86_DISABLE_EXITS. Provides userspace
> with
> per-VM capability(KVM_CAP_X86_DISABLE_EXITS) to not intercept MWAIT/HLT/PAUSE
> in order that to improve latency in some workloa
* Xiao Guangrong (guangrong.x...@gmail.com) wrote:
>
>
> On 03/26/2018 05:02 PM, Peter Xu wrote:
> > On Thu, Mar 22, 2018 at 07:38:07PM +0800, Xiao Guangrong wrote:
> > >
> > >
> > > On 03/21/2018 04:19 PM, Peter Xu wrote:
> > > > On Fri, Mar 16, 2018 at 04:05:14PM +0800, Xiao Guangrong wrote:
On 03/27/2018 12:07 PM, Marc-André Lureau wrote:
> This fixes leaks found by ASAN such as:
> GTESTER tests/test-blockjob
> =
> ==31442==ERROR: LeakSanitizer: detected memory leaks
>
> Direct leak of 24 byte(s) in 1 object(s) alloc
On Tue, Mar 27, 2018 at 11:39 AM, Michael Clark wrote:
>
> I will divide the series up into 3 branches, and move through them in
> order of priority, with correctness ahead of tidyness:
>
> 1). riscv-qemu-2.12-critical-fixes
> 2). riscv-qemu-2.13-bug-fixes
> 3). riscv-qemu-2.13-tidy-ups
>
I thin
On Tue, Mar 27, 2018 at 2:42 AM, Peter Maydell
wrote:
> On 26 March 2018 at 19:07, Michael Clark wrote:
> > On Sun, Mar 25, 2018 at 8:03 AM, Peter Maydell >
> > wrote:
> >> Hi. It looks to me like a fair number of these patches
> >> are already reviewed, so we don't need to wait on the
> >> res
On 27 March 2018 at 15:41, Stefan Hajnoczi wrote:
> The following changes since commit f58d9620aa4a514b1227074ff56eefd1334a6225:
>
> Merge remote-tracking branch 'remotes/rth/tags/pull-dt-20180326' into
> staging (2018-03-27 10:27:34 +0100)
>
> are available in the Git repository at:
>
> git:
On Tue, Mar 27, 2018 at 12:49:48 +0100, Alex Bennée wrote:
> Emilio G. Cota writes:
>
> > The appended paves the way for leveraging the host FPU for a subset
> > of guest FP operations. For most guest workloads (e.g. FP flags
> > aren't ever cleared, inexact occurs often and rounding is set to th
On Tue, Mar 27, 2018 at 12:41:18 +0100, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > On Thu, Mar 22, 2018 at 14:41:05 +0800, Richard Henderson wrote:
> > (snip)
> >> Another thought re all of the soft_is_normal || soft_is_zero checks that
> >> you're
> >> performing. I think it would be
Hi,
This series failed docker-quick@centos6 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20180326115346.11939-1-vsement...@virtuozzo.com
Subject: [Qemu-devel] [PATCH 5.5/7] dirty
On Tue, Mar 27, 2018 at 12:34:57 +0100, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > This paves the way for upcoming work.
> >
> > Signed-off-by: Emilio G. Cota
>
> Reviewed-by: Alex Bennée
(snip)
On Tue, Mar 27, 2018 at 12:35:07 +0100, Alex Bennée wrote:
>
> Emilio G. Cota writes:
On Tue, Mar 27, 2018 at 12:33:55 +0100, Alex Bennée wrote:
> Emilio G. Cota writes:
>
> > These are a few muladd-related operations that the original IBM syntax
> > does not specify; model files for these are in muladd.fptest.
> >
> > Signed-off-by: Emilio G. Cota
(snip)
> > +case OP_MUL
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> On 27/03/2018 18:47, Dr. David Alan Gilbert wrote:
> >> So if the subsection is absent you
> >> have to migrate either tx.tso_props or tx.props, depending on s->tx.cptse.
> > Do you mean when sending you have to decide which set to send in the
> > non-
On Tue, Mar 27, 2018 at 11:13:01 +0100, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > This will allow us to run correctness tests against our
> > FP implementation. The test can be run in two modes (called
> > "testers"): host and soft. With the former we check the results
> > and FP flags
On Tue, Mar 27, 2018 at 3:52 AM, Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 03/25/2018 05:24 AM, Michael Clark wrote:
> > Running with `-d in_asm,op,op_opt,out_asm` is very helpful
> > for debugging. Note: due to a limitation in QEMU, the backend
> > disassembler is not compiled
Public bug reported:
This has been reported and discussed downstream:
https://bugzilla.redhat.com/show_bug.cgi?id=1484130
but doesn't seem to be getting a lot of traction there.
Basically, with qemu since at least 2.10, you cannot use a disk image on
an SMB share that's mounted with protocol ve
Public bug reported:
When booting a SPARCstation-20 with the original ROM, qemu does not set
the number of processors in a way that this ROM can understand it, and
the ROM always reports only 1 processor installed:
~/qemu /usr/local/bin/qemu-system-sparc -bios ./ss20_v2.25_rom -M SS-20 -cpu
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