Let "migrate-incoming" command be run without BQL. Then even if any
thread hanged with BQL held, we can still run this command.
Signed-off-by: Peter Xu
---
qapi-schema.json | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/qapi-schema.json b/qapi-schema.json
index 802ea53..b
Allow this command to run without BQL held.
Signed-off-by: Peter Xu
---
hmp-commands.hx | 1 +
1 file changed, 1 insertion(+)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index 1941e19..e8d8812 100644
--- a/hmp-commands.hx
+++ b/hmp-commands.hx
@@ -968,6 +968,7 @@ ETEXI
.params =
Introducing this new parameter for QMP commands in general to mark out
when the command does not need BQL. Normally QMP command executions are
done with the protection of BQL in QEMU. However the truth is that not
all the QMP commands require the BQL.
This new parameter provides a way to allow Q
KVM guests on s390 need a different page table layout than normal
processes (2kb page table + 2kb page status extensions vs 2kb page table
only). As of today this has to be enabled via the vm.allocate_pgste
sysctl.
Newer kernels (>= 4.12) on s390 check for an S390_PGSTE program header
and enable t
On 08/23/2017 08:53 AM, Christian Borntraeger wrote:
> KVM guests on s390 need a different page table layout than normal
> processes (2kb page table + 2kb page status extensions vs 2kb page table
> only). As of today this has to be enabled via the vm.allocate_pgste
> sysctl.
>
> Newer kernels (>
Introducing new option "without_bql" for HMP commands. It works just
like QMP "without-bql", but for HMP commands.
Signed-off-by: Peter Xu
---
monitor.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/monitor.c b/monitor.c
index 3d4ecff..c26c797 100644
--- a/monitor.c
+++ b/moni
Now at least migrate_incoming can be run in parallel. Let's provide a
migration lock to protect it.
Signed-off-by: Peter Xu
---
migration/migration.c | 6 ++
migration/migration.h | 3 +++
2 files changed, 9 insertions(+)
diff --git a/migration/migration.c b/migration/migration.c
index c3f
This is not a problem if we are only having one single loop thread like
before. However, after per-monitor thread is introduced, this is not
true any more, and the risk can happen.
The risk can be triggered with "make check -j8" sometimes:
qemu-system-x86_64: /root/git/qemu/chardev/char-io.c:9
It's part of the data init. Collect it.
Signed-off-by: Peter Xu
---
monitor.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/monitor.c b/monitor.c
index e0f8801..7c90df7 100644
--- a/monitor.c
+++ b/monitor.c
@@ -568,13 +568,14 @@ static void monitor_qapi_event_init
v2:
- fixed "make check" error that patchew reported
- moved the thread_join upper in monitor_data_destroy(), before
resources are released
- added one new patch (current patch 3) that fixes a nasty risk
condition with IOWatchPoll. Please see commit message for more
information.
- added a g_
Firstly, introduce Monitor.use_thread, and set it for monitors that are
using non-mux typed backend chardev. We only do this for monitors, so
mux-typed chardevs are not suitable (when it connects to, e.g., serials
and the monitor together).
When use_thread is set, we create standalone thread to p
On 23/08/2017 07:01, Fam Zheng wrote:
> On Tue, 08/22 15:18, Paolo Bonzini wrote:
>> Proper support of persistent reservation for multipath devices requires
>> communication with the multipath daemon, so that the reservation is
>> registered and applied when a path comes up. The device mapper
>> u
Hi Linu,
On 23/08/2017 06:24, Linu Cherian wrote:
> Hi Eric,
>
>
> On Fri Aug 11, 2017 at 04:22:33PM +0200, Eric Auger wrote:
>> This patch allows doing PCIe passthrough with a guest exposed
>> with a vSMMUv3. It implements the replay and notify_flag_changed
>> iommu ops. Also on TLB and data st
On 23.08.2017 07:40, Thomas Huth wrote:
> On 23.08.2017 02:10, Philippe Mathieu-Daudé wrote:
>> On 08/22/2017 07:42 PM, Michael S. Tsirkin wrote:
>>> On Tue, Aug 22, 2017 at 06:43:43PM -0300, Philippe Mathieu-Daudé wrote:
9e047b982452 "piix4: add acpi pci hotplug support" introduced a new
Wire in ompic and add basic support for SMP. The OpenRISC is special in
that interrupts for devices are routed to each core's PIC. This is
achieved using the qemu_irq_split utility, but this currently limits
OpenRISC to 2 cores.
This models the reference architecture described in the OpenRISC sp
Previously coreid and numcores were hard coded as 0 and 1 respectively
as OpenRISC QEMU did not have multicore support.
Multicore support is now being added so these registers need to have
configured values.
Signed-off-by: Stafford Horne
---
hw/openrisc/openrisc_sim.c | 3 +++
target/openrisc
In order to support multicore system we move some of the previously
static state variables into the state of each core.
On the other hand in order to allow timers to be synced between each
code the ttcr (tick timer count register) is moved out of the core.
This is not as per real hardware spec whi
Previously we were kicking the cpu on every update. This caused
problems noticeable in SMP configurations where one CPU got pinned
continuously servicing timer exceptions.
Signed-off-by: Stafford Horne
---
hw/openrisc/cputimer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Add OpenRISC Multicore PIC which handles inter processor interrupts
(IPI) between cores. In OpenRISC all device interrupts are routed to
each core enabling this device to be simple.
Signed-off-by: Stafford Horne
---
default-configs/or1k-softmmu.mak | 1 +
hw/intc/Makefile.objs|
Hello,
This series adds SMP support for OpenRISC. The platform is based on the
work that Stefan Kristiansson did around 2012 implemented in Verilog and
run on FPGAs. I have been working to upstream this work, these are my QEMU
patches I have been used to help with testing.
I have documented the
On 23.08.2017 02:10, Philippe Mathieu-Daudé wrote:
> On 08/22/2017 07:42 PM, Michael S. Tsirkin wrote:
>> On Tue, Aug 22, 2017 at 06:43:43PM -0300, Philippe Mathieu-Daudé wrote:
>>> 9e047b982452 "piix4: add acpi pci hotplug support" introduced a new
>>> property
>>> 'use_acpi_pci_hotplug' for pc-1.
On 22.08.2017 20:15, KONRAD Frederic wrote:
> Hi Thomas,
>
> Looking to this seems there is a second issue:
> The aux-to-i2c-bridge device should connect on a TYPE_AUX_BUS.
>
> I don't think there isn't any on integratorcp..
>
> Anyway the patch you sent fix this issue indirectly and as far as
>
On Tue, 08/22 15:18, Paolo Bonzini wrote:
> It is pretty common to read a fixed-size buffer from a socket. Add a
> function that does this, either with multiple reads (on blocking sockets)
> or by yielding if called from a coroutine.
>
> Cc: Daniel P. Berrange
> Signed-off-by: Paolo Bonzini
> -
On Tue, 08/22 15:18, Paolo Bonzini wrote:
> Proper support of persistent reservation for multipath devices requires
> communication with the multipath daemon, so that the reservation is
> registered and applied when a path comes up. The device mapper
> utilities provide a library to do so; this pa
On Tue, 08/22 15:18, Paolo Bonzini wrote:
> This adds a concrete subclass of pr-manager that talks to qemu-pr-helper.
>
> Signed-off-by: Paolo Bonzini
> ---
> scsi/Makefile.objs | 2 +-
> scsi/pr-manager-helper.c | 288
> +++
> 2 files changed
Hi Eric,
On Fri Aug 11, 2017 at 04:22:33PM +0200, Eric Auger wrote:
> This patch allows doing PCIe passthrough with a guest exposed
> with a vSMMUv3. It implements the replay and notify_flag_changed
> iommu ops. Also on TLB and data structure invalidation commands,
> we replay the mappings so tha
On Sun, Aug 20, 2017 at 07:23:05PM +0200, BALATON Zoltan wrote:
> Add emulation of aCube Sam460ex board based on AMCC 460EX embedded SoC.
> This is not a full implementation yet with a lot of components still
> missing but enough to start a Linux kernel and the U-Boot firmware.
>
> Signed-off-by:
On Tue, 08/22 15:18, Paolo Bonzini wrote:
> diff --git a/docs/pr-manager.rst b/docs/pr-manager.rst
Is docs/interop/persistent-reservation-manager.rst better? (Move to interop/ and
de-abbreviate) ...
> new file mode 100644
> index 00..b6089fb57c
> --- /dev/null
> +++ b/docs/pr-manager.rst
Hi Michael,
At 08/23/2017 10:48 AM, Michael S. Tsirkin wrote:
On Tue, Aug 22, 2017 at 11:24:08AM +0800, Dou Liyang wrote:
V3 --> v4:
-add a new testcase.
This patchset fixs an ACPI building bug which caused by no RAM
in the first NUAM node. and also add a new testcase for the bug.
thanks!
On Sun, Aug 20, 2017 at 06:58:52PM -0300, Philippe Mathieu-Daudé wrote:
> Hi Zoltan,
>
> On 08/20/2017 02:23 PM, BALATON Zoltan wrote:
> > These registers are present in 440 SoCs (and maybe in others too) and
> > U-Boot accesses them when printing register info. We don't emulate
> > these but add
On Sun, Aug 20, 2017 at 07:23:05PM +0200, BALATON Zoltan wrote:
> These devices are found in newer SoCs based on 440 core e.g. the 460EX
> (http://www.embeddeddeveloper.com/assets/processors/amcc/datasheets/
> PP460EX_DS2063.pdf)
As usual, I can't review in depth, but there's not much obviously
bo
On Sun, Aug 20, 2017 at 07:23:05PM +0200, BALATON Zoltan wrote:
> Despite its name it is a 440 core CPU
As I recall 460 was supposed to be a 440 with SMP support. Except
they screwed up the cache coherence, so it's basically unusable for
SMP (at least with Linux). They finally got 440 SMP right
On Sun, Aug 20, 2017 at 07:23:05PM +0200, BALATON Zoltan wrote:
> These registers are present in 440 SoCs (and maybe in others too) and
> U-Boot accesses them when printing register info. We don't emulate
> these but add them to avoid crashing when they are read or written.
>
> Signed-off-by: BALA
On Sun, Aug 20, 2017 at 07:23:05PM +0200, BALATON Zoltan wrote:
> Make these device models available outside ppc405_uc.c for reuse in
> 460EX emulation. They are left in their current place for now because
> they are used mostly unchanged and I'm not sure these correctly model
> the components in 4
On Tue, Aug 22, 2017 at 11:24:08AM +0800, Dou Liyang wrote:
> V3 --> v4:
> -add a new testcase.
>
> This patchset fixs an ACPI building bug which caused by no RAM
> in the first NUAM node. and also add a new testcase for the bug.
thanks!
Pls remember to ping or repost after release is out.
> D
On Tue, Aug 22, 2017 at 02:43:39PM +0300, Marcel Apfelbaum wrote:
> On 18/08/2017 2:36, Aleksandr Bezzubikov wrote:
> > This series introduces a new device - Generic PCI Express to PCI bridge,
> > and also makes all necessary changes to enable hotplug of the bridge itself
> > and any device into th
Hi all,
I start VM using command like this:
-chardev socket,path=/home/gangyewei-3/kvm/qga.sock,server,nowait,id=qga0
> -device virtio-serial -device virtserialport,chardev=qga0,
> name=org.qemu.guest_agent.0
But When I use socat to send command (https://wiki.qemu.org/
Features/GuestAgent), it
On Tue, Aug 22, 2017 at 06:02:12PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> If the bdrv_inactivate_all fails near the end of the migration,
> the migration will fail and often the only diagnostics in the log
> are an I/O error which you can't distinguish fro
On 08/18/2017 07:08 AM, Igor Mammedov wrote:
QOMfy cpu models handling introducing propper cpu types
for each cpu model.
Signed-off-by: Igor Mammedov
---
with this and conversion of features to properties,
it would be possible to replace cpu_sparc_init() with
cpu_generic_init() and reuse common
On Sun, Aug 20, 2017 at 07:23:05PM +0200, BALATON Zoltan wrote:
> This is the PCIX controller found in newer 440 core SoCs e.g. the AMMC
> 460EX. The device tree refers to this as plb-pcix compared to the
> plb-pci controller in older 440 SoCs.
>
> Signed-off-by: BALATON Zoltan
So I don't have t
On Tue, Aug 22, 2017 at 03:01:18PM -0400, John Snow wrote:
>
>
> On 08/22/2017 07:08 AM, BALATON Zoltan wrote:
> > Hello,
> >
> > Thanks for the review.
> >
> > On Mon, 21 Aug 2017, John Snow wrote:
> >> On 08/20/2017 01:23 PM, BALATON Zoltan wrote:
> >>> This is a common generic PCI SATA conro
On Wed, 23 Aug 2017, David Gibson wrote:
On Tue, Aug 22, 2017 at 01:18:02PM +0200, BALATON Zoltan wrote:
On Tue, 22 Aug 2017, David Gibson wrote:
On Fri, Aug 18, 2017 at 02:46:42PM +0200, BALATON Zoltan wrote:
On Fri, 18 Aug 2017, David Gibson wrote:
On Sun, Aug 13, 2017 at 07:04:38PM +0200,
On Mon, Aug 21, 2017 at 02:40:17PM +0530, Aravinda Prasad wrote:
>
>
> On Thursday 17 August 2017 09:05 AM, Sam Bobroff wrote:
> > On Wed, Aug 16, 2017 at 02:41:59PM +0530, Aravinda Prasad wrote:
> >> This series of patches adds support for FWNMI in PowerKVM guests.
> >>
> >> Memory error such as
On Tue, Aug 22, 2017 at 09:23:26AM -0300, Daniel Henrique Barboza wrote:
> v2:
> - added Laurent's fix in 'kvmppc_pvr_workaround_required' to avoid
> returning true when running with TCG.
Thanks, but I already altered this inline. I made a slight change, so
that we check for kvm enabled before lo
From: Thomas Huth
QEMU currently crashes when trying to use a 'pc-dimm' on the pseries
machine without specifying its 'memdev' property. This happens because
pc_dimm_get_memory_region() does not check whether the 'memdev' property
has properly been set by the user. Looking closer at this function
On Tue, Aug 22, 2017 at 01:18:02PM +0200, BALATON Zoltan wrote:
> On Tue, 22 Aug 2017, David Gibson wrote:
> > On Fri, Aug 18, 2017 at 02:46:42PM +0200, BALATON Zoltan wrote:
> > > On Fri, 18 Aug 2017, David Gibson wrote:
> > > > On Sun, Aug 13, 2017 at 07:04:38PM +0200, BALATON Zoltan wrote:
> > >
From: Cornelia Huck
Prefer to use the tcg accelarator if it is available: This is our only
real smoke test for tcg, and fast enough to use it for that.
Fixes: 480bc11e6 ("boot-serial-test: fallback to kvm accelerator")
Reported-by: Richard Henderson
Signed-off-by: Cornelia Huck
Signed-off-by:
The following changes since commit 1f296733876434118fd766cfef5eb6f29ecab6a8:
Update version for v2.10.0-rc3 release (2017-08-15 18:53:31 +0100)
are available in the git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-2.10-20170823
for you to fetch changes up to 1f98e55385d11da
On Tue, Aug 22, 2017 at 11:52:00AM +0100, Peter Maydell wrote:
> On 22 August 2017 at 11:41, Laurent Vivier wrote:
> > On 22/08/2017 11:53, Peter Maydell wrote:
> >> On 22 August 2017 at 10:43, Laurent Vivier wrote:
> >>> On 22/08/2017 11:34, Peter Maydell wrote:
> I get a make check failure
From: Greg Kurz
When running in KVM PR mode, kvmppc_set_compat() always fail because the
current PR implementation doesn't handle KVM_REG_PPC_ARCH_COMPAT. Now that
the machine code inconditionally calls ppc_set_compat_all() at reset time
to restore the compat mode default value (commit 66d5c492dd
On Tue, Aug 22, 2017 at 01:48:15PM +0200, Cornelia Huck wrote:
> On Tue, 22 Aug 2017 21:20:46 +1000
> David Gibson wrote:
>
> > Obviously it's not a thing to fix right now, but I've really been
> > thinking that none of the tests should use this "TCG or KVM" stuff.
> > They should instead be run
From: Thomas Huth
QEMU currently aborts unexpectedly when the user tries to add and
remove a "spapr-tce-table" device:
$ qemu-system-ppc64 -nographic -S -nodefaults -monitor stdio
QEMU 2.9.92 monitor - type 'help' for more information
(qemu) device_add spapr-tce-table,id=x
(qemu) device_del x
**
From: Thomas Huth
QEMU currently aborts unexpectedly when a user tries to do something
like this:
$ qemu-system-ppc64 -nographic -S -nodefaults -monitor stdio
QEMU 2.9.92 monitor - type 'help' for more information
(qemu) device_add spapr-rtc,id=spapr-rtc
(qemu) device_del spapr-rtc
**
ERROR:qemu
From: Daniel Henrique Barboza
Commit d5fc133eed ("ppc: Rework CPU compatibility testing
across migration") changed the way cpu_post_load behaves with
the PVR setting, causing an unexpected bug in KVM-HV migrations
between hosts that are compatible (POWER8 and POWER8E, for example).
Even with pvr_
On Tue, Aug 22, 2017 at 08:50:44PM -0300, Daniel Henrique Barboza wrote:
>
>
> On 08/18/2017 01:14 AM, David Gibson wrote:
> > On Thu, Aug 17, 2017 at 06:31:28PM -0300, Daniel Henrique Barboza wrote:
> > >
> > > On 08/17/2017 04:52 AM, David Gibson wrote:
> > > > On Tue, Aug 15, 2017 at 05:28:46
From: Bharata B Rao
In case of in-kernel memory hot unplug, when the guest is not able
to remove all the LMBs that are requested for removal, it will add back
any LMBs that have been successfully removed. The DR Connectors of
these LMBs wouldn't have been unconfigured and hence the addition of
th
On 08/22/2017 07:42 PM, Michael S. Tsirkin wrote:
On Tue, Aug 22, 2017 at 06:43:43PM -0300, Philippe Mathieu-Daudé wrote:
9e047b982452 "piix4: add acpi pci hotplug support" introduced a new property
'use_acpi_pci_hotplug' for pc-1.7 and older machines.
c24d5e0b91d1 "convert ACPI PCI hotplug to u
On 08/18/2017 01:14 AM, David Gibson wrote:
On Thu, Aug 17, 2017 at 06:31:28PM -0300, Daniel Henrique Barboza wrote:
On 08/17/2017 04:52 AM, David Gibson wrote:
On Tue, Aug 15, 2017 at 05:28:46PM -0300, Daniel Henrique Barboza wrote:
This patch is a follow up on the discussions that started
On Tue, Aug 22, 2017 at 06:43:43PM -0300, Philippe Mathieu-Daudé wrote:
> 9e047b982452 "piix4: add acpi pci hotplug support" introduced a new property
> 'use_acpi_pci_hotplug' for pc-1.7 and older machines.
> c24d5e0b91d1 "convert ACPI PCI hotplug to use hotplug-handler API" added the
> qbus hotplu
Hi,
I'm a GSoC student and I have completed my project "Generic PCIE-PCI Bridge".
Its aim was to create a new device to replace existing DMI-PCI bridge
as it isn't
cross-platform and doesn't support hotplugging.
By completing this project next goals were achieved:
1. Introduce a brand new pcie-pci-
On 08/22/2017 05:02 PM, Philippe Mathieu-Daudé wrote:
> On 08/22/2017 03:39 PM, John Snow wrote:
>> On 08/22/2017 02:15 PM, Thomas Huth wrote:
>>>
>>> Looks like there is a use-after-free problem somewhere in
>>> the ahci.c or ich.c code when trying to add the ich9-ahci
>>> on a old PC machine. U
On Tue, 22 Aug 2017, John Snow wrote:
On 08/22/2017 04:15 PM, BALATON Zoltan wrote:
On Tue, 22 Aug 2017, John Snow wrote:
On 08/22/2017 07:08 AM, BALATON Zoltan wrote:
On Mon, 21 Aug 2017, John Snow wrote:
Sure, but be advised that if the device causes problems outside of this
use case and t
9e047b982452 "piix4: add acpi pci hotplug support" introduced a new property
'use_acpi_pci_hotplug' for pc-1.7 and older machines.
c24d5e0b91d1 "convert ACPI PCI hotplug to use hotplug-handler API" added the
qbus hotplug handlers but forgot to check for the 'use_acpi_pci_hotplug'
property.
Check f
On 08/22/2017 03:39 PM, John Snow wrote:
On 08/22/2017 02:15 PM, Thomas Huth wrote:
Looks like there is a use-after-free problem somewhere in
the ahci.c or ich.c code when trying to add the ich9-ahci
on a old PC machine. Using valgrind, I get:
those old PC don't support AHCI hotplug, so real
On 08/22/2017 04:15 PM, BALATON Zoltan wrote:
> On Tue, 22 Aug 2017, John Snow wrote:
>> On 08/22/2017 07:08 AM, BALATON Zoltan wrote:
>>> On Mon, 21 Aug 2017, John Snow wrote:
>>
>> Sure, but be advised that if the device causes problems outside of this
>> use case and there's nobody willing or
On Tue, 22 Aug 2017, John Snow wrote:
On 08/22/2017 07:08 AM, BALATON Zoltan wrote:
Hello,
Thanks for the review.
On Mon, 21 Aug 2017, John Snow wrote:
On 08/20/2017 01:23 PM, BALATON Zoltan wrote:
This is a common generic PCI SATA conroller that is also used in PCs
but more importantly gues
With the patch from Stefan and your debug applied source and target I still run
into the same issue I'd say.
Id's are slightly off, but they are different on every try anyway.
Still looks the same for me:
bdrv_inactivate_recurse: entry for drive-virtio-disk0
bdrv_inactivate_recurse: entry for #bl
(CCing Cleber and Stefan)
On Tue, Aug 22, 2017 at 07:19:45AM -0300, Philippe Mathieu-Daudé wrote:
[...]
> Can we predict how the python scripts will evolve? Only fast-testing?
>
I guess it depends on how you define "fast". Does "fast-testing"
include a full device-crash-test run (that could tak
Well, we knew we'd want this sooner or later. I've got some pings
downstream over whether or not we support persistent bitmaps for
non-qcow2 formats.
Currently: no, we don't.
We tried two different ideas for storage agnostic bitmap persistence:
(1) Using qcow2 as a storage container format (sim
On Tue, Aug 22, 2017 at 03:13:57PM +, Diana Madalina Craciun wrote:
> On 08/11/2017 06:50 PM, Edgar E. Iglesias wrote:
> > On Fri, Aug 11, 2017 at 02:35:28PM +, Diana Madalina Craciun wrote:
> >> Hi Edgar,
> >>
> >> On 07/31/2017 06:16 PM, Edgar E. Iglesias wrote:
> >>> On Wed, Jul 26, 2017
On 08/08/2017 04:00 PM, Eric Blake wrote:
> On 08/08/2017 01:32 PM, John Snow wrote:
>> Out with the old, in with the new.
>>
>> Signed-off-by: John Snow
>> ---
>
>> hw/ide/piix.c | 11
>> hw/ide/trace-events | 33
>> hw/ide/via.c
On 08/22/2017 07:08 AM, BALATON Zoltan wrote:
> Hello,
>
> Thanks for the review.
>
> On Mon, 21 Aug 2017, John Snow wrote:
>> On 08/20/2017 01:23 PM, BALATON Zoltan wrote:
>>> This is a common generic PCI SATA conroller that is also used in PCs
>>> but more importantly guests running on the Sa
On Tue, Aug 22, 2017 at 09:24:16AM +0200, Markus Armbruster wrote:
> John Snow writes:
>
> > On 08/18/2017 10:26 AM, Lukáš Doktor wrote:
> >> Hello guys,
> >>
> >> I'm reading the available python modules to exercise qemu and while
> >> reading them
> >> I fixed some issues that caught my atten
On Tue, Aug 22, 2017 at 03:22:54PM +0200, Marc-André Lureau wrote:
> Signed-off-by: Marc-André Lureau
> ---
> qapi-schema.json | 4 +++-
> include/sysemu/arch_init.h | 3 ---
> monitor.c | 3 ---
> qmp.c
On 08/22/2017 02:15 PM, Thomas Huth wrote:
>
> Hi!
>
> Looks like there is a use-after-free problem somewhere in
> the ahci.c or ich.c code when trying to add the ich9-ahci
> on a old PC machine. Using valgrind, I get:
>
I'll look; it looks like it works okay for pc-i440fx-2.9 as well as 2.0
Hi Thomas,
Looking to this seems there is a second issue:
The aux-to-i2c-bridge device should connect on a TYPE_AUX_BUS.
I don't think there isn't any on integratorcp..
Anyway the patch you sent fix this issue indirectly and as far as
I remember I wasn't able to make this I2C bridge an
TYPE_AUX
Hi!
Looks like there is a use-after-free problem somewhere in
the ahci.c or ich.c code when trying to add the ich9-ahci
on a old PC machine. Using valgrind, I get:
$ valgrind x86_64-softmmu/qemu-system-x86_64 -M pc-1.2 -nographic -S
==6604== Memcheck, a memory error detector
==6604== Copyright
On 08/22/2017 03:24 AM, Markus Armbruster wrote:
> John Snow writes:
>
>> On 08/18/2017 10:26 AM, Lukáš Doktor wrote:
>>> Hello guys,
>>>
>>> I'm reading the available python modules to exercise qemu and while reading
>>> them
>>> I fixed some issues that caught my attention. It usually starts
On 08/22/2017 09:22 AM, Marc-André Lureau wrote:
> This will help with the introduction of a new structure to handle
> enum lookup.
>
Procedurally for the sake of review, it's a little odd to introduce the
function, deploy it, and then change it and update all callers.
content-wise, I'm really
On Tue, Aug 22, 2017 at 10:56:59AM -0600, Alex Williamson wrote:
> On Tue, 22 Aug 2017 15:04:55 +0800
> Bob Chen wrote:
>
> > Hi,
> >
> > I got a spec from Nvidia which illustrates how to enable GPU p2p in
> > virtualization environment. (See attached)
>
> Neat, looks like we should implement a
On 22 August 2017 at 18:57, Alistair Francis
wrote:
> On Tue, Aug 22, 2017 at 10:24 AM, Edgar E. Iglesias
> wrote:
>> On Thu, Aug 17, 2017 at 11:51:59AM -0700, Alistair Francis wrote:
>>> The EL2 and EL3 work is working well now and interanlly we now have
>>> tests that expect to start in EL3 and
I didn't add Stefans patch yet.
Note: the Mentioned patch is at: Note:
http://lists.nongnu.org/archive/html/qemu-devel/2017-08/msg04027.html
With your debug patch applied I get:
2017-08-22 17:57:04.486+: initiating migration
bdrv_inactivate_recurse: entry for drive-virtio-disk0
bdrv_inactivat
On Tue, 22 Aug 2017, Ross Lagerwall wrote:
> On 08/21/2017 11:30 PM, Stefano Stabellini wrote:
> > On Mon, 21 Aug 2017, Ross Lagerwall wrote:
> > > When the guest writes to the RTC, Xen emulates it and broadcasts a
> > > TIMEOFFSET ioreq. Emit an RTC_CHANGE QMP message when this happens
> > > rathe
On Tue, Aug 22, 2017 at 10:24 AM, Edgar E. Iglesias
wrote:
> On Thu, Aug 17, 2017 at 11:51:59AM -0700, Alistair Francis wrote:
>> The EL2 and EL3 work is working well now and interanlly we now have
>> tests that expect to start in EL3 and transition through EL2 to EL1. To
>> make this easy to run
On 2017-08-22 08:52, Markus Armbruster wrote:
> Suggested-by: Max Reitz
> Signed-off-by: Markus Armbruster
> ---
> include/qapi/qmp/qnum.h | 21 +
> 1 file changed, 21 insertions(+)
Thanks again!
Reviewed-by: Max Reitz
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On 22 August 2017 at 13:47, Thomas Huth wrote:
> QEMU currently aborts if the user is accidentially trying to
> do something like this:
>
> $ aarch64-softmmu/qemu-system-aarch64 -S -M integratorcp -nographic
> QEMU 2.9.93 monitor - type 'help' for more information
> (qemu) device_add ast2400
> Une
On 22 August 2017 at 15:30, Thomas Huth wrote:
> QEMU currently shows some unexpected behavior when the user trys to
> do a "device_add digic" on an unrelated ARM machine like integratorcp
> in "-nographic" mode (the device_add command does not immediately
> return to the monitor prompt), and tryi
On Thu, Aug 17, 2017 at 11:52:04AM -0700, Alistair Francis wrote:
> In preperation for future work let's manually create the Xilnx machines.
> This will allow us to set properties for the machines in the future.
>
> Signed-off-by: Alistair Francis
> ---
>
> hw/arm/xlnx-zcu102.c | 75
>
On Thu, Aug 17, 2017 at 11:51:59AM -0700, Alistair Francis wrote:
> The EL2 and EL3 work is working well now and interanlly we now have
> tests that expect to start in EL3 and transition through EL2 to EL1. To
> make this easy to run let's expose the secure property to the machine
> and then use th
On 22 August 2017 at 18:04, Sean Bruno wrote:
>
>
> On 08/22/17 10:57, Peter Maydell wrote:
>> On 22 August 2017 at 17:52, Sean Bruno wrote:
>>> I note that there hasn't been any updates to the github copy of the main
>>> project repo. Just curious if I missed a thing or if someone can go
>>> lo
On 2017-08-22 01:31, John Snow wrote:
>
>
> On 08/17/2017 05:15 AM, Pavel Butsykin wrote:
>> This patch add shrinking of the image file for qcow2. As a result, this
>> allows
>> us to reduce the virtual image size and free up space on the disk without
>> copying the image. Image can be fragmente
On 08/22/17 10:57, Peter Maydell wrote:
> On 22 August 2017 at 17:52, Sean Bruno wrote:
>> I note that there hasn't been any updates to the github copy of the main
>> project repo. Just curious if I missed a thing or if someone can go
>> look to see what's up.
>
> Hmm? https://github.com/qemu/
From: "Dr. David Alan Gilbert"
If the bdrv_inactivate_all fails near the end of the migration,
the migration will fail and often the only diagnostics in the log
are an I/O error which you can't distinguish from an error on
the socket connection.
Add an error so we know when it's actually a block
On Tue, 22 Aug 2017 15:04:55 +0800
Bob Chen wrote:
> Hi,
>
> I got a spec from Nvidia which illustrates how to enable GPU p2p in
> virtualization environment. (See attached)
Neat, looks like we should implement a new QEMU vfio-pci option,
something like nvidia-gpudirect-p2p-id=. I don't think
- On Aug 22, 2017, at 7:43 PM, stefanha stefa...@redhat.com wrote:
> On Mon, Aug 21, 2017 at 04:40:37PM +0530, Ishani Chugh wrote:
>> qemu-backup will be a command-line tool for performing full and
>> incremental disk backups on running VMs. It is intended as a
>> reference implementation fo
Marc-André Lureau writes:
> Hi
>
> On Thu, Aug 17, 2017 at 3:55 PM, Markus Armbruster wrote:
>> Marc-André Lureau writes:
>>
>>> Hi,
>>>
>>> In order to clean-up some hacks in qapi (having to unregister commands
>>> at runtime), I proposed a "[PATCH v5 02/20] qapi.py: add a simple #ifdef
>>> c
On 22 August 2017 at 17:52, Sean Bruno wrote:
> I note that there hasn't been any updates to the github copy of the main
> project repo. Just curious if I missed a thing or if someone can go
> look to see what's up.
Hmm? https://github.com/qemu/qemu has 1f29673 as its head,
which is indeed the m
Marc-André Lureau writes:
> Hi
>
> On Wed, Aug 16, 2017 at 5:43 PM, Markus Armbruster wrote:
>> Marc-André Lureau writes:
>>
>>> Add 'if' c-preprocessor condition on top-level schema elements:
>>> struct, enum, union, alternate, command, event.
>>
>> An example would be useful here. Your cover
Igor Mammedov writes:
> On Tue, 22 Aug 2017 15:50:14 +0200
> Markus Armbruster wrote:
>
>> Igor Mammedov writes:
>>
>> > On Mon, 7 Aug 2017 16:45:16 +0200
>> > Markus Armbruster wrote:
>> >
>> >> Sizes and addresses should use QAPI type 'size' (uint64_t).
>> >> PCDIMMDeviceInfo members @ad
I note that there hasn't been any updates to the github copy of the main
project repo. Just curious if I missed a thing or if someone can go
look to see what's up.
sean
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