On 07/01/2016 02:45 PM, Peter Maydell wrote:
> On Windows 'aux.*' is a reserved name and cannot be used for
> filenames; see
>
> https://msdn.microsoft.com/en-gb/library/windows/desktop/aa365247(v=vs.85).aspx
>
> This prevents cloning the QEMU git repo on Windows:
>
> C:\Java\sources\kvm> git
On 07/06/16 08:42, Laszlo Ersek wrote:
> On 07/06/16 08:28, Haozhong Zhang wrote:
> > Hi Ashok,
> >
> > On 07/06/16 02:18, Paolo Bonzini wrote:
> >>> I forgot to restore MSR_IA32_FEATURE_CONTROL in the resume path, and
> >>> MSR_IA32_FEATURE_CONTROL is zero after S3 resume.
> >>
> >> This is a bug
FLASH chip on XTFPGA boards is connected with 16-bit-wide interface.
Latest U-Boot can see the difference and does not work correctly with
32-bit-wide interface.
Set FLASH chip 'width' property to 2.
Signed-off-by: Max Filippov
---
hw/xtensa/xtfpga.c | 2 +-
1 file changed, 1 insertion(+), 1 del
On 07/06/2016 06:34 AM, Andrew Jeffery wrote:
> On Mon, 2016-07-04 at 14:18 +0200, Cédric Le Goater wrote:
>> The uboot in the previous release of the SDK was using a hardcoded
>> value for memory size. This is not true anymore, the value is now
>> retrieved from the memory controller.
>>
>> Below
On Wed, 07/06 11:03, Cao jin wrote:
> pointer 'qemu_aio_context' should be checked first before it is used.
> qemu_bh_new() will use it.
>
> Also add extra newlines to make code well separated and easier to read.
This "also" is not good, please only do one thing in a patch.
Fam
>
> Signed-off-
On 07/06/16 08:28, Haozhong Zhang wrote:
> Hi Ashok,
>
> On 07/06/16 02:18, Paolo Bonzini wrote:
>>> I forgot to restore MSR_IA32_FEATURE_CONTROL in the resume path, and
>>> MSR_IA32_FEATURE_CONTROL is zero after S3 resume.
>>
>> This is a bug. Sorry Laszlo. :)
>>
>>> Not restore MSR_IA32_FEATURE
Hi Ashok,
On 07/06/16 02:18, Paolo Bonzini wrote:
> > I forgot to restore MSR_IA32_FEATURE_CONTROL in the resume path, and
> > MSR_IA32_FEATURE_CONTROL is zero after S3 resume.
>
> This is a bug. Sorry Laszlo. :)
>
> > Not restore MSR_IA32_FEATURE_CONTROL during S3 resume does not affect
> > at
ACPI subsystem already has all logic in place the only
thing left to eject CPU is destroy it and ammend
present CPUs counter in CMOS, do so.
Signed-off-by: Igor Mammedov
---
hw/i386/pc.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
i
object_property_add_child() silently fails with error that it can't
create duplicate propery 'apic' as we already have 'apic' property
registered for 'apic' feature. As result generic device_realize puts
apic into unattached container.
As it's programming error, abort if name collision happens in
instance_id is generated by last_used_id + 1 for a given device type
so for QEMU with 3 CPUs instance_id for APICs is a seti of [0, 1, 2]
When CPU in the middle is hot-removed and migration started
APICs with instance_ids 0 and 2 are transferred in migration stream.
However target starts with 2 CPU
first remove VCPU from exec loop and only then remove lapic.
Signed-off-by: Chen Fan
Signed-off-by: Gu Zheng
Signed-off-by: Zhu Guihua
Signed-off-by: Igor Mammedov
---
target-i386/cpu.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
callbacks will do necessary cleanups before APIC device is deleted
Signed-off-by: Chen Fan
Signed-off-by: Gu Zheng
Signed-off-by: Zhu Guihua
Signed-off-by: Igor Mammedov
---
hw/i386/kvm/apic.c | 5 +
hw/intc/apic.c | 10 ++
hw/intc/apic_common.c
MAX_APICS is only used by child 'apic' class and not
by its parent TYPE_APIC_COMMON or any other derived
class.
Move check into end user 'apic' class so it won't
get in the way of other APIC implementations
if they support more then MAX_APICS.
Signed-off-by: Igor Mammedov
---
hw/intc/apic.c
local_apics[] is sized to contain all APIC ID supported in xAPIC mode,
so use APIC ID as index in it instead of constantly increasing counter idx.
Fixes error "apic initialization failed" when a CPU hotplugged and
unplugged more times than there are free slots in local_apics[].
Signed-off-by: Igo
it returns a list of present/possible to hotplug CPU
objects with a list of properties to use with
device_add.
in PC case returned list would looks like:
-> { "execute": "query-hotpluggable-cpus" }
<- {"return": [
{
"type": "qemu64-x86_64-cpu", "vcpus-count": 1,
"props": {"cor
Signed-off-by: Igor Mammedov
---
target-i386/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 1ec40a0..ebf4140 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -3239,6 +3239,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc,
currently present CPUs counter in CMOS only contains
smp_cpus (i.e. initial CPUs specified with -smp X) and
doesn't account for CPUs created with -device.
If VM is started with additional CPUs added with
-device, it will hang in BIOS waiting for condition
smp_cpus == counted_cpus
forever as cou
consolidate possible_cpus array management in pc_cpu_plug()
for smp_cpus, coldplugged with -device and hotplugged with
device_add.
Signed-off-by: Igor Mammedov
---
hw/i386/pc.c | 25 +
1 file changed, 9 insertions(+), 16 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/p
these properties will be used by as address where to plug
CPU with help -device/device_add commands.
Signed-off-by: Igor Mammedov
---
v3:
- use %u for printing topo ids
- add to error message topo ids from set apic_id
v2:
- rename socket/core/thread properties to socket-id/core-id/thread-id
Signed-off-by: Igor Mammedov
---
target-i386/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 04c0b79..2fa445d 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2765,6 +2765,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **err
CPU added with device_add help won't have APIC ID set,
so set it according to socket/core/thread ids provided
with device_add command.
Signed-off-by: Igor Mammedov
---
v3:
- use %u for printing topo ids
v2:
- add validity checks for socket-id/core-id/thread-id values
---
hw/i386/pc.c | 44
it's reverse of apicid_from_topo_ids() and will be used in follow up
patches to fill in data structures for query-hotpluggable-cpus and
for user friendly error reporting
Signed-off-by: Igor Mammedov
---
include/hw/i386/topology.h | 15 +++
1 file changed, 15 insertions(+)
diff --git
it will be reused in the next patch at pre_plug time
Signed-off-by: Igor Mammedov
---
v2:
- rename pc_find_cpu() into pc_find_cpu_slot() and add comment to it
Eduardo Habkost
---
hw/i386/pc.c | 29 ++---
1 file changed, 22 insertions(+), 7 deletions(-)
diff --git
Machine code knows about all possible APIC IDs so use that
instead of hack which does O(n^2) complexity duplicate
checks, interating over global CPUs list.
As result duplicate check is done only once with O(log n) complexity.
Signed-off-by: Igor Mammedov
---
hw/i386/pc.c | 44 ++
Changelog:
since v2:
* use 0x for UNASSIGNED_APIC_ID instead of UINT32_MAX
* add comment why 0x could be used for UNASSIGNED_APIC_ID
* print topo ids is unsigned
* print APIC ID as hex
* print topo ids calculated from APIC ID beside it
* add extra patch to
Redo 9886e834 (target-i386: Require APIC ID to be explicitly set before
CPU realize) in another way that doesn't use int64_t to detect
if apic-id property has been set.
Use the fact that 0x is the broadcast
value that a CPU can't have and set default
uint32_t apic_id to it instead of using
custom apic-id setter/getter doesn't do any property specific
checks anymore, so clean it up and use more compact static
property DEFINE_PROP_UINT32 instead.
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
---
target-i386/cpu.c | 45 ++---
1 fil
> I forgot to restore MSR_IA32_FEATURE_CONTROL in the resume path, and
> MSR_IA32_FEATURE_CONTROL is zero after S3 resume.
This is a bug. Sorry Laszlo. :)
> Not restore MSR_IA32_FEATURE_CONTROL during S3 resume does not affect
> at least Linux guest (tested 4.5). Current QEMU may advise the gues
Introduce a new KVM capability, KVM_CAP_PPC_HTM, that can be queried to
determine if a PowerPC KVM guest should use HTM (Hardware Transactional
Memory).
This will be used by QEMU to populate the pa-features bits in the
guest's device tree.
Signed-off-by: Sam Bobroff
---
arch/powerpc/kvm/powerp
This commit introduces six replication interfaces(for block, network etc).
Firstly we can use replication_(new/remove) to create/destroy replication
instances, then in migration we can use replication_(start/stop/do_checkpoint
/get_error)_all to handle all replication operations. More detail please
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
---
docs/block-replication.txt | 239 +
1 file changed, 239 insertions(+)
create mode 100644 docs/block-replication.txt
From: Wen Congyang
Auto complete mirror job in background to prevent from
blocking synchronously
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
---
block/mirror.c| 13 +
blockdev.c| 2 +-
include/block/block_int.h | 3 ++-
qemu-img.c
thanks. this is a good idea.
env->fullwr is reseted after the TB is retranslated.
On Wed, Jul 6, 2016 at 2:55 AM, Richard Henderson wrote:
> On 07/05/2016 02:41 PM, Michael Rolnik wrote:
>
>> right it accesses CPU registers but from helper context.
>> the flow is as follows
>>
>> 1. there is a
Would any maintainer pick this one?
On 06/14/2016 03:27 PM, Changlong Xie wrote:
Signed-off-by: Changlong Xie
---
include/qom/object.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/qom/object.h b/include/qom/object.h
index 99de539..925c279 100644
--- a/include/q
Normal backup(sync='none') workflow:
step 1. NBD peformance I/O write from client to server
qcow2_co_writev
bdrv_co_writev
...
bdrv_aligned_pwritev
notifier_with_return_list_notify -> backup_do_cow
bdrv_driver_pwritev // write new contents
step 2. drive-backup s
>>> Max Reitz 2016/7/6 星期三 上午 1:26 >>>
>On 04.07.2016 11:31, Lin Ma wrote:
>> Currently, the output of 'info snapshots' shows fully available snapshots.
>> It's opaque, hides some snapshot information to users. It's not convenient
>> if users want to know more about all of snapshot information o
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
---
tests/.gitignore | 1 +
tests/Makefile.include | 4 +
tests/test-replication.c | 557 +++
3 files changed, 562 insertions(+)
create mode 100644 tests/test-replication.c
diff -
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
Reviewed-by: Eric Blake
---
qapi/block-core.json | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/qapi/block-core.json b/q
From: Wen Congyang
Some programs that add a dependency on it will use
the block layer directly.
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Jeff Cody
---
block/Makefile.objs | 2 +-
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
---
block/backup.c | 18 ++
include/block/block_backup.h | 3 +++
2 files changed, 21 insertions(+)
create mode 100644 include/block
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Signed-off-by: Changlong Xie
---
block/Makefile.objs | 1 +
block/replication.c | 657
2 files changed, 658 insertions(+)
create mode 100
Block replication is a very important feature which is used for
continuous checkpoints(for example: COLO).
You can get the detailed information about block replication from here:
http://wiki.qemu.org/Features/BlockReplication
Usage:
Please refer to docs/block-replication.txt
You can get the patc
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
---
block.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/block.c b/block.c
index f4648e9..f7e7e43 100644
--- a/block.c
+++ b/block.c
@@ -1309,6 +1309,23 @@ void bdrv_set_backing_hd(BlockDriver
Here's version 2.
Changes v1 -> v2:
Patch 2/3: spapr: Set ibm, pa-features HTM from KVM_CAP_PPC_HTM
* Improve readability of HTM bit set code.
* Move the test for KVM into kvmppc_get_htm_support().
Sam Bobroff (3):
spapr: Disable ibm, pa-features HTM bit
Add KVM_CAP_PPC_HTM to linux/kvm.h
Signed-off-by: Sam Bobroff
---
linux-headers/linux/kvm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index e60e21b..37cb3e8 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -866,6 +866,7 @@ struct kvm_ppc_smmu_
There are a few issues with our handling of the ibm,pa-features
HTM bit:
- We don't support transactional memory in PR KVM, so don't tell
the OS that we do.
- In full emulation we have a minimal implementation of HTM that always
fails, so for performance reasons lets not tell the OS that we
Advertise HTM support in ibm, pa-features if KVM indicates support when
queried via a new capability (KVM_CAP_PPC_HTM).
If KVM returns false for the capability (which may indicate that the
host kernel doesn't support the capability itself) attempt to
determine availability using a fallback method
On Tue, 5 Jul 2016 18:13:22 +0530
Bharata B Rao wrote:
> On Tue, Jul 05, 2016 at 09:15:51AM +0200, Igor Mammedov wrote:
> > On Tue, 5 Jul 2016 10:12:49 +0530
> > Bharata B Rao wrote:
> >
> > > Introduce CPUState.prefer_arch_id_over_cpu_index and
> > > MachineClass.prefer_arch_id_over_cpu_index
cc Paolo again, because failed to deliver in 'git send-email'
On 07/06/2016 11:03 AM, Cao jin wrote:
pointer 'qemu_aio_context' should be checked first before it is used.
qemu_bh_new() will use it.
Also add extra newlines to make code well separated and easier to read.
Signed-off-by: Cao jin
On Wed, Jul 06, 2016 at 02:41:52PM +1000, Sam Bobroff wrote:
> On Tue, Jul 05, 2016 at 04:05:58PM +1000, David Gibson wrote:
> > On Tue, Jul 05, 2016 at 03:19:23PM +1000, Sam Bobroff wrote:
> > > Signed-off-by: Sam Bobroff
> >
> > Ok, so the usual procedure for updates to linux-headers is this:
>
On Tue, Jul 05, 2016 at 04:05:58PM +1000, David Gibson wrote:
> On Tue, Jul 05, 2016 at 03:19:23PM +1000, Sam Bobroff wrote:
> > Signed-off-by: Sam Bobroff
>
> Ok, so the usual procedure for updates to linux-headers is this:
>1. Get the change merged on the kernel side
>
>2. Use scripts/
On Mon, 2016-07-04 at 14:18 +0200, Cédric Le Goater wrote:
> The uboot in the previous release of the SDK was using a hardcoded
> value for memory size. This is not true anymore, the value is now
> retrieved from the memory controller.
>
> Below is a model for this device, only supporting unlock a
On 06/07/16 11:35, David Gibson wrote:
> On Tue, Jul 05, 2016 at 04:42:37PM +0200, Laurent Vivier wrote:
>> As device-tree is now fully built by QEMU, we don't need SLOF
>> anymore if the kernel is provided on the command line.
>>
>> In this case, don't load SLOF and boot directly into the
>> kerne
pointer 'qemu_aio_context' should be checked first before it is used.
qemu_bh_new() will use it.
Also add extra newlines to make code well separated and easier to read.
Signed-off-by: Cao jin
---
main-loop.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/main-loop.c b
Hi,
I guess this one is suitable for trivial tree, so CC them
On 06/20/2016 02:13 PM, Cao jin wrote:
All the other devices` .realize function name are xxx_realize, except this one.
cc: Michael S. Tsirkin
cc: Marcel Apfelbaum
cc: Paolo Bonzini
cc: Markus Armbruster
Reviewed-by: Markus Armb
After live migration, 'guest-stats' can't get the expected memory
status in the guest. This issue is caused by commit 4eae2a657d.
The value of 's->stats_vq_elem' will be NULL after live migration,
and the check in the function 'balloon_stats_poll_cb()' will
prevent the 'virtio_notify()' from execut
On Tue, 07/05 11:24, Colin Lord wrote:
> This commit moves the initialization of the QemuOptsList qemu_iscsi_opts
> struct out of block/iscsi.c in order to allow the iscsi module to be
> dynamically loaded.
>
> Signed-off-by: Colin Lord
> ---
> block/iscsi.c | 36
On Tue, Jul 05, 2016 at 04:42:37PM +0200, Laurent Vivier wrote:
> As device-tree is now fully built by QEMU, we don't need SLOF
> anymore if the kernel is provided on the command line.
>
> In this case, don't load SLOF and boot directly into the
> kernel.
>
> This saves at least 5 seconds on the
On 07/05/2016 09:50 AM, Kevin Wolf wrote:
> From: Eric Blake
>
> Sector-based limits are awkward to think about; in our on-going
> quest to move to byte-based interfaces, convert max_discard and
> discard_alignment. Rename them, using 'pdiscard' as an aid to
> track which remaining discard inter
On 06/21/2016 11:54 PM, Fam Zheng wrote:
> On Mon, 06/20 17:39, Eric Blake wrote:
>> We have max_transfer documented in BlockLimits, but while we
>> honor it during pwrite_zeroes, we were blindly ignoring it
>> during pwritev and preadv, leading to multiple drivers having
>> to implement fragmentat
Hi Alex,
Due to weekend and holiday in my country, there were zero regular
working hours between your emails.
I wish you had a good time.
The following code will be modified.
1. vfio_pci_ioctl
add a flag in vfio_device_info for workable_state support
return workable_state in "struct vfi
On 07/06/16 00:19, Laszlo Ersek wrote:
> On 06/22/16 08:53, Haozhong Zhang wrote:
> > OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
> > for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
> > "etc/msr_feature_control" to advise bits that should be set in
> >
On Tue, 07/05 10:35, Daniel P. Berrange wrote:
>
> Can you backup and explain more detail what the actual problem you're trying
> to solve is. IIUC, it is related to module loading, but I'm not seeing exactly
> what it is.
This patch originated when I was researching all drivers' block_init funct
On Tue, 07/05 20:49, Shiv Arora wrote:
> Hi Developers
Hi Shiv,
>
> I use the qemu command to up my virtual OS. But after that command executes
> it ask for
>
> localhost.localdomain.localdomain login:
> Password:
>
> I don`t want to add the login and password manually as i have to launch
> mu
Ping ...
Liang
> -Original Message-
> From: Li, Liang Z
> Sent: Wednesday, June 29, 2016 6:32 PM
> To: m...@redhat.com
> Cc: linux-ker...@vger.kernel.org; virtualizat...@lists.linux-foundation.org;
> k...@vger.kernel.org; qemu-devel@nongnu.org; virtio-dev@lists.oasis-
> open.org; dgilb...
On 07/05/2016 02:41 PM, Michael Rolnik wrote:
right it accesses CPU registers but from helper context.
the flow is as follows
1. there is a write to [0x: 0x0100) region
2. tlb_fill is called, it does the following
a. sets env->fullwr
b. calls cpu_loop_exit_restore.
c. the whole b
On 07/05/2016 08:57 AM, Max Reitz wrote:
>> I'm not sure yet what the conclusion is. Change query-block to include
>> anonymous BBs that are owned by devices? A new query command? Add the
>> information to info qtree and whatever the QMP version of it is (if it
>> even exists)?
>
> Well, since yo
On 5 July 2016 at 23:22, Michael Rolnik wrote:
> Peter,
>
> I do not understand this comment
>
> Exactly one of these memory regions (your main "RAM") should be
> allocated via memory_region_allocate_system_memory()
> [which does the vmstate_register_ram_global() for that MR].
> The idea is that e
On 07/05/2016 10:43 AM, Daniel P. Berrange wrote:
> Call the existing qcrypto_hash_supports method from
> qcrypto_hash_bytesv instead of open-coding it again.
>
> Signed-off-by: Daniel P. Berrange
> ---
> crypto/hash-gcrypt.c | 3 +--
> crypto/hash-glib.c | 3 +--
> crypto/hash-nettle.c | 3 +-
On 5 July 2016 at 22:41, Michael Rolnik wrote:
> right it accesses CPU registers but from helper context.
> the flow is as follows
>
> 1. there is a write to [0x: 0x0100) region
> 2. tlb_fill is called, it does the following
> a. sets env->fullwr
> b. calls cpu_loop_exit_restore.
>
Peter,
I do not understand this comment
*Exactly one of these memory regions (your main "RAM") should beallocated
via memory_region_allocate_system_memory()[which does the
vmstate_register_ram_global() for that MR].The idea is that every board has
one-and-only-one main RAM MR.(We should hav
On 06/22/16 08:53, Haozhong Zhang wrote:
> OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
> for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
> "etc/msr_feature_control" to advise bits that should be set in
> MSR_IA32_FEATURE_CONTROL. If this file exists, S
On 07/05/2016 06:16 PM, Eric Blake wrote:
> On 07/05/2016 02:27 PM, John Snow wrote:
>>
>>
>> On 07/02/2016 10:58 PM, Eric Blake wrote:
>>> Now that we can support boxed commands, use it to greatly
>>> reduce the number of parameters (and likelihood of getting
>>> out of sync) when adjusting driv
On 07/05/2016 02:27 PM, John Snow wrote:
>
>
> On 07/02/2016 10:58 PM, Eric Blake wrote:
>> Now that we can support boxed commands, use it to greatly
>> reduce the number of parameters (and likelihood of getting
>> out of sync) when adjusting drive-mirror parameters.
>>
>> Signed-off-by: Eric Bla
On Tue, 2016-07-05 at 19:23 +0200, Cédric Le Goater wrote:
>
>
> So, I was trying today to reconciliate the powernv patchset with
> the current HEAD of qemu when I bumped into the old version of this
> patch. I checked the specs and when no slb are found, rt should
> just be 0. The machine che
1. AT90CAN - http://www.atmel.com/images/doc7679.pdf
4. Memories
Figure 4-2. Data Memory Map
29. Register Summary
2. AT90USB - http://www.atmel.com/images/doc7593.pdf
6. Atmel AVR AT90USB64/128 memories
33. Register summary
in the "register summary" table yo
right it accesses CPU registers but from helper context.
the flow is as follows
1. there is a write to [0x: 0x0100) region
2. tlb_fill is called, it does the following
a. sets env->fullwr
b. calls cpu_loop_exit_restore.
c. the whole block is retranslated and instead of st it genera
On 07/05/2016 05:00 PM, Max Reitz wrote:
> On 05.07.2016 22:50, John Snow wrote:
>>
>>
>> On 07/05/2016 11:49 AM, Daniel P. Berrange wrote:
>>> On Tue, Jul 05, 2016 at 11:24:04AM -0400, Colin Lord wrote:
This puts the bochs probe function into its own separate file as part of
the proces
On 5 July 2016 at 21:31, Michael Rolnik wrote:
>
> As Richard says you have problems with trying to write
> CPU registers from a device anyway, but please consider
> trying to have some level of abstraction rather than
> just having the device code reach into the CPU object.
>
On 1 July 2016 at 15:47, Michael Rolnik wrote:
> Signed-off-by: Michael Rolnik
> ---
> target-avr/Makefile.objs | 4 +-
> target-avr/translate.c | 142
> ---
> 2 files changed, 64 insertions(+), 82 deletions(-)
>
> void restore_state_to_opc(CPU
On 05.07.2016 22:50, John Snow wrote:
>
>
> On 07/05/2016 11:49 AM, Daniel P. Berrange wrote:
>> On Tue, Jul 05, 2016 at 11:24:04AM -0400, Colin Lord wrote:
>>> This puts the bochs probe function into its own separate file as part of
>>> the process of modularizing block drivers. Having the probe
On 05/07/2016 20:30, Laszlo Ersek wrote:
> On 07/04/16 15:14, Peter Lieven wrote:
>> Hi,
>>
>> i noticed that newer guest kernels emit the following message at startup:
>>
>> ACPI: No IRQ available for PCI Interrupt Link [LNKS]. Try pci=noacpi or
>> acpi=off
>>
>> Cmdline:
>> x86_64-softmmu/qemu-
On 07/05/2016 11:49 AM, Daniel P. Berrange wrote:
> On Tue, Jul 05, 2016 at 11:24:04AM -0400, Colin Lord wrote:
>> This puts the bochs probe function into its own separate file as part of
>> the process of modularizing block drivers. Having the probe functions
>> separate from the rest of the dri
So, given the 1 register block per virt-mmio "bus" then I agree that we
need a "dev path" distinction between them.
On 5 July 2016 at 14:22, Thomas Hanson wrote:
> OK, that makes sense. I was thinking that the MMIO transport would/could
> support multiple register blocks and thus multiple devic
On 5 July 2016 at 21:31, Michael Rolnik wrote:
> Hi Peter,
>
>
> You're probably better off having the device in one
> patch and the board model in another, rather than combining them.
>
> Generally, device models don't live in hw/, only board
> models. Put the device model in the
Connect the Xilinx ZynqMP Inter Processor Interrupt (IPI) devices to the
ZynqMP SoC. This includes connecting the devices to each other.
Signed-off-by: Alistair Francis
---
hw/arm/xlnx-zynqmp.c | 102 +++
include/hw/arm/xlnx-zynqmp.h | 3 ++
2 f
Add the Xilinx ZynqMP Inter Processor Interrupt device.
Signed-off-by: Alistair Francis
---
hw/intc/Makefile.objs | 1 +
hw/intc/xlnx-zynqmp-ipi.c | 263 ++
include/hw/intc/xlnx-zynqmp-ipi.h | 116 +
3 files changed, 380
On 5 July 2016 at 21:30, Alistair Francis wrote:
> This patchset adds and connects the Xilinx ZynqmP IPI devices using the
> register GPIO line.
>
> This requires adding the register GPIO API which allows registers to be
> mapped to GPIOs. This GPIO is used to propergate register reads/writes
> to
Hi Peter,
*You're probably better off having the device in onepatch and the
board model in another, rather than combining them.*
*Generally, device models don't live in hw/, only board
models. Put the device model in the appropriate subdirectoryof hw/,
which is 'misc' for
OK, that makes sense. I was thinking that the MMIO transport would/could
support multiple register blocks and thus multiple devices.
On 5 July 2016 at 13:26, Laszlo Ersek (Red Hat)
wrote:
> A virtio-mmio "bus" is a single-device transport. It has a fixed base
> address that is set at board crea
From: Peter Crosthwaite
Add a routine to set or override the opaque data of an IRQ.
Qdev currently always initialises IRQ opaque as the device itself.
This allows you to override to a custom opaque in the case where
there is extra or different data needed.
Signed-off-by: Peter Crosthwaite
Sign
This patchset adds and connects the Xilinx ZynqmP IPI devices using the
register GPIO line.
This requires adding the register GPIO API which allows registers to be
mapped to GPIOs. This GPIO is used to propergate register reads/writes
to other devices and other registers.
This is useful to update
Add GPIO functionality to the register API. This allows association
and automatic connection of GPIOs to bits in registers. GPIO inputs
will attach to handlers that automatically set read-only bits in
registers. GPIO outputs will be updated to reflect their field value
when their respective registe
On Tue, Jul 05, 2016 at 02:46:26PM +0530, Prasanna Kumar Kalever wrote:
> currently all the libgfapi logs defaults to '/dev/stderr' as it was hardcoded
> in a call to glfs logging api, in case if debug level is chosen to DEBUG/TRACE
> gfapi logs will be huge and fill/overflow the console view.
>
>
On 07/02/2016 10:58 PM, Eric Blake wrote:
> Now that we can support boxed commands, use it to greatly
> reduce the number of parameters (and likelihood of getting
> out of sync) when adjusting drive-mirror parameters.
>
> Signed-off-by: Eric Blake
>
> ---
> v8: rebase, drop stale sentence in d
On 5 July 2016 at 23:17, KONRAD Frederic wrote:
> Hi Alon,
>
> Which repos/branch are you using?
> If you are using mttcg (the repo you mention in [1]) this is a known bug.
Hi,
I use qemu releases or qemu master.
I only referenced the [1] to show that this was already discussed,
fixed, reverted,
Hi Alon,
Which repos/branch are you using?
If you are using mttcg (the repo you mention in [1]) this is a known bug.
Thanks,
Fred
Le 05/07/2016 à 21:50, Alon Bar-Lev a écrit :
Hello,
I am aware that this was discussed many times, however, problem remains.
Use case loading u-boot.
1. Run qem
On 5 July 2016 at 17:43, Tom Hanson wrote:
> On 07/05/2016 10:29 AM, Peter Maydell wrote:
> ...
>> The virt board creates a collection of virtio-mmio transports,
>> so if you create just a backend on the command line (via
>> "-device virtio-scsi-device") it will be plugged into a
>> virtio-bus on
Hello,
I am aware that this was discussed many times, however, problem remains.
Use case loading u-boot.
1. Run qemu in debug mode:
$ qemu-system-mips -M malta -nographic -m 256 -s -S
2. Run gdb:
$ mips-unknown-linux-uclibceabi-gdb
(gdb) target remote :1234
(gdb) load u-boot
(gdb) target exec
On 5 July 2016 at 19:15, Michael Rolnik wrote:
> Hi Richard,
>
> Are there more pending issues with my code?
Most of the issues I raised with the board model/device
level code still seem to be present.
thanks
-- PMM
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