Connect the Xilinx ZynqMP Inter Processor Interrupt (IPI) devices to the
ZynqMP SoC. This includes connecting the devices to each other.
Signed-off-by: Alistair Francis <alistair.fran...@xilinx.com>
---
hw/arm/xlnx-zynqmp.c | 102 +++++++++++++++++++++++++++++++++++++++++++
include/hw/arm/xlnx-zynqmp.h | 3 ++
2 files changed, 105 insertions(+)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 23c7199..efa05bf 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -64,6 +64,15 @@ static const uint64_t sdhci_addr[XLNX_ZYNQMP_NUM_SDHCI] = {
0xFF160000, 0xFF170000,
};
+/* The IPI devices: APU, RPU_0, RPU_1, PMU_0, PMU_1, PMU_2, PMU_3, PL_0, PL_1,
+ * PL_2 and PL_3
+ */
+static const uint64_t ipi_addr[XLNX_ZYNQMP_NUM_IPIS] = {
+ 0xFF300000, 0xFF310000, 0xFF320000, 0xFF330000, 0xFF331000,
+ 0xFF332000, 0xFF333000, 0xFF340000, 0xFF350000, 0xFF360000,
+ 0xFF370000,
+};
+
static const int sdhci_intr[XLNX_ZYNQMP_NUM_SDHCI] = {
48, 49,
};
@@ -76,6 +85,10 @@ static const int spi_intr[XLNX_ZYNQMP_NUM_SPIS] = {
19, 20,
};
+static const int ipi_intr[XLNX_ZYNQMP_NUM_IPIS] = {
+ 35, 33, 34, 19, 20, 21, 22, 29, 30, 31, 32
+};
+
typedef struct XlnxZynqMPGICRegion {
int region_index;
uint32_t address;
@@ -177,6 +190,12 @@ static void xlnx_zynqmp_init(Object *obj)
object_initialize(&s->dpdma, sizeof(s->dpdma), TYPE_XLNX_DPDMA);
qdev_set_parent_bus(DEVICE(&s->dpdma), sysbus_get_default());
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_IPIS; i++) {
+ object_initialize(&s->ipi[i], sizeof(s->ipi[i]),
+ TYPE_XLNX_ZYNQMP_IPI);
+ qdev_set_parent_bus(DEVICE(&s->ipi[i]), sysbus_get_default());
+ }
}
static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@@ -420,6 +439,89 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
**errp)
&error_abort);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->dpdma), 0, DPDMA_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->dpdma), 0, gic_spi[DPDMA_IRQ]);
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_IPIS; i++) {
+ object_property_set_bool(OBJECT(&s->ipi[i]), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi[i]), 0, ipi_addr[i]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi[i]), 0,
+ gic_spi[ipi_intr[i]]);
+ /* TODO: Connect this to the other GICs */
+ }
+
+ /* Connect the GPIO lines between the IPI devices */
+ for (i = 0; i < XLNX_ZYNQMP_NUM_IPIS; i++) {
+ qemu_irq irq;
+
+ /* Connec the APU line for each device to the APU IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[0]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "APU", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[0]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_APU", 0, irq);
+
+ /* Connec the RPU_0 line for each device to the RPU_0 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[1]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "RPU_0", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[1]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_RPU_0", 0, irq);
+
+ /* Connec the RPU_1 line for each device to the RPU_1 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[2]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "RPU_1", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[2]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_RPU_1", 0, irq);
+
+ /* Connec the PMU_0 line for each device to the PMU_0 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[3]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "PMU_0", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[3]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_PMU_0", 0, irq);
+
+ /* Connec the PMU_1 line for each device to the PMU_1 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[4]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "PMU_1", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[4]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_PMU_1", 0, irq);
+
+ /* Connec the PMU_2 line for each device to the PMU_2 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[5]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "PMU_2", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[5]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_PMU_2", 0, irq);
+
+ /* Connec the PMU_3 line for each device to the PMU_3 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[6]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "PMU_3", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[6]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_PMU_3", 0, irq);
+
+ /* Connec the PL_0 line for each device to the PL_0 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[7]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "PL_0", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[7]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_PL_0", 0, irq);
+
+ /* Connec the PL_1 line for each device to the PL_1 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[8]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "PL_1", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[8]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_PL_1", 0, irq);
+
+ /* Connec the PL_2 line for each device to the PL_2 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[9]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "PL_2", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[9]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_PL_2", 0, irq);
+
+ /* Connec the PL_3 line for each device to the PL_3 IPI deivice */
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[10]), "IPI_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "PL_3", 0, irq);
+ irq = qdev_get_gpio_in_named(DEVICE(&s->ipi[10]), "OBS_INPUTS", i);
+ qdev_connect_gpio_out_named(DEVICE(&s->ipi[i]), "OBS_PL_3", 0, irq);
+ }
}
static Property xlnx_zynqmp_props[] = {
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index c2931bf..9a7adf8 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -28,6 +28,7 @@
#include "hw/ssi/xilinx_spips.h"
#include "hw/dma/xlnx_dpdma.h"
#include "hw/display/xlnx_dp.h"
+#include "hw/intc/xlnx-zynqmp-ipi.h"
#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
#define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
@@ -39,6 +40,7 @@
#define XLNX_ZYNQMP_NUM_UARTS 2
#define XLNX_ZYNQMP_NUM_SDHCI 2
#define XLNX_ZYNQMP_NUM_SPIS 2
+#define XLNX_ZYNQMP_NUM_IPIS 11
#define XLNX_ZYNQMP_NUM_OCM_BANKS 4
#define XLNX_ZYNQMP_OCM_RAM_0_ADDRESS 0xFFFC0000
@@ -85,6 +87,7 @@ typedef struct XlnxZynqMPState {
XilinxSPIPS spi[XLNX_ZYNQMP_NUM_SPIS];
XlnxDPState dp;
XlnxDPDMAState dpdma;
+ XlnxZynqMPIPI ipi[XLNX_ZYNQMP_NUM_IPIS];
char *boot_cpu;
ARMCPU *boot_cpu_ptr;
--
2.7.4
