Hi Dennis,
On Tue, Aug 25, 2015 at 7:45 AM, Dennis Luehring wrote:
> Am 25.08.2015 um 06:19 schrieb Richard Henderson:
>>
>> Artyom and Dennis, I'm hoping that this will help with some of your
>> translation performance problems. I don't currently have a sparc64
>> kernel set up for booting, bu
Hi Richard,
On Tue, Aug 25, 2015 at 6:19 AM, Richard Henderson wrote:
> Doing this instead of saving the raw PS_PRIV and TL. This means
> that all nucleus mode TBs (TL > 0) can be shared. This fixes a
> bug in that we didn't include HS_PRIV in the TB flags, and so could
> produce incorrect TB m
Hi! Sometimes ago i see clearlinux release, and after that some qemu
discussion how to speedup (mainly seabios part) kernel booting.
But i can't google this info =(. Can somebody provide me links to
discussion about seabios speedup and what progress in this area?
--
Vasiliy Tolstov,
e-mail: v.tol
The commit 317b0a6d8 fixed an issue which caused by the outdated env->tsc
value, but the fix lead to cpu_synchronize_all_states called twice during
live migration. The cpu_synchronize_all_states takes about 300us, which is
a bit expensive.
This patch tries to fix the issue in another way, and there
This patch is for kvm live migration optimization, it fixes the issue which
commit 317b0a6d8ba tries to fix in another way, and it can reduce the live
migration VM downtime about 300us.
*This patch is not tested for the issue commit 317b0a6d8ba tries to fix*
Liang Li (2):
kvmclock: remove cpu_
This reverts commit de9d61e83d43be9069e6646fa9d57a3f47779d28.
---
cpus.c| 9 -
include/sysemu/cpus.h | 1 -
include/sysemu/kvm.h | 8
kvm-all.c | 5 -
4 files changed, 23 deletions(-)
diff --git a/cpus.c b/cpus.c
index cd5abef..ffa81cb 100644
---
Am 25.08.2015 um 06:19 schrieb Richard Henderson:
Artyom and Dennis, I'm hoping that this will help with some of your
translation performance problems. I don't currently have a sparc64
kernel set up for booting, but I did smoke test this with openbios,
and even there it reduced the number of TBs
Doing this instead of saving the raw PS_PRIV and TL. This means
that all nucleus mode TBs (TL > 0) can be shared. This fixes a
bug in that we didn't include HS_PRIV in the TB flags, and so could
produce incorrect TB matches for hypervisor state.
The LSU and DMMU states were unused by the transla
On 08/24/2015 09:17 AM, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 50 ++-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 210e9
Hi Michael,
> -Original Message-
> From: snabb-de...@googlegroups.com [mailto:snabb-
> de...@googlegroups.com] On Behalf Of Michael S. Tsirkin
> Sent: Thursday, August 13, 2015 5:19 PM
> To: Ouyang, Changchun
> Cc: qemu-devel@nongnu.org; snabb-de...@googlegroups.com;
> thibaut.col...@6wind
Extremely sorry, my bad, its *cpu_physical_memory_write() *function to be
precise.
Regards,
Naman
On Tue, Aug 25, 2015 at 8:46 AM, Naman patel wrote:
> Hi,
> My requirement is to have a reserved physical memory region for QEMU
> that can be written using *cpu_physical_memory_region(),* whi
On 08/25/2015 12:30 AM, Greg Kurz wrote:
> On Fri, 21 Aug 2015 17:05:48 +0800
> Jason Wang wrote:
>
>> > We use data match eventfd for 1.0 notification currently. This could
>> > be slow since software decoding is needed for mmio exit. To speed this
>> > up, we can switch to use wild card mmio e
Hi,
My requirement is to have a reserved physical memory region for QEMU
that can be written using *cpu_physical_memory_region(),* which then can
also be used by the linux kernel for reading and writing. How can one
reserve such memory region in QEMU 2.0? And what care should one take while
do
On 08/24/2015 10:14 PM, Cornelia Huck wrote:
> On Mon, 24 Aug 2015 13:37:06 +0800
> Jason Wang wrote:
>
>> On 08/21/2015 05:43 PM, Cornelia Huck wrote:
>>> On Fri, 21 Aug 2015 17:05:47 +0800
>>> Jason Wang wrote:
+k->has_modern_state &&
+k->has_modern_state(qbus->paren
(Cc'ing qemu-devel, please keep me in the Cc).
TL;DR - qemu locks up my machine when I use 4.2-rc kernels.
I only use qemu from time to time, mostly to test changes to my own
scripts, or new package versions, in beyond.linuxfromscratch.org. A
few days ago I came back to that, building an LFS sys
On Sun, Aug 23, 2015 at 18:32:51 -0700, Paolo Bonzini wrote:
>
>
> On 23/08/2015 17:23, Emilio G. Cota wrote:
> > +case INDEX_op_fence_load:
> > +tcg_out_fence(s, 0xe8);
> > +break;
> > +case INDEX_op_fence_full:
> > +tcg_out_fence(s, 0xf0);
> > +break;
> >
On Sun, Aug 23, 2015 at 19:02:30 -0700, Paolo Bonzini wrote:
> On 23/08/2015 17:23, Emilio G. Cota wrote:
> > This will be used by the atomic instruction emulation code.
>
> Is this a fast path? If not, we can use the existing addend field and
> convert the host address to a ram_addr_t easily.
O
Quoting Bharata B Rao (2015-08-19 01:56:09)
> Add a field to PCDIMMDevice to note that the device has been marked
> for removal. This will be used by PowerPC memory hotplug code to
> honour the LMB removal requests of only those LMBs that belong to
> PCDIMMDevice that has been marked for removal. T
Quoting Bharata B Rao (2015-08-19 01:56:11)
> Add support to hot remove pc-dimm memory devices.
>
> Signed-off-by: Bharata B Rao
> ---
> hw/ppc/spapr.c | 114
> -
> hw/ppc/spapr_drc.c | 21 +
> include/hw/ppc/spapr.h | 2 +
>
Quoting Bharata B Rao (2015-08-19 01:56:10)
> drck->set_isolation_state() can return error. For such a case ensure
> correct error is returned by rtas_set_indicator() instead of always
> returning success.
>
> TODO: rtas_st(, , uint32 val) => the return value uint32, but
> drck->set_[allocation/in
On Sun, Aug 23, 2015 at 18:04:46 -0700, Paolo Bonzini wrote:
> On 23/08/2015 17:23, Emilio G. Cota wrote:
> > On some parallel workloads this gives up to a 15% speed improvement.
> >
> > Signed-off-by: Emilio G. Cota
> > ---
> > include/qemu/thread-posix.h | 47 ++
On 08/24/2015 04:24 AM, Thomas Huth wrote:
On 21/08/15 00:43, Yang Hongyang wrote:
now that we have a buffer netfilter, update the command
description and help.
Signed-off-by: Yang Hongyang
CC: Luiz Capitulino
CC: Markus Armbruster
---
hmp-commands.hx | 2 +-
qemu-options.hx | 5 -
On 08/23/2015 10:17 PM, Thomas Huth wrote:
On 21/08/15 00:43, Yang Hongyang wrote:
QTAILQ_ENTRY global_list but used by filter layer, so that we can
manage all filters together.
QTAILQ_ENTRY next used by netdev, filter belongs to the specific netdev is
in this queue.
This is mostly the same wi
On 08/19/2015 08:49 AM, Alexander Bezzubikov wrote:
> hw/ide/qdev.c:corrected to treat bridge as CDROM
> hw/ide/core.c:same corrections as in qdev.c
> hw/ide/atapi.c: skip some CDROM checks because bridge has only fake
> drive
>
> Signed-off-by: Alexander Bezzubikov
> ---
On Sun, Aug 23, 2015 at 20:23:41 -0400, Emilio G. Cota wrote:
> Signed-off-by: Emilio G. Cota
> ---
> linux-user/syscall.c | 2 ++
> 1 file changed, 2 insertions(+)
Just noticed that this patch is incomplete, since the 'main' thread
doesn't get to call rcu_register_thread()--only its children ca
Signed-off-by: Emilio G. Cota
---
cpus.c | 32 +---
1 file changed, 13 insertions(+), 19 deletions(-)
diff --git a/cpus.c b/cpus.c
index 81dda93..fd9e903 100644
--- a/cpus.c
+++ b/cpus.c
@@ -922,18 +922,23 @@ static void qemu_kvm_wait_io_event(CPUState *cpu)
qemu
Note: cannot compile bsd-user here (linux), please compile-test.
Signed-off-by: Emilio G. Cota
---
bsd-user/main.c | 2 +-
bsd-user/qemu.h | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index ee68daa..0bea358 100644
--- a/bsd-user/main
Note that the right place to call rcu_register_thread() is
do_cpu_loop() and not just in clone_func(), since the
original 'main' thread needs to call rcu_register_thread()
as well.
Signed-off-by: Emilio G. Cota
---
linux-user/qemu.h| 1 +
linux-user/syscall.c | 1 +
2 files changed, 2 insert
There are as many versions of cpu_loop as architectures supported,
so introduce here a helper that is common to all of them.
Signed-off-by: Emilio G. Cota
---
linux-user/main.c| 2 +-
linux-user/qemu.h| 6 ++
linux-user/syscall.c | 2 +-
3 files changed, 8 insertions(+), 2 deletions(
On 08/18/2015 02:17 AM, Hannes Reinecke wrote:
> On 08/18/2015 01:42 AM, Alexander Bezzubikov wrote:
>> Signed-off-by: Alexander Bezzubikov
>> ---
>> hw/scsi/scsi-disk.c| 12
>> include/hw/scsi/scsi.h | 13 +
>> 2 files changed, 13 insertions(+), 12 deletions(-)
>>
On 07/13/2015 06:18 AM, Kevin Wolf wrote:
> Am 11.07.2015 um 03:05 hat John Snow geschrieben:
>> We're supposed to abort on transfers like this, unless we fill
>> Word 125 of our IDENTIFY data with a default transfer size, which
>> we don't currently do.
>>
>> This is an ATA error, not a SCSI/ATA
On 07/09/2015 06:26 AM, Stefan Hajnoczi wrote:
> On Mon, Jun 29, 2015 at 04:56:26PM -0400, John Snow wrote:
>> Minor cleanup.
>>
>> Signed-off-by: John Snow --- hw/ide/ahci.c
>> | 2 +- hw/vfio/platform.c | 2 +- net/tap-linux.c| 4 ++-- 3
>> files changed, 4 insertions(+), 4 deletions(-)
>
>
On 06/18/2015 10:05 AM, Markus Armbruster wrote:
> Peter Maydell writes:
>
>> On 18 June 2015 at 10:28, Markus Armbruster wrote:
>>> However, I can't see how I could define a new C style there without
>>> pushing the "local variables" feature well beyond its intended use, and
>>> triggering th
On Mon, Aug 24, 2015 at 03:08:33PM +0100, Peter Maydell wrote:
>On 24 August 2015 at 13:03, Gavin Shan wrote:
>> This submits changes with formatted commit log while updating Linux
>> headers using scripts/update-linux-headers.sh.
>>
>> Signed-off-by: Gavin Shan
>
>Thanks for writing a patch for
On Mon, Aug 17, 2015 at 4:37 PM, Peter Crosthwaite
wrote:
> On Mon, Aug 17, 2015 at 3:33 PM, Andreas Färber wrote:
>> Am 18.08.2015 um 00:24 schrieb Alistair Francis:
>>> On Sat, Aug 15, 2015 at 2:22 PM, Peter Crosthwaite
>>> wrote:
On Mon, Jul 27, 2015 at 11:37 AM, Alistair Francis
w
From: David
Add IVRS table for AMD IOMMU. Table indicates that all devices will be
translated by the IOMMU, features common to all IOMMUs and IVDB for the
IOMMU to be emulated
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c| 85 +
includ
From: David
Add AMD IOMMU emulation to q35 and PIIX chipsets.
Signed-off-by: David Kiarie
---
hw/pci-host/piix.c | 11 +++
hw/pci-host/q35.c | 11 +++
2 files changed, 22 insertions(+)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 1cb25f3..348cff0 100644
--- a/hw
From: David
Add AMD IOMMU emulation to Qemu. This is a very basic AMD IOMMU
emulation that only does translation and some basic Event logging.
Guest translation enables nested PCI passthrough
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs | 1 +
hw/i386/amd_iommu.c | 993 +++
From: David
Add AMD IOMMU as one of the devices that can possibly be
emulated by Qemu. Also, add some helper functions for
manipulating presence/absence of IOMMU
Signed-off-by: David Kiarie
---
hw/core/machine.c | 25 +
include/hw/boards.h | 2 ++
2 files changed, 27
This series implements basic AMD IOMMU emulation to Qemu
AMD IOMMU emulation.
-This series emulates AMD IOMMU on qemu. It implements the following features
-Translation - 4K pages
-Event logging - particulary fault logging.
-AMD IOMMU, being a convectional PCI device doesn't rel
On Mon, Aug 24, 2015 at 03:13:40PM +0100, Peter Maydell wrote:
>On 24 August 2015 at 13:03, Gavin Shan wrote:
>> This submits changes with formatted commit log while updating Linux
>> headers using scripts/update-linux-headers.sh.
>>
>> Signed-off-by: Gavin Shan
>
>Also, you typoed your email add
On Tue, Aug 18, 2015 at 11:12 AM, John Snow wrote:
>
>
> On 08/17/2015 05:40 PM, Alistair Francis wrote:
>> Pull the AHCI state structure out into the header. This allows
>> other containers to access the struct. This is required to add
>> the device to modern SoC containers.
>>
>> Signed-off-by:
On 08/24/2015 12:53 PM, Programmingkid wrote:
> Add device ID generation to each device if an ID isn't given.
>
> Signed-off-by: John Arbuckle
>
> ---
> dev->id = id;
> +} else { /* create an id for a device if none is provided */
> +static int device_id_count;
> +
> +
On 8/25/15 00:17, Richard Henderson wrote:
> I've flushed out the v13 I posted last Thursday to handle all the
> instructions required to execute Hello World. In the process I
> found a number of bugs and design flaws in v13, and reshaped the
> translation a bit to better handle insns with no regi
> Am 24.08.2015 um 22:22 schrieb Andreas Färber :
>
> Hi,
>
>> Am 24.08.2015 um 03:17 schrieb Peter Lieven:
>> this patch adds a probe that lists all enforceable and migrateable
>> CPU models to the -cpu help output. The idea is to know a priory
>> which CPU modules can be exposed to the user w
On 08/24/2015 08:14 AM, Daniel P. Berrange wrote:
> Introduce a QCryptoTLSCredsAnon class which is used to
> manage anonymous TLS credentials. Use of this class is
> generally discouraged since it does not offer strong
> security, but it is required for backwards compatibility
> with the current VN
Public bug reported:
16 bit appcrash on 32bit windows 2008 and Vista guest. Used git bisect
and determined the problem has occurred since vgabios update included in
commit 6eefccc0bb9c34051b1e21880fc3a1c1c8686edd in qemu.git. Using a
vgabios before this commit works.
To reproduce boot a Vista or
On 08/24/2015 11:56 AM, Daniel P. Berrange wrote:
>> (C) Run in a mixed locale
>>
>> Whenever something breaks, we switch another LC_ to the C locale.
>>
>> Can partially break GTK's internationalization.
>>
>> I happily concede that (A) would be best. Until the manpower to pull it
>> off
On 08/24/2015 08:14 AM, Daniel P. Berrange wrote:
> Introduce a QCryptoTLSCreds class to act as the base class for
> storing TLS credentials. This will be later subclassed to provide
> handling of anonymous and x509 credential types. The subclasses
> will be user creatable objects, so instances can
Hi,
Am 24.08.2015 um 03:17 schrieb Peter Lieven:
> this patch adds a probe that lists all enforceable and migrateable
> CPU models to the -cpu help output. The idea is to know a priory
> which CPU modules can be exposed to the user without loosing any
models
> feature flags.
>
> Signed-off-by:
On Mon, Aug 24, 2015 at 18:08:37 +0200, Artyom Tarasenko wrote:
> On Mon, Aug 24, 2015 at 2:23 AM, Emilio G. Cota wrote:
> > * tb_lock must be held every time code is generated. The rationale is
> > that most of the time QEMU is executing code, not generating it.
>
> While this is indeed tr
On 24.08.2015 21:34, Peter Lieven wrote:
> Am 24.08.2015 um 20:39 schrieb Max Reitz:
>> On 24.08.2015 10:06, Peter Lieven wrote:
>>> If the file is readonly its not expected to grow so
>>> save the blocking call to nfs_fstat_async and use
>>> the value saved at connection time. Also important
>>> t
On 04.08.2015 14:14, Alberto Garcia wrote:
> v7:
> - Rebase against the current master.
> - Update version number in the 'since' field of the
> 'cache-clean-interval' option.
>
> v6: https://lists.gnu.org/archive/html/qemu-devel/2015-06/msg01929.html
> - Update documentation to clarify what "unu
From: Laurent Vivier
As we have removed CONFIG_USE_GUEST_BASE, we always use a guest base
and the macros GUEST_BASE and RESERVED_VA become useless: replace
them by their values.
Reviewed-by: Alexander Graf
Signed-off-by: Laurent Vivier
Message-Id: <1440420834-8388-1-git-send-email-laur...@vivi
Signed-off-by: Richard Henderson
---
tcg/s390/tcg-target.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 96c3d65..be51c8b 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -1504,2
From: Laurent Vivier
All tcg host architectures now support the guest base and as
there is no real performance lost, it can be always enabled.
Anyway, guest base use can be disabled lively by setting guest
base to 0.
CONFIG_USE_GUEST_BASE is defined as (USE_GUEST_BASE && USER_ONLY),
it should h
From: Benjamin Herrenschmidt
Currently, we get to the slow path for any unaligned access in the
backend, because we effectively preserve the bottom address bits
below the alignment requirement when comparing with the TLB entry,
so any non-0 bit there will cause the compare to fail.
For the same
Rather than allow arbitrary shift+trunc, only concern ourselves
with low and high parts. This is all that was being used anyway.
Signed-off-by: Richard Henderson
---
target-tricore/translate.c | 12 ++--
tcg/README | 14 ++
tcg/aarch64/tcg-target.h | 3 ++-
From: Aurelien Jarno
Softmmu unaligned load/stores currently goes through through the slow
path for two reasons:
- to support unaligned access on host with strict alignement
- to correctly handle accesses crossing pages
x86 is only concerned by the second reason. Unaligned accesses are
avoid
From: Aurelien Jarno
They behave the same as ext32s_i64 and ext32u_i64 from the constant
folding and zero propagation point of view, except that they can't
be replaced by a mov, so we don't compute the affected value.
Signed-off-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/opti
From: Aurelien Jarno
Implement real ext_i32_i64 and extu_i32_i64 ops. They ensure that a
32-bit value is always converted to a 64-bit value and not propagated
through the register allocator or the optimizer.
Cc: Andrzej Zaborowski
Cc: Alexander Graf
Cc: Blue Swirl
Cc: Stefan Weil
Acked-by: C
From: Aurelien Jarno
The tcg_gen_trunc_shr_i64_i32 function takes a 64-bit argument and
returns a 32-bit value. Directly call tcg_gen_op3 with the correct
types instead of calling tcg_gen_op3i_i32 and abusing the TCG types.
Signed-off-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tc
From: Aurelien Jarno
The op is sometimes named trunc_shr_i32 and sometimes trunc_shr_i64_i32,
and the name in the README doesn't match the name offered to the
frontends.
Always use the long name to make it clear it is a size changing op.
Signed-off-by: Aurelien Jarno
Signed-off-by: Richard Hen
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.c | 37 -
1 file changed, 24 insertions(+), 13 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index 7f7ab7e..bc3a539 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarc
From: Aurelien Jarno
Now that copies and constants are tracked separately, we can allow
constant to have copies, deferring the choice to use a register or a
constant to the register allocation pass. This prevent this kind of
regular constant reloading:
-OUT: [size=338]
+OUT: [size=298]
mov
From: Aurelien Jarno
Add two accessor functions temp_is_const and temp_is_copy, to make the
code more readable and make code change easier.
Reviewed-by: Alex Bennée
Signed-off-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 131 ++-
From: Aurelien Jarno
Instead of using an enum which could be either a copy or a const, track
them separately. This will be used in the next patch.
Constants are tracked through a bool. Copies are tracked by initializing
temp's next_copy and prev_copy to itself, allowing to simplify the code
a bi
From: Aurelien Jarno
The tcg_temp_info structure uses 24 bytes per temp. Now that we emulate
vector registers on most guests, it's not uncommon to have more than 100
used temps. This means we have initialize more than 2kB at least twice
per TB, often more when there is a few goto_tb.
Instead use
From: Aurelien Jarno
Signed-off-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/README | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/tcg/README b/tcg/README
index 61b3899..a22f251 100644
--- a/tcg/README
+++ b/tcg/README
@@ -466,13 +466,25
From: Aurelien Jarno
By convention, on a 64-bit host TCG internally stores 32-bit constants
as sign-extended. This is not the case in the optimizer when a 32-bit
constant is folded.
This doesn't seem to have more consequences than suboptimal code
generation. For instance the x86 backend assumes
8-19 20:29:30 +0100)
are available in the git repository at:
git://github.com/rth7680/qemu.git tags/pull-tcg-20150824
for you to fetch changes up to b76f21a70748b735d6ac84fec4bb9bdaafa339b1:
linux-user: remove useless macros GUEST_BASE and RESERVED_VA (2015-08-24
11:1
Am 24.08.2015 um 17:46 schrieb Eric Blake:
> On 08/24/2015 03:17 AM, Peter Lieven wrote:
>> this patch adds a probe that lists all enforceable and migrateable
>> CPU models to the -cpu help output. The idea is to know a priory
>> which CPU modules can be exposed to the user without loosing any
>> f
Am 24.08.2015 um 20:39 schrieb Max Reitz:
> On 24.08.2015 10:06, Peter Lieven wrote:
>> If the file is readonly its not expected to grow so
>> save the blocking call to nfs_fstat_async and use
>> the value saved at connection time. Also important
>> the monitor (and thus the main loop) will not han
Print the ID of each device when 'info usb' is used in the monitor.
Signed-off-by: John Arbuckle
---
This patch is easier to test when the qdev-monitor.c patch I
also submitted is applied first. It can still be tested without
it. Just run QEMU with the -usb option. Then go to the monitor
and typ
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On 24.08.2015 15:05, Alberto Garcia wrote:
> If an image is opened with driver-specific options then attempting
> to use snapshot_blkdev will fail with "Driver specified twice".
>
> The reason is that bs->filename is replaced with a full JSON object
Add device ID generation to each device if an ID isn't given.
Signed-off-by: John Arbuckle
---
This patch can be tested by adding adding usb devices using the monitor.
Start QEMU with the -usb option. Then go to the monitor and type
"device_add usb-mouse". The ID of the device will be set to a n
On 08/24/2015 02:54 AM, Markus Armbruster wrote:
> John Snow writes:
>
>> On 08/19/2015 02:55 AM, Dr. David Alan Gilbert wrote:
>>> * Eduardo Habkost (ehabk...@redhat.com) wrote:
Migration with q35 was not possible before commit
04329029a8c539eb5f75dcb6d8b016f0c53a031a, because q35 un
On 08/21/2015 06:11 PM, Mark Cave-Ayland wrote:
> On 21/08/15 20:04, John Snow wrote:
>
> (lots cut)
>
>> Do you want to resend the V3 here directly to the ML with Aurelien
>> Jarno's R-B?
>
> I was actually looking at this yesterday, and it seems with some more
> testing that only the DBDMA f
On 24.08.2015 10:06, Peter Lieven wrote:
> If the file is readonly its not expected to grow so
> save the blocking call to nfs_fstat_async and use
> the value saved at connection time. Also important
> the monitor (and thus the main loop) will not hang
> if block device info is queried and the NFS
On 03.07.2015 08:45, Wen Congyang wrote:
> We need to use threshold to check if too many write operation fails.
> If threshold is larger than num children, we always get write error
> event even if all write operations success.
>
> Signed-off-by: Wen Congyang
> ---
> block/quorum.c | 12 ++--
On 08/23/2015 04:42 PM, Laurent Vivier wrote:
These two patches remove the parameters
--enable-guest-base/--disable-guest-base from the configure options.
So, in linux-user mode, guest base is always enabled, and can
be disabled by setting the guest base to 0.
I've checked some softmmu targets
On Mon, Aug 24, 2015 at 07:07:38PM +0200, Markus Armbruster wrote:
> Alberto Garcia writes:
>
> > On Mon 24 Aug 2015 12:05:02 PM CEST, Markus Armbruster wrote:
> >
> >>> This seems to happen because of GTK+ calling setlocale(). The easiest
> >>> solution is probably to call setlocale(LC_NUMERIC,
* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote:
> Seems pretty good overall~
>
> For the part of migration parameters command, we have discussed before and
> Markus promised to reconstruct this part in qemu 2.5 cycle. But for now,
> it is OK.
Thanks,
> Cc: Markus Armbruster
>
> On 2015
Hi all,
Seems there is a bug in ARM breakpoint emulation. I am not sure how to
fix it and I would appreciate any suggestion. It is best illustrated by
a simple test which sets up and enables an unlinked address match
breakpoint but does not enable debug exceptions globally by
MDSCR_EL1.MDE bit.
c
On Aug 24, 2015, at 12:38 PM, Markus Armbruster wrote:
> Programmingkid writes:
>
>> On Aug 24, 2015, at 5:45 AM, Markus Armbruster wrote:
>>
>>> Copying the USB maintainer.
>>>
>>> Programmingkid writes:
>>>
On Aug 8, 2015, at 8:48 AM, Programmingkid wrote:
>
> On Aug 8
On 08/24/2015 11:07 AM, Markus Armbruster wrote:
>> You can prevent GTK+ from calling setlocale() by using
>> gtk_disable_setlocale() before gtk_init(), but note that setlocale() is
>> needed for gettext.
>
> We can
>
> (A) Internationalize our complete code base
>
> (B) Run in the C locale
>
On 08/24/2015 10:55 AM, Markus Armbruster wrote:
> Our motivation for dropping nested structs was to avoid burning the
> 'name': {} struct member syntax on a trivial and rarely used
> convenience, and instead make it available for a way to specify member
> attributes beyond name and type.
>
> Is
Alberto Garcia writes:
> On Mon 24 Aug 2015 12:05:02 PM CEST, Markus Armbruster wrote:
>
>>> This seems to happen because of GTK+ calling setlocale(). The easiest
>>> solution is probably to call setlocale(LC_NUMERIC, "C") before
>>> snprintf() (or at start-up ui/gtk.c), but opinions are welcome.
Eric Blake writes:
> On 08/24/2015 05:30 AM, Markus Armbruster wrote:
>
>>> We mentioned moving this into its own patch. In particular, I looked at
>>> what it would take to allow anonymous structs for flat union types:
>>>
>>> { 'union': 'Flat', 'base': 'Base',
>>> 'discriminator': 'type',
>>
On 08/24/2015 07:07 AM, Eric Blake wrote:
> Where things would NOT be allowed due to our prohibition of nested
> structs is:
>
> { 'union': 'Flat', 'base': 'Base', 'discriminator': 'type',
> 'data': { 'okay': 'str', 'bad': { 'i': 'int' } } }
I typed that wrong.
{ 'union': 'Flat', 'base': 'Bas
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 74 +++
1 file changed, 74 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 5bdc8be..6be751b 100644
--- a/target-tilegx/translate.c
+++ b/target-tile
On Mon, 24 Aug 2015 16:52:45 +0200
Greg Kurz wrote:
> On Fri, 21 Aug 2015 17:05:49 +0800
> Jason Wang wrote:
>
> > We used to use mmio for notification. This could be slow on some arch
> > (e.g on x86 without EPT). So this patch introduces pio bar and a pio
> > notification cap for modern devic
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 50 ++-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 210e912..2a0798a 100644
--- a/target-tilegx/translate.c
++
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 8
1 file changed, 8 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 2a0798a..e922aee 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -1125,10 +1125,18 @@ st
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 76 +--
1 file changed, 73 insertions(+), 3 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 1224a8e..210e912 100644
--- a/target-tilegx/translate.c
+
Programmingkid writes:
> On Aug 24, 2015, at 5:45 AM, Markus Armbruster wrote:
>
>> Copying the USB maintainer.
>>
>> Programmingkid writes:
>>
>>> On Aug 8, 2015, at 8:48 AM, Programmingkid wrote:
>>>
On Aug 8, 2015, at 2:04 AM, Markus Armbruster wrote:
>>
>> USB devices
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 112 ++
1 file changed, 112 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index b504ae3..51ee158 100644
--- a/target-tilegx/translate.c
+++ b/target-til
Most of which are either nops or exceptions.
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 94 ++-
1 file changed, 68 insertions(+), 26 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index ea68902..5
On 08/24/2015 09:29 AM, Peter Maydell wrote:
- LWNA_ADD_IMM8_OPCODE_X1 = 21,
+ LDNA_ADD_IMM8_OPCODE_X1 = 21,
MFSPR_IMM8_OPCODE_X1 = 22,
MF_UNARY_OPCODE_X1 = 31,
MM_BF_OPCODE_X0 = 7,
--
2.4.3
Should we feed this fix and the one in patch 6 back to
the kernel?
Probably.
r~
From: Chen Gang
The related instructions are exception, cntlz, cnttz, shufflebytes.
Signed-off-by: Chen Gang
Message-Id:
[rth: Remove incorrect implementation of add_saturate.]
Signed-off-by: Richard Henderson
---
target-tilegx/helper.c | 70 ++
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