On Do, 2015-08-06 at 20:28 +0200, Kővágó, Zoltán wrote:
> Currently the gcc specific version only evaluates the arguments once,
> while the generic version evaluates one argument twice, which can cause
> debugging headaches when an argument has a side effect.
The answer to that is "don't do that".
On Tue, Aug 18, 2015 at 12:08:52PM -0700, Eduardo Habkost wrote:
> DEFINE_PC_MACHINE should be eventually replaced by DEFINE_MACHINE, we
> just need to eliminate the pc_compat_*() functions first.
>
> Signed-off-by: Eduardo Habkost
> ---
> include/hw/i386/pc.h | 15 ++-
> 1 file chan
On Wed, Aug 19, 2015 at 04:49:15PM -0400, Gabriel L. Somlo wrote:
> Hi Ard,
>
> On Wed, Aug 19, 2015 at 11:42:02AM +0200, Ard Biesheuvel wrote:
> > (missed some cc's)
> >
> > On 19 August 2015 at 11:38, Ard Biesheuvel
> > wrote:
> > > From: "Gabriel L. Somlo"
> > >> Several different architect
On 15 August 2015 at 19:26, Stefan Brüns wrote:
> qemu currently limits the space for the evironment and arguments to
> 32 * PAGE_SIZE. Linux limits the argument space to 1/4 of the stack size.
> A program trying to detect this with a getrlimit(RLIMIT_STACK) syscall
> will typically get a much lar
On Fri, 07/03 11:41, Stefan Hajnoczi wrote:
> On Fri, Jul 03, 2015 at 09:08:41AM +0800, Fam Zheng wrote:
> > This moves the behavior of ne2000_can_receive to ne2000_receive. The
> > logic is when the NIC is stopped we drop the packet, when the buffer is
> > full we queue it and try flush later.
> >
On Thu, Aug 13, 2015 at 9:35 AM, Peter Maydell wrote:
> The A64 semihosting ABI defines a new call SyncCacheRange
> for doing a 'clean D-cache and invalidate I-cache' sequence.
> Since QEMU doesn't implement caches, we can implement this as a nop.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Ch
On 08/18/2015 04:23 PM, Peter Maydell wrote:
> Hi. I'm afraid this fails 'make check' on 32-bit ARM for me:
Found it. The problem is in the temps tracking patch, where we weren't
ignoring TCG_CALL_DUMMY_ARG (-1). This isn't used on x86 of course, which is
why we didn't see this failure there.
T
On Wed, Aug 19, 2015 at 10:55:26AM +0100, Dr. David Alan Gilbert wrote:
> * Eduardo Habkost (ehabk...@redhat.com) wrote:
> > Migration with q35 was not possible before commit
> > 04329029a8c539eb5f75dcb6d8b016f0c53a031a, because q35 unconditionally
> > creates
> > an ich9-ahci device, that was mar
On Do, 2015-08-06 at 20:28 +0200, Kővágó, Zoltán wrote:
> Backends no longer have to deal with mixeng, they just receive a buffer
> in the correct sample format, all mixeng logic is now in the audio.c
> (and mixeng.c). Backends also do not have to deal with soft voices.
>
> Backends now have two
On 13 August 2015 at 18:37, Peter Maydell wrote:
> On 22 July 2015 at 17:43, Peter Maydell wrote:
>> This series makes a start at cleaning up some of our headers
>> to avoid the common problem of header files including qemu-common.h
>> (which then in turn can lead to awkward circular includes).
>
Hi Pavel,
On 08/18/2015 03:33 PM, Pavel Fedin wrote:
> Add gic_version to VirtMachineState, set it to value of the option
> and pass it around where necessary. Instantiate devices and fdt
> nodes according to the choice.
>
> max_cpus for virt machine increased to 126 (calculated from redistributor
On 18/08/15 18:15, David Gibson wrote:
> On Wed, Aug 19, 2015 at 09:52:00AM +1000, Gavin Shan wrote:
>> On Tue, Aug 18, 2015 at 10:32:13AM -0700, Thomas Huth wrote:
>>> On 17/08/15 18:47, Gavin Shan wrote:
The patch supports RTAS calls "ibm,{open,close}-errinjct" to
manupliate the token,
ACK.
> On Aug 18, 2015, at 04:25 AM, Shmulik Ladkani
> wrote:
>
> As of a90a7425cf592a3afeff3eaf32f543b83050ee5c 'tap: Drop tap_can_send'
> vmxnet3 (with tap networking) can no longer receive once device is
> deactivated.
> Alas, as the device is initially "inactive", this brakes vmxnet3
> rece
ACK.
> On Aug 18, 2015, at 02:45 AM, Shmulik Ladkani
> wrote:
>
> From: Dana Rubin
>
> Validation of l2 header length assumed minimal packet size as
> eth_header + 2 * vlan_header regardless of the actual protocol.
>
> This caused crash for valid non-IP packets shorter than 22 bytes, as
> 't
The host cache information may not make sense for the guest if the VM
CPU topology doesn't match the host CPU topology. To make sure we won't
expose broken cache information to the guest, disable cache info
passthrough by default, and add a new "host-cache-info" property that
can be used to enable
On Wed, Aug 19, 2015 at 01:43:41PM +0800, Wen Congyang wrote:
> On 08/19/2015 01:41 PM, Paolo Bonzini wrote:
> > On 18/08/2015 19:54, Wen Congyang wrote:
> >> We will copy data in before_write_notifier to do backup.
> >> It is a nested I/O request, so we cannot do copy-on-read.
> >
> > Can you exp
ARMv7m CPU needs a link to NVIC instance for processing interrupts. Similarly
ARMv8 needs a link to GICv3 for its CPU interface.
This series builds upon existing mechanism for linking irqchip and
CPU, bringing the code up to date and making it reusable.
Pavel Fedin (2):
cpu_arm: Rename 'nvic' t
On Wed, Jul 22, 2015 at 03:59:50PM +0200, Thomas Huth wrote:
> The code in smp_parse already checks the topology information for
> sockets * cores * threads < cpus and bails out with an error in
> that case. However, it is still possible to supply a bad configuration
> the other way round, e.g. wit
On Thu, Aug 13, 2015 at 9:35 AM, Peter Maydell wrote:
> Factor out a repeated pattern in the semihosting code:
>
> gdb_do_syscall(arm_semi_cb, "system,%s", arg0, (int)arg1+1);
> /* arm_semi_cb sets env->regs[0] to the syscall return value */
> return env->regs[0];
>
> For A64 the retur
Hello,
qemu-img convert -f qcow2 Trove---mysql-5.6---2015-07-16.qcow2 -O raw
rbd:openstack-00/8205d01a-874c-44c0-b114-1c03821fcc24:conf=/etc/ceph/ceph.conf
How can i specify the object size that rbd uses? I found that the
qemu-image can only use the default object size. It is defined in
b
Hello!
> Why bother? This is adding more code than it deletes
I just don't like code duplication, wanted to do this long time ago.
Additionally this enables to add support for virtio-mmio to more machines.
Actually it could be used not only by ARM with little modifications.
> and is implicit
On 08/19/2015 02:49 PM, Alexander Bezzubikov wrote:
> This is my QEMU Google Summer of Code project.
> Here I introduce new device - ATAPI-SCSI bridge.
> Its purpose is to unify IDE ATAPI CD-ROM emulation
> with SCSI CD-ROM emulation to reduce code duplication and squash bugs.
> It's purpose is sim
On 18 August 2015 at 19:12, Richard Henderson wrote:
> Posted and reviewed back in June, queued for 2.5 development.
>
>
> r~
>
>
> The following changes since commit 074a9925e1cfd659d5376dcaccd1436d3840e611:
>
> Merge remote-tracking branch 'remotes/cody/tags/block-pull-request' into
> staging
On 19 August 2015 at 12:23, Pavel Fedin wrote:
> Extract common code for virtio-mmio creation and FDT node addition and
> put it into reusable functions. Use new functions in vexpress and virt
> machines.
>
> Signed-off-by: Pavel Fedin
> ---
> hw/arm/sysbus-fdt.c | 51 +++
Signed-off-by: Alexander Bezzubikov
---
hw/ide/bridge.h | 9 +
hw/ide/internal.h | 4 +++-
hw/ide/qdev.c | 41 +
3 files changed, 53 insertions(+), 1 deletion(-)
create mode 100644 hw/ide/bridge.h
diff --git a/hw/ide/bridge.h b/hw/ide/brid
hw/ide/qdev.c: corrected to treat bridge as CDROM
hw/ide/core.c: same corrections as in qdev.c
hw/ide/atapi.c: skip some CDROM checks because bridge has only fake drive
Signed-off-by: Alexander Bezzubikov
---
hw/ide/atapi.c | 4 +++-
hw/ide/core.c | 24 ++--
hw/ide/qdev.c
This is my QEMU Google Summer of Code project.
Here I introduce new device - ATAPI-SCSI bridge.
Its purpose is to unify IDE ATAPI CD-ROM emulation
with SCSI CD-ROM emulation to reduce code duplication and squash bugs.
It's purpose is simple - it just forwards ATAPI commands
to SCSI side for parsing
Signed-off-by: Alexander Bezzubikov
---
hw/scsi/scsi-disk.c| 12
include/hw/scsi/scsi.h | 13 +
2 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index 64f0694..8626eba 100644
--- a/hw/scsi/scsi-disk.c
+++ b/hw/
This patch is necessary because ATAPI-SCSI bridge transfer uses
ide_transfer_start/stop and ide_data_read function check if
PIO transfer is running, so bridge function should be added
to this check
Signed-off-by: Alexander Bezzubikov
---
hw/ide/core.c | 4 +++-
1 file changed, 3 insertions(+), 1
ide: bridge functions created
ide: Makefile corrected due to bridge creation
scsi: added function to enable bridge send SCSI requests
ide: bridge can now forward requests to SCSI
ide: bridge functions assigned to SCSIBusInfo
Signed-off-by: Alexander Bezzubikov
---
hw/ide/Makefile.objs | 2 +-
OK, take your time.
JC
Le 19/08/2015 14:25, Peter Maydell a écrit :
On 19 August 2015 at 07:43, Jean-Christophe DUBOIS wrote:
Hi Peter,
Do you expect more work on this series?
It's in my to-review queue, but I'm at a conference this
week so may not be able to get to it before next week.
th
On 19 August 2015 at 07:43, Jean-Christophe DUBOIS wrote:
> Hi Peter,
>
> Do you expect more work on this series?
It's in my to-review queue, but I'm at a conference this
week so may not be able to get to it before next week.
thanks
-- PMM
This name seems to be more appropriate because ARMv8 also needs a link
with GICv3 for its CPU interface.
Signed-off-by: Pavel Fedin
---
hw/arm/armv7m.c | 2 +-
target-arm/cpu.h| 5 -
target-arm/helper.c | 12 ++--
3 files changed, 11 insertions(+), 8 deletions(-)
diff --gi
Implement property instead of direct assignment of cpu->env.irqchip
Signed-off-by: Pavel Fedin
---
hw/arm/armv7m.c | 5 ++---
target-arm/cpu.c | 6 ++
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 19742b7..782fd3e 100644
--- a/hw/arm/
Extract common code for virtio-mmio creation and FDT node addition and
put it into reusable functions. Use new functions in vexpress and virt
machines.
Signed-off-by: Pavel Fedin
---
hw/arm/sysbus-fdt.c | 51 +++
hw/arm/vexpress.c | 55 --
On 08/19/2015 12:57 PM, Alexander Bezzubikov wrote:
> ide: bridge functions created
> ide: Makefile corrected due to bridge creation
> scsi: added function to enable bridge send SCSI requests
> ide: bridge can now forward requests to SCSI
> ide: bridge functions assigned to SCSIBusInfo
> Signed-off
On 08/19/2015 12:57 PM, Alexander Bezzubikov wrote:
> This is my QEMU Google Summer of Code project.
> Here I introduce new device - ATAPI-SCSI bridge.
> Its purpose is to unify IDE ATAPI CD-ROM emulation
> with SCSI CD-ROM emulation to reduce code duplication and squash bugs.
> It's purpose is sim
ide: bridge functions created
ide: Makefile corrected due to bridge creation
scsi: added function to enable bridge send SCSI requests
ide: bridge can now forward requests to SCSI
ide: bridge functions assigned to SCSIBusInfo
Signed-off-by: Alexander Bezzubikov
---
hw/ide/Makefile.objs | 2 +-
On 2015-08-19 12:41, Artyom Tarasenko wrote:
> Hi Richard,
>
> On Tue, Aug 18, 2015 at 7:55 PM, Richard Henderson wrote:
> > On 08/18/2015 02:24 AM, Artyom Tarasenko wrote:
> >> The unoptimized case is a sequence of multiple cmp and branch
> >> operations (likely created by a "case" statement in
hw/ide/qdev.c: corrected to treat bridge as CDROM
hw/ide/core.c: same corrections as in qdev.c
hw/ide/atapi.c: skip some CDROM checks because bridge has only fake drive
Signed-off-by: Alexander Bezzubikov
---
hw/ide/atapi.c | 4 +++-
hw/ide/core.c | 24 ++--
hw/ide/qdev.c
Signed-off-by: Alexander Bezzubikov
---
hw/ide/bridge.h | 9 +
hw/ide/internal.h | 4 +++-
hw/ide/qdev.c | 41 +
3 files changed, 53 insertions(+), 1 deletion(-)
create mode 100644 hw/ide/bridge.h
diff --git a/hw/ide/bridge.h b/hw/ide/brid
Signed-off-by: Alexander Bezzubikov
---
hw/scsi/scsi-disk.c| 12
include/hw/scsi/scsi.h | 13 +
2 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index 64f0694..8626eba 100644
--- a/hw/scsi/scsi-disk.c
+++ b/hw/
This is my QEMU Google Summer of Code project.
Here I introduce new device - ATAPI-SCSI bridge.
Its purpose is to unify IDE ATAPI CD-ROM emulation
with SCSI CD-ROM emulation to reduce code duplication and squash bugs.
It's purpose is simple - it just forwards ATAPI commands
to SCSI side for parsing
This patch is necessary because ATAPI-SCSI bridge transfer uses
ide_transfer_start/stop and ide_data_read function check if
PIO transfer is running, so bridge function should be added
to this check
Signed-off-by: Alexander Bezzubikov
---
hw/ide/core.c | 4 +++-
1 file changed, 3 insertions(+), 1
Hi Richard,
On Tue, Aug 18, 2015 at 7:55 PM, Richard Henderson wrote:
> On 08/18/2015 02:24 AM, Artyom Tarasenko wrote:
>> The unoptimized case is a sequence of multiple cmp and branch
>> operations (likely created by a "case" statement in the original
>> source code), especially where cmp is in
* Eduardo Habkost (ehabk...@redhat.com) wrote:
> Migration with q35 was not possible before commit
> 04329029a8c539eb5f75dcb6d8b016f0c53a031a, because q35 unconditionally creates
> an ich9-ahci device, that was marked as unmigratable. So all q35 machines
> before pc-q35-2.4 were unmigratable, and t
(missed some cc's)
On 19 August 2015 at 11:38, Ard Biesheuvel wrote:
> From: "Gabriel L. Somlo"
>
> Hi Gabriel,
>
>> Several different architectures supported by QEMU are set up with a
>> "firmware configuration" (fw_cfg) device, used to pass configuration
>> "blobs" into the guest by the host r
From: Chen Fan
Replace mapping APIC at global system address space with
mapping it at per-CPU address spaces.
Signed-off-by: Chen Fan
Signed-off-by: Zhu Guihua
---
hw/i386/pc.c | 7 ---
hw/intc/apic_common.c | 6 --
target-i386/cpu.c | 21 +
3 files
ICC Bus was used for providing a hotpluggable bus for APIC and CPU, but now we
use HotplugHandler to make hotplug. So ICC Bus is unnecessary.
This code has passed the new pc-cpu-test.
And I have tested with kvm along with kernel_irqchip=on/off, it works fine.
This patch series is based on the lat
ICC bus impl has been droped, so all icc related files are not useful
any more; delete them.
Signed-off-by: Zhu Guihua
---
default-configs/i386-softmmu.mak | 1 -
default-configs/x86_64-softmmu.mak | 1 -
hw/cpu/Makefile.objs | 1 -
hw/cpu/icc_bus.c | 118
Something must be occur during reset of the X86 platform in a specific
order. For example, the apic reset should be after some devices (such
as hpet, rtc) reset, so that the apic register could be set to default
values.
This patch uses the new QEMUMachine reset method to solve the above
problem, e
From: Chen Fan
After CPU hotplug has been converted to BUS-less hot-plug infrastructure,
the only function ICC bus performs is to propagate reset to LAPICs. However
LAPIC could be reset by registering its reset handler after all device are
initialized.
Do so and drop ~200LOC of not needed anymore
One more ping.
Clearly, this patch set now requires porting to the latest QEMU, but before
doing that, I would like to know if there is any interest at all in merging this
feature.
The patches are:
http://patchwork.ozlabs.org/patch/462043/
http://patchwork.ozlabs.org/patch/462040/
http://patchwor
Am 2015-08-18 23:43, schrieb Eduardo Habkost:
I am sending a single patch for all machines to get some feedback, but
in the final patch series I will separate them by architecture.
Signed-off-by: Eduardo Habkost
---
(Sending v2 of just patch 6/7 to avoid resending the whole series)
Changes v1
On 2015年08月15日 04:45, Chen Gang wrote:
> On 8/14/15 22:44, Richard Henderson wrote:
>> On 08/14/2015 02:37 AM, gchen gchen wrote:
>>> - If I implement SW64 tcg backend, I guess, I cann't get help from qemu
>>>upstream: I don't think SW64 is valuable enough for upstream (either
>>>I am not
Please find attach a proposed debdiff for fixing the issue in Ubuntu
Trusty by backporting the fix which is now in Wily.
** Description changed:
+ [Impact]
+ A race condition in the VDI block driver of Qemu leads to image (and thus
file system) corruption under certain circumstances.
+ This make
PING
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: qemu-devel-bounces+p.fedin=samsung@nongnu.org [mailto:qemu-devel-
> bounces+p.fedin=samsung@nongnu.org] On Behalf Of Pavel Fedin
> Sent: Wednesday, August 12, 20
This is the initial version of KVM-accelerated GICv3 support.
State load and save are not yet supported, live migration is
not possible.
In order to get correct class name in a simpler way, gicv3_class_name()
function is implemented, similar to gic_class_name().
Signed-off-by: Pavel Fedin
Review
From: Shlomo Pongratz
This class is to be used by both software and KVM implementations of GICv3
Currently it is mostly a placeholder, but in future it is supposed to hold
qemu's representation of GICv3 state, which is necessary for migration.
The interface of this class is fully compatible wit
Some functions previously used only by vGICv2 are useful also for vGICv3
implementation. Untie them from GICState and make accessible from within
other modules:
- kvm_arm_gic_set_irq()
- kvm_gic_access() - data pointer changed to void * because some GICv3
registers are 64-bit wide
- kvm_gicd_acce
Add gic_version to VirtMachineState, set it to value of the option
and pass it around where necessary. Instantiate devices and fdt
nodes according to the choice.
max_cpus for virt machine increased to 126 (calculated from redistributor
space available in the memory map). GICv2 compatibility check
This allows to use different GIC types from v2. There are no kernels which
could advertise KVM_CAP_DEVICE_CTRL without the actual ability to create
GIC with it.
Signed-off-by: Pavel Fedin
Reviewed-by: Eric Auger
---
target-arm/kvm.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-
This series introduces support for GICv3 by KVM. Software emulation is
currently not supported.
v11 => v10
- Fixed minor issues with checkpatch and comments, reported by Eric Auger
- Make reusable kvm_gic_supports_attr(), moved to kvm-all.c and renamed
as kvm_device_check_attr(). Useful for futu
Hi Pavel,
On 08/19/2015 08:36 AM, Pavel Fedin wrote:
> Hello!
>
>> I think it would be worth justifying the changes in signature:
>> removal of GICState* due to the introduction of GICV3State and also
>> justify replacement of uint32_t *val into void*.
>
> I described it in the cover letter.
drck->set_isolation_state() can return error. For such a case ensure
correct error is returned by rtas_set_indicator() instead of always
returning success.
TODO: rtas_st(, , uint32 val) => the return value uint32, but
drck->set_[allocation/indicator/isolation]_state() is returning int.
Should we c
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