On 01/04/12 19:02, Gerhard Wiesinger wrote:
> Hello,
>
> I'm having the following boot order problem using an SCSI option ROM:
>
> Still boots the cdrom instead of harddisk. So it is impossible to have a
> bootable CDROM in the VM without booting from it.
-option-rom romfile=/root/roms/8xx_64.r
On Wed, Jan 04, 2012 at 07:02:34PM +0100, Gerhard Wiesinger wrote:
> Hello,
>
> I'm having the following boot order problem using an SCSI option ROM:
>
> Command line:
> /root/download/qemu/git/qemu-kvm/x86_64-softmmu/qemu-system-x86_64
> -drive file=1.img,media=disk,if=scsi,bus=0,unit=0
> -drive
On 01/04/2012 11:40 PM, Stefan Hajnoczi wrote:
What you want sounds almost like an NBD server that can be
launched/stopped while qemu is already running a VM. This could be a
QEMU monitor command like:
nbd-start tcp::1234 virtio-disk0 --snapshot 20120104
It would be possible to stop the server
On Wed, 4 Jan 2012, Kevin O'Connor wrote:
On Wed, Jan 04, 2012 at 07:02:34PM +0100, Gerhard Wiesinger wrote:
There is a "bootindex" option that can be passed to the "-device"
parameter of QEMU. This option give more fine grained control of boot
order.
However, the default should have been to b
On Wed, Jan 04, 2012 at 07:02:34PM +0100, Gerhard Wiesinger wrote:
> Hello,
>
> I'm having the following boot order problem using an SCSI option ROM:
>
> Command line:
> /root/download/qemu/git/qemu-kvm/x86_64-softmmu/qemu-system-x86_64
> -drive file=1.img,media=disk,if=scsi,bus=0,unit=0
> -drive
** Changed in: qemu-linaro
Assignee: Dr. David Alan Gilbert (davidgil-uk) => (unassigned)
** Changed in: qemu-linaro
Importance: Undecided => Medium
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Removing Dave as he's done most of the work but can't complete it.
** Changed in: qemu-linaro
Importance: Undecided => Medium
** Changed in: qemu-linaro
Assignee: Dr. David Alan Gilbert (davidgil-uk) => (unassigned)
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** Changed in: qemu-linaro
Importance: Undecided => Medium
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https://bugs.launchpad.net/bugs/883133
Title:
qemu on ARM hosts asserts due to code buffer/libc heap conflict
Status in
** Changed in: qemu-linaro
Status: New => In Progress
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https://bugs.launchpad.net/bugs/883136
Title:
qemu on ARM hosts aborts on startup because makecontext() always fails
Stat
On 01/04/2012 06:22 PM, Peter Maydell wrote:
> On 5 January 2012 00:14, Mark Langsdorf wrote:
>> Add dummy register support for the cp15, CRn=c15 registers and
>> for c1 SCR.
>
> Can you drop the SCR code, please? This needs to be done properly
> as part of trustzone support, which is a different
On 05.01.2012, at 01:31, q...@buildbot.b1-systems.de wrote:
> The Buildbot has detected a new failure on builder default_ppc while building
> qemu.
> Full details are available at:
> http://buildbot.b1-systems.de/qemu/builders/default_ppc/builds/265
>
> Buildbot URL: http://buildbot.b1-systems.
On 5 January 2012 00:16, Anthony Liguori wrote:
> On 01/04/2012 05:33 PM, Peter Maydell wrote:
>> A lot of the usage of target_phys_addr_t in hw/ is actually not
>> handling addresses at all, but merely offsets into device IO regions
>> (ie as parameters to device read/write functions)...
>
> Exac
On 5 January 2012 00:14, Mark Langsdorf wrote:
> Add dummy register support for the cp15, CRn=c15 registers and
> for c1 SCR.
Can you drop the SCR code, please? This needs to be done properly
as part of trustzone support, which is a different and rather larger
kettle of fish.
-- PMM
On 01/04/2012 05:33 PM, Peter Maydell wrote:
On 4 January 2012 22:09, Anthony Liguori wrote:
target_phys_addr_t should exist IMHO in the device model code.
(I assume "should not" ?)
Yes, sorry.
I think it
would be more useful to introduce a hw_addr, fix it at u64, make the device
mode
Add dummy register support for the cp15, CRn=c15 registers and
for c1 SCR.
config_base_register and power_control_register currently
default to 0, but may have improved support after the QOM
CPU patches are finished.
Signed-off-by: Mark Langsdorf
---
Changes from v7
Formatted improved
The Buildbot has detected a new failure on builder default_ppc while building
qemu.
Full details are available at:
http://buildbot.b1-systems.de/qemu/builders/default_ppc/builds/265
Buildbot URL: http://buildbot.b1-systems.de/qemu/
Buildslave for this Build: qemu-ppc.opensuse.org
Build Reason:
On 4 January 2012 19:07, Mark Langsdorf wrote:
> Add dummy register support for the cp15, CRn=c15 registers.
> config_base_register and power_control_register currently
> default to 0, but may have improved support after the QOM
> CPU patches are finished.
>
> Signed-off-by: Mark Langsdorf
> ---
On 4 January 2012 22:09, Anthony Liguori wrote:
> target_phys_addr_t should exist IMHO in the device model code.
(I assume "should not" ?)
> I think it
> would be more useful to introduce a hw_addr, fix it at u64, make the device
> model and memory API use that, and then make it so we didn't do
Erik Rull wrote:
Anthony Liguori wrote:
On 12/19/2011 03:33 PM, Erik Rull wrote:
Hi all,
coming from qemu 0.14 the usbdevice tablet update rate gets really bad in
qemu-1.0 with the same guest.
What's the specific guest?
Regards,
Anthony Liguori
It's a Windows XP guest. It was fine in 0.
On 01/03/2012 09:34 AM, Orit Wasserman wrote:
Signed-off-by: Orit Wasserman
---
arch_init.c | 67 +++
migration.c | 11 +
migration.h |9
3 files changed, 87 insertions(+), 0 deletions(-)
diff --git a/arch_init
kes it a little tricky to access a snapshot
while the VM is running.
That said, the file format itself doesn't prevent an implementation
from supporting read-only access to snapshots. In theory we can
extend the qcow2 implementation to support this behavior.
What you want sounds almost like a
We're supposed to keep qerror definitions and table entries in
alphabetical order. In practice this is not checked.
I haven't found a nice way to integrate this into the makefile yet but
we can at least have this script which verifies that qerrors are in
alphabetical order.
Signed-off-by: Stefan
Let's report specific errors so that management tools and users can
identify the problem.
Two new qerrors are needed:
* QERR_DEVICE_HAS_NO_MEDIUM for ENOMEDIUM
* QERR_DEVICE_IS_READ_ONLY for EACCES
Signed-off-by: Stefan Hajnoczi
---
blockdev.c | 26 ++
qapi-sch
On Wed, Jan 4, 2012 at 7:59 PM, Luiz Capitulino wrote:
> On Wed, 4 Jan 2012 17:38:23 +
> Stefan Hajnoczi wrote:
>
>> Let's report specific errors so that management tools and users can
>> identify the problem.
>>
>> Two new qerrors are needed:
>> * QERR_DEVICE_HAS_NO_MEDIUM for ENOMEDIUM
>>
On 01/04/2012 03:29 AM, Orit Wasserman wrote:
On 01/03/2012 09:54 PM, Anthony Liguori wrote:
On 01/03/2012 09:34 AM, Orit Wasserman wrote:
Add page caching mechanism.
The pages are stored in the cache ordered by their address.
Signed-off-by: Orit Wasserman
---
arch_init.c | 183
++
On 01/04/2012 01:50 PM, Peter Maydell wrote:
On 4 January 2012 19:32, Avi Kivity wrote:
The name 'Phys' conveys exactly the same information as 'target_phys_addr_t':
- it has to be a physical address (no such thing as physical data)
- it has to be a target address (qemu doesn't do host phy
On Wed, Jan 4, 2012 at 8:01 PM, Luiz Capitulino wrote:
> On Wed, 4 Jan 2012 17:38:20 +
> Stefan Hajnoczi wrote:
>
>> The block resize command returns undefined errors if things go wrong. This
>> is
>> bad since users will have no chance to understand what failed.
>
> Oops, this introduces
On 01/03/2012 09:34 AM, Orit Wasserman wrote:
Signed-off-by: Orit Wasserman
---
block-migration.c |4 +++-
hw/hw.h |4 +++-
migration.c | 15 +--
migration.h |3 +++
savevm.c | 11 +++
sysemu.h |4 +++-
6 file
On 01/04/2012 06:00 AM, Stefan Hajnoczi wrote:
On Tue, Jan 3, 2012 at 3:34 PM, Orit Wasserman wrote:
+static inline void *host_from_stream_offset_versioned(int version_id,
+QEMUFile *f, ram_addr_t offset, int flags)
+{
+void *host;
+if (version_id == 3) {
+
On 01/04/2012 12:45 PM, Luiz Capitulino wrote:
> +if (pid == 0) {
> +/* child */
> +int fd;
> +
> +setsid();
> +fclose(stdin);
> +fclose(stdout);
> +fclose(stderr);
> +
> +execlp(pmutils_bin, pmutils_bin, NULL);
It's generally a bad idea
see also http://bugs.debian.org/616487 and http://bugs.debian.org/653068
- it appears this prob happens with grub with qxl (spice) and vmware
"adaptors"
** Bug watch added: Debian Bug tracker #616487
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=616487
** Bug watch added: Debian Bug tracker
and it still happens even in version 1.0
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https://bugs.launchpad.net/bugs/502107
Title:
qemu-kvm 0.12.1.2 crashes booting Ubuntu 9.10 with "-vga std"
Status in QEMU:
Confirmed
Bug
On Wed, 4 Jan 2012 17:38:20 +
Stefan Hajnoczi wrote:
> The block resize command returns undefined errors if things go wrong. This is
> bad since users will have no chance to understand what failed.
Oops, this introduces a segfault try "block_resize ide1-cd0 100" in the monitor
and you'll s
On 01/04/2012 01:45 PM, Luiz Capitulino wrote:
For now it only supports the "hibernate" mode, which suspends the
guest to disk.
This command will try to execute the scripts provided by the pm-utils
package. If that fails, it will try to suspend manually by writing
to the "/sys/power/state" file.
On Wed, 4 Jan 2012 17:38:23 +
Stefan Hajnoczi wrote:
> Let's report specific errors so that management tools and users can
> identify the problem.
>
> Two new qerrors are needed:
> * QERR_DEVICE_HAS_NO_MEDIUM for ENOMEDIUM
> * QERR_DEVICE_IS_READ_ONLY for EACCES
Great series, the number
This fixes a bug when using -m isa-serial where qemu-ga will
hang on a read()'s when communicating to the host via isa-serial.
Original fix by Michael Roth.
Signed-off-by: Luiz Capitulino
---
qemu-ga.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/qemu-ga.c b/qemu-ga
On 01/04/2012 01:45 PM, Luiz Capitulino wrote:
This fixes a bug when using -m isa-serial where qemu-ga will
hang on a read()'s when communicating to the host via isa-serial.
Original fix by Michael Roth.
Signed-off-by: Luiz Capitulino
---
qemu-ga.c |2 +-
1 files changed, 1 insertions(+)
On 01/04/2012 09:50 PM, Peter Maydell wrote:
> On 4 January 2012 19:32, Avi Kivity wrote:
> > The name 'Phys' conveys exactly the same information as
> > 'target_phys_addr_t':
> >
> > - it has to be a physical address (no such thing as physical data)
> > - it has to be a target address (qemu do
On 4 January 2012 19:32, Avi Kivity wrote:
> The name 'Phys' conveys exactly the same information as 'target_phys_addr_t':
>
> - it has to be a physical address (no such thing as physical data)
> - it has to be a target address (qemu doesn't do host physical addresses)
> - the fact that it's a
For now it only supports the "hibernate" mode, which suspends the
guest to disk.
This command will try to execute the scripts provided by the pm-utils
package. If that fails, it will try to suspend manually by writing
to the "/sys/power/state" file.
To reap terminated children, a new signal handl
This version drops modes 'sleep' and 'hybrid' because they don't work
properly due to issues in qemu. Only the 'hibernate' mode is supported
for now.
Also note that virtio doesn't currently support ACPI S4. There are
patches flying on lkml to fix that though.
Please refer to patch 2/2 for more de
On 01/04/2012 08:06 PM, Stefano Stabellini wrote:
> On Mon, 19 Dec 2011, Avi Kivity wrote:
> > -static int xen_log_start(CPUPhysMemoryClient *client, target_phys_addr_t
> > phys_addr, ram_addr_t size)
> > +static void xen_log_start(MemoryListener *listener,
> > + MemoryReg
On Wed, Jan 04, 2012 at 11:03:14AM -0700, Eric Blake wrote:
> On 01/04/2012 10:47 AM, Marcelo Tosatti wrote:
> >>> +/*
> >>> + * Given an image chain: [BASE] -> [INTER1] -> [INTER2] -> [TOP]
> >>> + *
> >>
> >> How hard would it be to go one step further, and provide a monitor
> >> command where qe
A recent patch set from Avi break the dirty bitmap support of Xen. But this is
because the internal function will return an error for an unhandled memory
region (a - b). But this is not an error. So the patch clarify the
function from this point of view.
There is now an error print when th
Add dummy register support for the cp15, CRn=c15 registers.
config_base_register and power_control_register currently
default to 0, but may have improved support after the QOM
CPU patches are finished.
Signed-off-by: Mark Langsdorf
---
Changes from v6
Added the diagnostic registers
On Wed, 4 Jan 2012, Julian Pidancet wrote:
> When testing the latest master branch, qemu dies with the above error
> message. The issue seems to have been introduced by the following
> recent patch:
>
> xen: convert to MemoryListener API (20581d207853fe4b1af88b116f077516dfa888cd)
>
> Commenting t
On 01/04/2012 11:50 AM, Peter Maydell wrote:
> On 4 January 2012 16:53, Mark Langsdorf wrote:
>> +} else if ((op1 == 0) && (op2 == 0)) {
>> +/* power_control should be set to maximum latency. Again,
>> + default to 0 and set by private hook */
>> +
When testing the latest master branch, qemu dies with the above error
message. The issue seems to have been introduced by the following
recent patch:
xen: convert to MemoryListener API (20581d207853fe4b1af88b116f077516dfa888cd)
Commenting the assert() prevents qemu from dying, but there may be
an
On Mon, 19 Dec 2011, Avi Kivity wrote:
> -static int xen_log_start(CPUPhysMemoryClient *client, target_phys_addr_t
> phys_addr, ram_addr_t size)
> +static void xen_log_start(MemoryListener *listener,
> + MemoryRegionSection *section)
> {
> -XenIOState *state = contain
On 01/04/2012 07:56 AM, Peter Maydell wrote:
This is a pullreq for accumulated arm-devs patches; please pull.
NB: over the Christmas break my usual workflow got a bit disrupted so
I might have missed some patches; if there's anything that you were
expecting to be in here but isn't, please ping,
Hello,
I'm having the following boot order problem using an SCSI option ROM:
Command line:
/root/download/qemu/git/qemu-kvm/x86_64-softmmu/qemu-system-x86_64
-drive file=1.img,media=disk,if=scsi,bus=0,unit=0
-drive file=2.img,media=disk,if=scsi,bus=0,unit=1
-drive file=3.img,media=disk,if=scsi,b
On 01/04/2012 10:47 AM, Marcelo Tosatti wrote:
>>> +/*
>>> + * Given an image chain: [BASE] -> [INTER1] -> [INTER2] -> [TOP]
>>> + *
>>
>> How hard would it be to go one step further, and provide a monitor
>> command where qemu could dump the state of BASE, INTER1, or INTER2
>> without removing it
On 01/04/2012 05:52 AM, Avi Kivity wrote:
Please pull from
git://git.kernel.org/pub/scm/virt/kvm/qemu-kvm.git memory/batch
to receive the conversion of live migration to the memory API, along
with conversion of memory access dispatch to MemoryRegions instead of
CPU{Read,Write}Func. These ha
On 4 January 2012 16:53, Mark Langsdorf wrote:
> + if (ARM_CPUID(env) == ARM_CPUID_CORTEXA9) {
> + switch (crm) {
> + case 0:
> + if ((op1 == 4) && (op2 == 0)) {
> + /* The config_base_address should hold the value of
> + *
On 01/04/2012 06:18 PM, Corey Bryant wrote:
With qemu it is possible to run a guest from an unprivileged user but if
we wanted to communicate with the outside world we had to switch
to root.
We address this problem by introducing a new network backend and a new
network option for -net tap.
I a
On Wed, Jan 04, 2012 at 09:02:06AM -0700, Eric Blake wrote:
> On 01/04/2012 07:08 AM, Marcelo Tosatti wrote:
> > Add support for streaming data from an intermediate section of the
> > image chain (see patch and documentation for details).
> >
> > Signed-off-by: Marcelo Tosatti
> >
> > Index: st
Over time these must have gotten out of order. Put everything back in
alphabetical order.
This is purely a clean up. In practice nothing depends on the order.
Signed-off-by: Stefan Hajnoczi
---
qerror.c | 84 +++---
qerror.h | 72 +++
Let's report specific errors so that management tools and users can
identify the problem.
Two new qerrors are needed:
* QERR_DEVICE_HAS_NO_MEDIUM for ENOMEDIUM
* QERR_DEVICE_IS_READ_ONLY for EACCES
Signed-off-by: Stefan Hajnoczi
---
blockdev.c | 26 ++
qerror.c |
We're supposed to keep qerror definitions and table entries in
alphabetical order. In practice this is not checked.
I haven't found a nice way to integrate this into the makefile yet but
we can at least have this script which verifies that qerrors are in
alphabetical order.
Signed-off-by: Stefan
The block resize command returns undefined errors if things go wrong. This is
bad since users will have no chance to understand what failed.
Patch 3 makes qmp_block_resize() use meaningful errors. We introduce new
qerrors for ENOMEDIUM and EACCES since nothing exists yet.
When doing this I noti
Testscenario:
1.) Boot e.g. OS with VMMouse support (e.g. Windows)
2.) reboot
3.) Boot e.g. OS without VMMouse support (e.g. DOS) => PS/2 mouse doesn't
work any more. Fixes that issue.
Reason is that VMMouse has priority and disables all other mouse
entities and therefore must be disabled on r
On 01/04/2012 06:38 PM, Stefano Stabellini wrote:
>
> > I suggest doing the following:
> >
> > 1. keep cirrus code unchanged
> > 2. when the framebuffer is first mapped into physical memory (as known
> > by your CPUPhysMemoryClient), copy it into a temporary buffer, map the
> > guest memory into m
The most common use of -net tap is to connect a tap device to a bridge. This
requires the use of a script and running qemu as root in order to allocate a
tap device to pass to the script.
This model is great for portability and flexibility but it's incredibly
difficult to eliminate the need to ru
This patch adds a helper that can be used to create a tap device attached to
a bridge device. Since this helper is minimal in what it does, it can be
given CAP_NET_ADMIN which allows qemu to avoid running as root while still
satisfying the majority of what users tend to want to do with tap devices
With qemu it is possible to run a guest from an unprivileged user but if
we wanted to communicate with the outside world we had to switch
to root.
We address this problem by introducing a new network backend and a new
network option for -net tap. This is less flexible when compared to
existing -n
The ideal way to use qemu-bridge-helper is to give it an fscap of using:
setcap cap_net_admin=ep qemu-bridge-helper
Unfortunately, most distros still do not have a mechanism to package files
with fscaps applied. This means they'll have to SUID the qemu-bridge-helper
binary.
To improve security
We go to great lengths to restrict ourselves to just cap_net_admin as an OS
enforced security mechanism. However, we further restrict what we allow users
to do to simply adding a tap device to a bridge interface by virtue of the fact
that this is the only functionality we expose.
This is not good
Am 04.01.2012 17:54, schrieb Gerhard Wiesinger:
> Bugfix after reboot when vmmouse was enabled and another OS which uses
> e.g. PS/2
> mouse.
Could you please be a bit more verbose on what symptoms that fixes?
Thanks,
Andreas
>
> Signed-off-by: Gerhard Wiesinger
> ---
> hw/vmmouse.c |2 ++
Instantiate the L2 cache controller on the ARM devboards which have one,
since we have a dummy model of it now. Note that the only non-MP board
with an L2x0 is the PB1176, which we don't model.
Signed-off-by: Peter Maydell
---
This is intended to be applied after the l2x0 implementation patch,
ob
On Sat, 17 Dec 2011, Stefan Weil wrote:
> With this patch, it only takes one test (instead of four)
> to detect that there is no Xen support at all.
>
> For most build hosts, this will reduce the time configure needs.
> It will also reduce noisy output in config.log.
>
> Build hosts with Xen now
Bugfix after reboot when vmmouse was enabled and another OS which uses e.g. PS/2
mouse.
Signed-off-by: Gerhard Wiesinger
---
hw/vmmouse.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/hw/vmmouse.c b/hw/vmmouse.c
index 1113f33..f9f5b53 100644
--- a/hw/vmmouse.c
+++ b/
Add dummy register support for the cp15, CRn=c15 registers.
config_base_register and power_control_register currently
default to 0, but may have improved support after the QOM
CPU patches are finished.
Signed-off-by: Mark Langsdorf
---
Changes from v5
Added handling for all c15 registers
erik.r...@rdsoftware.de wrote:
On 12/31/11 13:11, Erik Rull wrote:
Hi all,
how can I use a USB 1.1 device on the USB 2.0 bus? Currently the EHCI
implementation complains that the device is mismatches the USB version.
-readconfig docs/ich9-ehci-uhci.cfg
cheers,
Gerd
Thanks for the hint.
On 01/04/2012 10:31 AM, Orit Wasserman wrote:
> I don't think any of these need to be in arch_init.c. It would be nicer to
make a xbzrle.c file for this stuff.
>
I will fix it.
Or just move everything migration-related from arch_init.c to saveram.c.
Paolo
On 2011-12-28 19:55, Liu, Jinsong wrote:
>>From 3a78adf8006ec6189bfe2f55f7ae213e75bf3815 Mon Sep 17 00:00:00 2001
> From: Liu Jinsong
> Date: Thu, 29 Dec 2011 05:28:12 +0800
> Subject: [PATCH 2/2] Expose tsc deadline timer cpuid to guest
>
> Depend on several factors:
> 1. Considering live migrat
On 4 January 2012 16:32, Mark Langsdorf wrote:
> On 01/04/2012 08:32 AM, Peter Maydell wrote:
>> On 29 December 2011 16:19, Mark Langsdorf wrote:
>>> Add a cp15 config_base_register that currently defaults to 0.
>>> After the QOM CPU support is added, the value will be properly
>>> set to the per
On Sun, 18 Dec 2011, Avi Kivity wrote:
> On 12/12/2011 05:32 PM, Stefano Stabellini wrote:
> > > Really, I think this is something inherently incompatible with the
> > > current memory API. If Xen has this unfixable special "requirement"
> > > (it's rather a design issue IMHO), adjust the API and a
On 01/04/2012 08:32 AM, Peter Maydell wrote:
> On 29 December 2011 16:19, Mark Langsdorf wrote:
>> Add a cp15 config_base_register that currently defaults to 0.
>> After the QOM CPU support is added, the value will be properly
>> set to the periphal base value.
>>
>> Signed-off-by: Mark Langsdorf
The following changes since commit f3c6a169a39d188e98c17a0a0ebfa7f85e5aafdd:
Merge remote-tracking branch 'qemu-kvm/memory/page_desc' into staging
(2012-01-03 14:39:05 -0600)
are available in the git repository at:
git://github.com/kvaneesh/QEMU.git for-upstream
Also available at signed
> This seems to cause adduser, addgroup, etc. to fail in cross-architecture
> chroots that use statically built qemu-user
> binaries to emulate the foreign architecture.
I just tried adduser in a chroot, and it worked OK. This is what I'd
expect, because the glib function g_get_any_init_do is onl
On 01/04/2012 03:02 PM, Avi Kivity wrote:
> On 01/03/2012 05:34 PM, Orit Wasserman wrote:
>> Signed-off-by: Benoit Hudzia
>> Signed-off-by: Petter Svard
>> Signed-off-by: Aidan Shribman
>>
>
> Looks like the original authorship (From: ) and signoffs were lost in
> the actual patches.
>
I will
On 01/04/2012 07:08 AM, Marcelo Tosatti wrote:
> Add support for streaming data from an intermediate section of the
> image chain (see patch and documentation for details).
>
> Signed-off-by: Marcelo Tosatti
>
> Index: stefanha/block.c
> =
On Tue, Jan 03, 2012 at 08:16:55AM +, Stefan Hajnoczi wrote:
> On Mon, Jan 02, 2012 at 04:39:59PM +0100, Christoph Hellwig wrote:
> > I've tried to understand how the recursive calling happens, but
> > unfortunately
> > the whole coroutine code lacks any sort of documentation how it should
> >
** Changed in: qemu-linaro
Status: In Progress => Fix Committed
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https://bugs.launchpad.net/bugs/870990
Title:
compile failure on ARMv7 hosts when compiled for thumb if --enable
On 04.01.2012, at 15:47, Michael S. Tsirkin wrote:
> On Wed, Jan 04, 2012 at 04:28:42PM +0200, Avi Kivity wrote:
>> Commit d0ed8076cbdc261 converted the PCI config access to the memory
>> API, but also inadvertantly changed it to accept unaligned writes,
>> and corrupt the index register in the p
** Changed in: qemu-linaro
Status: In Progress => Fix Committed
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https://bugs.launchpad.net/bugs/883133
Title:
qemu on ARM hosts asserts due to code buffer/libc heap conflict
S
omap_mpuio_init() is only used and defined in omap1.c, so make it static.
Signed-off-by: Peter Maydell
---
hw/omap.h |4
hw/omap1.c |2 +-
2 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/hw/omap.h b/hw/omap.h
index 42eb361..5fe33db 100644
--- a/hw/omap.h
+++ b/hw/oma
This is a pullreq for accumulated arm-devs patches; please pull.
NB: over the Christmas break my usual workflow got a bit disrupted so
I might have missed some patches; if there's anything that you were
expecting to be in here but isn't, please ping, resubmit the patch, etc.
-- PMM
The followin
From: Mark Langsdorf
Use qdev properties to allow board modelers to set the frequencies
for the sp804 timer. Each of the sp804's timers can have an
individual frequency. The timers default to 1MHz.
Signed-off-by: Mark Langsdorf
Reviewed-by: Andreas Färber
Signed-off-by: Peter Maydell
---
hw/
Drop includes of qemu-timer.h, qemu-char.h and pc.h as they are no
longer needed.
Signed-off-by: Peter Maydell
---
hw/omap1.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/hw/omap1.c b/hw/omap1.c
index 6ab9192..976ef71 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -20
From: Juha Riihimäki
Signed-off-by: Juha Riihimäki
[Riku Voipio: Fixes and restructuring patchset]
Signed-off-by: Riku Voipio
[Peter Maydell: More fixes and cleanups for upstream submission]
Signed-off-by: Peter Maydell
---
hw/omap.h |8 +---
hw/omap1.c | 60 +++
On Wed, Jan 04, 2012 at 04:28:42PM +0200, Avi Kivity wrote:
> Commit d0ed8076cbdc261 converted the PCI config access to the memory
> API, but also inadvertantly changed it to accept unaligned writes,
> and corrupt the index register in the process. This causes a regression
> booting NetBSD.
>
> F
When configuring the prefetch engine (and also when resetting from
a state where the prefetch engine was enabled) be careful to adhere
to the "unmap/change config fields/map" ordering, to avoid trying
to delete the wrong MemoryRegions. This fixes an assertion failure
in some cases.
Signed-off-by:
On 29 December 2011 16:19, Mark Langsdorf wrote:
> Add a cp15 config_base_register that currently defaults to 0.
> After the QOM CPU support is added, the value will be properly
> set to the periphal base value.
>
> Signed-off-by: Mark Langsdorf
> Reviewed-by: Peter Maydell
I need to revoke thi
Commit d0ed8076cbdc261 converted the PCI config access to the memory
API, but also inadvertantly changed it to accept unaligned writes,
and corrupt the index register in the process. This causes a regression
booting NetBSD.
Fix by ignoring unaligned or non-dword writes.
https://bugs.launchpad.ne
Add save/load support to the PL181.
Signed-off-by: Peter Maydell
---
hw/pl181.c | 49 -
1 files changed, 40 insertions(+), 9 deletions(-)
diff --git a/hw/pl181.c b/hw/pl181.c
index d05bc19..b79aa41 100644
--- a/hw/pl181.c
+++ b/hw/pl181.c
@@ -38
From: Juha Riihimäki
Signed-off-by: Juha Riihimäki
[Riku Voipio: Fixes and restructuring patchset]
Signed-off-by: Riku Voipio
[Peter Maydell: More fixes and cleanups for upstream submission]
Signed-off-by: Peter Maydell
---
hw/omap.h | 10 +-
hw/omap1.c | 57 +
Add a post-load hook which invalidates the display. In particular, if we
don't do this and the display size we've just reloaded is larger than
the default then we will segfault trying to read off the end of the buffer.
Signed-off-by: Peter Maydell
---
hw/pl110.c | 11 +++
1 files chang
From: Rob Herring
Add power control register to a9mpcore
Signed-off-by: Rob Herring
Signed-off-by: Mark Langsdorf
Signed-off-by: Peter Maydell
---
hw/a9mpcore.c | 36 +---
1 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/hw/a9mpcore.c b/hw/a9m
From: Rob Herring
This is just a dummy device for ARM L2 cache controllers, based on the
pl310. The cache type parameter can be defined by a property value
and has a meaningful default.
Signed-off-by: Rob Herring
Signed-off-by: Mark Langsdorf
[Peter Maydell: removed stray blank line at end]
Si
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