2010/8/3 Jörg Fischer :
> Hi,
> Øyvind Harboe schrieb:
>> Does anyone have any idea why the lpc1768 requires
>> such a low clock rate?
>
> The default 500kHz rate works on my lpc1768 here...
Is this with the Keil board?
Does "reset run" work at 500kHz?
--
Øyvind Harboe
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Hi,
Øyvind Harboe schrieb:
> Does anyone have any idea why the lpc1768 requires
> such a low clock rate?
The default 500kHz rate works on my lpc1768 here...
> "reset run" seems to require as low as 100kHz Could this
> be due to the app I'm running is messing with the clock?
If I switch to 32
On Tue, Aug 3, 2010 at 1:17 AM, Alain Mouette wrote:
>
> Em 02-08-2010 18:58, Øyvind Harboe escreveu:
>>
>> On Mon, Aug 2, 2010 at 11:36 PM, Alain Mouette wrote:
>>>
>>> Could anyone give (or point to) an example of a flash for Cortex-M3 that
>>> first chenges the internal cpu clock to 50MHz, the
Em 02-08-2010 18:58, Øyvind Harboe escreveu:
On Mon, Aug 2, 2010 at 11:36 PM, Alain Mouette wrote:
Could anyone give (or point to) an example of a flash for Cortex-M3 that
first chenges the internal cpu clock to 50MHz, then changes OpenOCD clock to
12MHz and only then writes the flash?
This
On Mon, Aug 2, 2010 at 11:36 PM, Alain Mouette wrote:
> Could anyone give (or point to) an example of a flash for Cortex-M3 that
> first chenges the internal cpu clock to 50MHz, then changes OpenOCD clock to
> 12MHz and only then writes the flash?
This depends *entirely* on the part and periphera
Could anyone give (or point to) an example of a flash for Cortex-M3 that
first chenges the internal cpu clock to 50MHz, then changes OpenOCD
clock to 12MHz and only then writes the flash?
I get confused with the sequence of commands (not the cpu specifics
to change the clock/pll)
Thanks,
--- On Mon, 8/2/10, Øyvind Harboe wrote:
> From: Øyvind Harboe
> Subject: Re: [Openocd-development] lpc1768 low clock rate
> To: "David Brownell"
> Cc: "Freddie Chopin" ,
> openocd-development@lists.berlios.de
> Date: Monday, August 2, 2010, 2:0
On Mon, Aug 2, 2010 at 11:30 PM, Freddie Chopin wrote:
> On 2010-08-02 23:09, Øyvind Harboe wrote:
>>
>> I also need to know what jtag clock it is safe to run reset-init at
>
> Instead of dividing by 6, try dividing by 8 - 500kHz.
I have to go as low as 300kHz before "reset run" works reasona
On 2010-08-02 23:09, Øyvind Harboe wrote:
I also need to know what jtag clock it is safe to run reset-init at
Instead of dividing by 6, try dividing by 8 - 500kHz.
4\/3!!
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h
On Mon, Aug 2, 2010 at 11:01 PM, David Brownell wrote:
>> But why as low as 100kHz?
>
> Because no reset-init method is kicking
> in the xtal oscillator and PLL, so the chip
> is clocked almost as slow as it'll go.
OK. So 100kHz maximum JTAG khz is not a pathological sign?
> You want faster? Wr
> But why as low as 100kHz?
Because no reset-init method is kicking
in the xtal oscillator and PLL, so the chip
is clocked almost as slow as it'll go.
You want faster? Write a real reset-init
method that clocks the chip faster ... at least
until app code kicks in and overrides.
- Dave
__
On Mon, Aug 2, 2010 at 10:52 PM, Freddie Chopin wrote:
> On 2010-08-02 22:34, Øyvind Harboe wrote:
>>
>> Does anyone have any idea why the lpc1768 requires
>> such a low clock rate?
>>
>> "reset run" seems to require as low as 100kHz Could this
>> be due to the app I'm running is messing with
On 2010-08-02 22:34, Øyvind Harboe wrote:
Does anyone have any idea why the lpc1768 requires
such a low clock rate?
"reset run" seems to require as low as 100kHz Could this
be due to the app I'm running is messing with the clock?
Thoughts?
Doesn't LPC17xx (as well as LPC23xx, LPC24xx, ...
On Mon, Aug 2, 2010 at 10:43 PM, David Brownell wrote:
>> Does anyone have any idea why the
>> lpc1768 requires
>> such a low clock rate?
>>
>> "reset run" seems to require as low as 100kHz Could
>> this
>> be due to the app I'm running is messing with the clock?
>
> Probably. The chip can ru
> Does anyone have any idea why the
> lpc1768 requires
> such a low clock rate?
>
> "reset run" seems to require as low as 100kHz Could
> this
> be due to the app I'm running is messing with the clock?
Probably. The chip can run at 100 MHz ISTR,
but if it's running at a slower rate, JTAG wil
Does anyone have any idea why the lpc1768 requires
such a low clock rate?
"reset run" seems to require as low as 100kHz Could this
be due to the app I'm running is messing with the clock?
Thoughts?
(This is with the KEIL lpc1768 kit + zy1000 interface)
> reset run
JTAG tap: lpc1768.cpu tap/
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