Hi,
Am 17.03.2011 21:50, schrieb Sebastian Huber:
> I just started with the OpenOCD and an Olimex USB-JTAG adaptor. Thanks
> to the great documentation it was quite easy to set up. I have this GDB
> script to load my application:
>
> set remote hardware-breakpoint-limit 2
> set remote hardware-
Hi,
Am 13.10.2010 08:23, schrieb Øyvind Harboe:
> 2010/10/13 Jörg Fischer :
>> This work for me _reliable_ on a custom lpc1768 board:
>>
>> adapter_khz 500
>>
>> #delays on reset lines
>> adapter_nsrst_delay 30
>> adapter_nsrst_assert_width 100
>&g
Hi,
Am 12.10.2010 23:36, schrieb Bernard Mentink:
> Yes, you are correct, I was looking at an old script that had it set to
> 500khz.
This work for me _reliable_ on a custom lpc1768 board:
adapter_khz 500
#delays on reset lines
adapter_nsrst_delay 30
adapter_nsrst_assert_width 100
jtag_ntrst_d
Am 11.10.2010 22:04, schrieb Bernard Mentink:
>> # LPC2000 & LPC1700 -> SRST causes TRST
>> reset_config srst_pulls_trst
That does not work for me anymore since the "Cortex-M3 reset handling"
patch is in. Have you tried
"reset_config srst_only"?
>> target remote localhost:
Here must be a "m
Nived schrieb:
> Hi,
>
> i am using openocd 0.4.0 to debug an intelmote2 device. I am able to set
> a break point and then transfer control to that point. When i do a
> continue (c) or a next (n) the execution returns to the same point.
>
> Is there any particular reason why this may be happenin
Hi,
simon qian schrieb:
> For LPC1100 and LPC1300, if the checksum of the vectors is invalid,
> SYSMEMREMAP will not be set to Flash Mode, so the first sector of the
> flash address is not mapped to flash. SYSMEMREMAP should be written
> to Flash Mode, which is '2'.
> For LPC1700, I haven't found
Hi,
Øyvind Harboe schrieb:
> Does anyone have any idea why the lpc1768 requires
> such a low clock rate?
The default 500kHz rate works on my lpc1768 here...
> "reset run" seems to require as low as 100kHz Could this
> be due to the app I'm running is messing with the clock?
If I switch to 32
Amit Goradia schrieb:
> Thanks Jorg for helping.
>
> I could not find any reference for the reset vector for the reset vector for
> the boot loader being located at 0x1fff0080 in the manual. The manual does
> say that the bootloader is run on each reset. Is there any other reference
> manual for t
Hi,
Amit Goradia schrieb:
> I am trying to use a USB JTAG dongle (NGX ARM JTAG) compatible with oocdlink
> for flash programming a LPC1768 processor.
> [...]
>
> upon executing reset init, the output is as follows:
>
>
>> reset init
> JTAG tap: lpc1768.cpu tap/device found: 0x4ba00477 (mfg: 0x2
Hi,
Yu Li schrieb:
> i want to build openocd that can run on arm9.
> i use,
> $ CC=arm-linux-gcc ./configure --prefix=/opt/arm-openocd
> --build=i686-pc-linux-gnu --host=arm-linux --target=arm-linux
> --enable-parport --enable-maintainer-mode
> $ make
>
> but i got the error
> arm_jtag.h: 81: err
David Brownell schrieb:
> On Tuesday 09 March 2010, David Brownell wrote:
>> On Tuesday 09 March 2010, Jörg Fischer wrote:
>>> I'm getting only segfaults using current git,
>>> whenever I tried "reset" (init/halt/run).
>> I didn' see that.
>
Hi,
I'm getting only segfaults using current git,
whenever I tried "reset" (init/halt/run).
Im using openocd with ftd2xx on windows/MingW gcc 3.4.5.
My Target Board is the Hitex LPC1768 Stick (which includes
an ft2232 for JTAG).
Backtrace below:
#0 0xe00ff003 in ?? ()
No symbol table info avai
Hi,
David Brownell schrieb:
> On Monday 15 February 2010, Jörg Fischer wrote:
>> Hi,
>>
>> just finished my openocd.cfg for the Hitex LPC1768-Stick
>> [...]
>> The attached openocd.cfg contains the full configuration,
>> because the tcl/target/lpc1768.cf
Hi,
just finished my openocd.cfg for the Hitex LPC1768-Stick:
http://www.hitex.com/index.php?id=lpc1768-stick-details
It has an FT2232D for JTAG with "stm32stick" layout connected to
the NXP LPC1768 µC (Cortex M3).
The attached openocd.cfg contains the full configuration,
because the tcl/target/
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