Hello Julius,
Thursday, July 21, 2011, 11:48:17 AM, you wrote:
JB> I'm looking at adding OpenRISC 1000 support to OpenOCD.
[skip]
JB> One solution is we make our GDB port not use these remote query
JB> commands and instead rely on the register cache fetched with the "g"
JB> RSP command.
You can
Hello Drasko,
Wednesday, July 6, 2011, 12:00:11 AM, you wrote:
>> DD> On the first look, this can be accomplished by reading CP0 PRId
>> DD> register, but Revision field is not quite well explained.
>> DD> I have no idea how to obtain info if the proc is MIPS32/64 Rev2
>> compliant.
>>
>> You sh
Hello Drasko,
Tuesday, July 5, 2011, 7:01:44 PM, you wrote:
DD> On Tue, Jul 5, 2011 at 6:17 PM, Spencer Oliver wrote:
>> I think your patch is ok, but would be better if it checks the arch version
>> and issue a warning about cache writes not supported or something along
>> those lines.
DD> On
Hello Antonio,
Tuesday, November 16, 2010, 3:53:53 PM, you wrote:
AB> Are you aware of any target, other than SPEAr, that provides memory
AB> mapping feature of SPI flash? I quickly searched, but failed.
NXP's LPC1800 (and, I think, LPC4000) have support for that.
7.10.3 SPI Flash Interface (SPI
Hi Rick,
You don't have to rely on TRST, you should be able to reset the TAP by
sending five clocks with TMS high.
If you meant to say that you can't enter debug mode without TRST,
that's indeed the case for XScale chips (and maybe some others).
However, you should still be able to use boundary s
Semihosting might be simpler to use (and AFAIK it's supported too).
On Tue, Oct 26, 2010 at 17:31, Øyvind Harboe wrote:
> This is supported by OpenOCD already.
>
> Read up on DCC in the manual and look at the DCC stuff in
> the source code of OpenOCD.
>
>
>
>
> --
> Øyvind Harboe
> US toll free 1
Hello Xiaofan,
Friday, March 5, 2010, 2:29:52 AM, you wrote:
XC> TI seems to have some delivery problems now. Maybe it is due
XC> to the fab-lite policy of the IDMs. On the analog side, it seems
XC> that ADI (and even Microchip) is trying to communicate to the
XC> customers that they can supply T
Hello Xiaofan,
Friday, March 5, 2010, 1:05:21 AM, you wrote:
XC> On Fri, Mar 5, 2010 at 8:03 AM, Xiaofan Chen wrote:
>> What about the Cortex M3 MCUs from ST and TI/Luminary and
>> now NXP (Cortex M0 and M3)?
XC> But the NXP Cortex M0 only supports SWD, no JTAG. NXP's
XC> Cortex M3 parts (LPC17
Hello CeDeROM,
Thursday, February 18, 2010, 7:18:02 PM, you wrote:
C> I have an access to the hardware USB2.0 sniffer so it is possible to
C> fully reverse-engineer the cable commands and modes (I will need to do
C> it anyway after SWD is impemented and tested on FT2232 cable).
I've offered to R
Julien,
While cheaper, LPCXpresso is currently supported only by code_red and
thus only on Windows (and apparently no plans for Linux), so I
wouldn't choose that one. LM3S811 kit has several versions which
differ by bundled compilers but all of them (even CodeSourcery, I
think) run on Windows only
Hello Michel,
Wednesday, February 3, 2010, 1:57:49 AM, you wrote:
MC> Le 02/02/2010 05:35, Igor Skochinsky a écrit :
>> Very interesting! It seems it's also included in the STM8S-Discovery
>> board, which costs just $7 - one third to one fourth of the
>> stand-alone ad
Hi Spencer,
On Tue, Feb 2, 2010 at 11:18, Spencer Oliver wrote:
> I have been given all the info for the ST-LINK from ST.
> http://www.st.com/stonline/products/literature/um/15285.pdf
>
> It is accessed using vendor specific mass storage cmds.
>
> Again this is a smart dongle, all the jtag/swi is
[reposting to list... I really wish this list had a proper reply-to]
Hello David,
Monday, February 1, 2010, 11:06:41 PM, you wrote:
DB> It's come to my attention that at least current versions of NXP's
DB> "LPCXpresso" [1] ($US 30) might include a candidate for this.
[...]
DB> One question is wh
Hello Øyvind,
Friday, January 15, 2010, 8:20:22 AM, you wrote:
>> I'll hope someone else chimes in with some insights here. This
>> kind of needs to get sorted before 0.4 freezes.
ØH> Here is another tidbit:
ØH> If you execute "c", then first a step packet is sent, then a continue
ØH> packet. W
Hello Dean,
Friday, December 18, 2009, 10:00:16 PM, you wrote:
DG> Alright, GMail was putting my signature above the quoted email
DG> because of a lab thing I had enabled. It is now disabled so I
DG> should start to put my responses in a better place. I took a look
DG> at the archives and it is
Hello Carsten,
Wednesday, December 16, 2009, 11:57:23 PM, you wrote:
Just one point.
>> 2) it bloats the code, in some case substantially, and obscures
>> the "real" code flow
CB> The real code flow ends in nothing. There are embedded CPU's that have
CB> no problem with writing to zero. They ju
Hello Carsten,
Wednesday, December 16, 2009, 9:00:58 PM, you wrote:
>>> The first thing i had to learn was, that it is verry uncommon in
>>> OpenOCD to check the result of malloc.
>> This is a known problem where we gladly accept patches to fix each
>> case.
CB> OK, then i will start to fix all
sometimes it do not?
> How can I disable this memory to be mapped?
> I will search for this, any news I will send to the list!
>
> Thank you very much again!
>
> Best regards,
> Marcelo Utikawa da Fonseca
>
> Igor Skochinsky escreveu:
>
> Marcelo,
>
> The curren
ios.de [mailto:openocd-
>> development-boun...@lists.berlios.de] On Behalf Of Igor Skochinsky
>> Sent: woensdag 16 december 2009 16:01
>> To: Marcelo Utikawa da Fonseca
>> Cc: openocd-development@lists.berlios.de
>> Subject: Re: [Openocd-development] Problem when tryng to flas
Hello Marcelo,
What you see is bootrom code that gets automatically mapped to 0 if
there is no user code or it's invalid.
"The interrupt vectors residing in the boot block of the on-chip flash
memory also become active after reset, i.e., the bottom 64 bytes of
the boot block are also visible in t
Hello Nicolas,
Thursday, December 3, 2009, 7:58:05 AM, you wrote:
NP> Semihosting enables code running on an ARM target to use the I/O
NP> facilities on the host computer. The target application must be linked
NP> against a library that forwards operation requests by using the SVC
NP> instructio
Hello David,
Monday, October 26, 2009, 9:08:47 AM, you wrote:
DB> There'd potentially be a LOT of those autoconf_$IDCODE things.
DB> So it might be important to segment them by vendor ID... that
DB> auto.cfg file looks at the ID and sources "auto/arm.cfg" or
DB> whatever.
DB> But, I'm not sure I
Hello Colin,
I don't see the point of making an advanced disassembler out of
OpenOCD. I think the main purpose of adding the routine was to do some
spot checks during debugging. In fact, it's probably not really
necessary once gdb interface was implemented, as gdb can do
disassembly itself.
If you
Hi,
On Sat, Oct 24, 2009 at 19:55, Øyvind Harboe wrote:
>> Yes; we're overdue to close this dev cycle, IMO.
>> I get the feeling Ųyvind is impatient for 0.4.0-dev ... :)
>
> One day I'll be able to post messages/email and have
> my name come out right: Øyvind.
>
> See http://www.zylin.com/contac
Hello Redirect,
Sunday, October 18, 2009, 1:14:20 AM, you wrote:
RSN> Yeah. The problem here is that HANDLE is typedef'd as void* (in
RSN> winnt.h), whereas _get_osfhandle() returns a long
RSN> (http://msdn.microsoft.com/en-us/library/ks2530z6.aspx), and gcc
RSN> insists on returning a warning wh
Hello All,
FYI, a new version of SF.net terms of use has been posted and is to
take effect on the 29th.
http://sourceforge.net/apps/trac/sitelegal/wiki/Terms%20of%20Use
Not sure if changes affect OpenOCD, but worth checking IMO.
--
WBR,
Igor mailto:skochin...@
Hello Øyvind,
Monday, October 5, 2009, 11:28:45 PM, you wrote:
ØH> "Migrate away from Berlios" committe wants an alternative
ØH> to Berlios mailing lists.
ØH> Some alternatives so far:
ØH> - Set up seperate openocd.org server => not going to happen. We
ØH> don't have the resources and dedicatio
Hi,
On Mon, Oct 5, 2009 at 17:02, Øyvind Harboe wrote:
>> I'm not sure if we really want SourceForge, though. Especially for mailing
>> lists. U-Boot moved away from it because of pain:
>>
>> http://lists.denx.de/pipermail/u-boot/2008-August/038001.html
>>
>> (not mentioned there: Spam handling)
Hello David,
Saturday, September 26, 2009, 8:11:26 AM, you wrote:
DB> REQUEST: someone with the IEEE JTAG spec, please verify that
DB> entry to IR_Capture state is required to load the shift register
DB> with x01 bits (as I'm told it does).
Not the actual spec, but the Boundary-Scan Handboo
Hi,
On Wed, Aug 26, 2009 at 17:58, David Brownell wrote:
> On Wednesday 26 August 2009, Igor Skochinsky wrote:
>> As for ARM, I think arm_simulator.c and arm_disassembler.c should be
>> merged since they share a lot of functionality.
>
> They seem kind of separate to m
On Wed, Aug 26, 2009 at 16:29, Øyvind Harboe wrote:
> I've worked on refactoring the arm simulation code
> to be able to support non-armv4_5 targets. The
> approach is to define an interface that the caller
> has to support. See below for example.
>
> Thoughts? Objections?
I think there is no need
Hello Jon,
Tuesday, July 28, 2009, 10:28:37 PM, you wrote:
JB> I'm porting OpenOCD to a new processor architecture and I've noticed that
JB> there doesn't appear to be any support for the X and F GDB Stop Reply
JB> Packets
JB> (http://sourceware.org/gdb/current/onlinedocs/gdb_34.html#SEC724),
JB>
Hi,
On Tue, Jun 23, 2009 at 09:42, Michael
Schwingen wrote:
> The driver is not the problem, the library is. And as long as the
> library 's license makes any kind of additional restriction, I believe
> it is not compatible with the GPL - but IANAL.
So if someone makes an alternative library (GPL
Hi All,
Saw this today on my RSS, might be useful.
HTML:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0205a/index.html
PDF:
http://infocenter.arm.com/help/topic/com.arm.doc.dai0205a/DAI0205A_writing_jtag_sequences_for_arm9_processors.pdf
--
WBR, Igor
___
Hello Spencer,
Monday, June 1, 2009, 1:07:39 PM, you wrote:
SO> A few unknown cmds in there, also notice the trash data at the beginning -
SO> from a previous 01 cmd.
I described two here:
https://lists.berlios.de/pipermail/openocd-development/2009-May/006781.html
Let me know if you need any other
Hello Alan,
Friday, May 29, 2009, 4:38:55 PM, you wrote:
ACdA> Did I forget other BSDL links? Show me the link ;-)
http://www.freelabs.com/~whitis/electronics/jtag/
under "Semiconductor Manufacturer's BSDL files"
--
WBR,
Igormailto:skochin...@mail.ru
_
Hello Øyvind,
Saturday, May 30, 2009, 9:40:54 AM, you wrote:
>> than just "conform to JTAG spec". No problem when
>> docs are available ... but sometimes they aren't.
ØH> XScale is under Marvell NDA for instance :-)
Really? What's this then?
http://www.marvell.com/products/cellular/application/P
Hello Xiaofan,
Saturday, May 23, 2009, 2:17:33 PM, you wrote:
XC> On Tue, May 19, 2009 at 8:26 AM, Igor Skochinsky wrote:
>> What I mean is I could write up a list of missing/underdocumented
>> commands and describe their input/output parameters. I don't have a
>> J-L
Hi,
On Tue, May 19, 2009 at 12:43, Wookey wrote:
> But we've been using these dongles for years to program these boards,
> and so have others, so clearly it can work.
>
> Is there some way to make openOCD behave in a sufficiently
> simple-minded manner to work with old-fashion parallel dongles?
>
Hello Benjamin,
Tuesday, May 19, 2009, 2:48:30 AM, you wrote:
BS> I think this wouldn't hurt anyone and could be very useful for debugging
like
BS> this.
BS> But it should definately check via EMU_CMD_GET_CAPS first if command is
BS> available. At the moment the caps value is read from the devi
Hello Benjamin,
Tuesday, May 19, 2009, 12:39:26 AM, you wrote:
BS> There's this segger closed source linux gdm server tool...
BS> http://www.segger.com/pub/jlink/JLink_Linux_090202.tar.gz
BS> It can show the hardware version.
Is there a necessity to map missing JLink commands? I could find them
o
Hello Bob,
Sunday, May 17, 2009, 6:44:41 PM, you wrote:
BF> I see. MinGW depends on whatever library happens to be installed so
BF> %ll may work on some Windows systems (which happen to have an
BF> updated library) and not on others.
None of the MSVC runtime libraries support %ll, you have to u
Hi All,
On Fri, May 8, 2009 at 19:19, Zach Welch wrote:
[...]
> I apologize for hitting Reply instead of Reply-all (and the for my
> mailing system for delaying the second message just minutes later).
> Clearly, I have no intention of shying away from the public eye.
Sorry for derailing the thre
Hello Dick,
Thursday, April 30, 2009, 4:28:54 AM, you wrote:
>> Due to the lack of prior opposition, I had been debating whether to
>> simply commit a change that adds -std=c99 and seeing how the community
>> reacts (since I can now revert it quickly if it poses a real problem).
>>
DH> The -
Hi Dick,
On Wed, Apr 29, 2009 at 16:47, Dick Hollenbeck wrote:
> Please always state your build environment. What operating system, and what
> tool chain is it trying to use?
>
> mingw32?
> cygwin?
Just Visual Studio 2005, but I guess the exact version does not matter much.
> I will assume
Hello All,
Tuesday, April 28, 2009, 7:29:46 PM, Dick wrote:
DH> Latest.
DH> Paaleese commit any time.
So I decided to try the legendary CMake compatibility and compile
OpenOCD with native Win32 MSVC. The makefile generation went mostly
without a hitch, but the actual compilation ran into a lot o
Hello All,
This is my first patch, so please let me know if I did anything wrong.
The problem: for Cortex-M3 targets, the FPB unit (Flash Patch and
Breakpoint) was enabled only on reset event. If I connected to already
running code after it's been reset and tried to set some breakpoints,
OpenO
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