Hello,
On 04.02.2011 01:38, Aaron Carroll wrote:
At a high level, I think it makes sense for functions to be explicit
about selecting an AP... I don't see any advantage to a "default".
I don't know if the AP always equal in a complete architecture or is this done at cpu vendor level.
For mem
Maybe DAPs should exist independently of JTAG and
targets and targets should refer to the DAP relevant
to that target?
--
Øyvind Harboe
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ARM7 ARM9 ARM11 XSca
Hi,
I'm about to start hacking on support for multiple targets per TAP.
Specifically this is for Cortex-A9, where a single TAP (ADIv5 DAP)
exposes several cores. The problem is that each core is a separate
target, but they need to share DAP data (struct adiv5_dap).
Currently, "struct adiv5_dap" i
On 03/02/11 17:33, Mathias K. wrote:
Hello,
i think it's better to fix ahbap_debugport_init. I have the same wrong
default AP on cortex_r4.
/* Default MEM-AP setup.
*
* REVISIT AP #0 may be an inappropriate default for this.
* Should we probe, or take a hint from the caller?
* Presumably we ca
Hi,
Attached is patch that fixes command parsing in buspirate driver. Also
changes some error strings to give more sense.
When exactly did the script parsing change ? For some reason in-line
comments are parsed as part of the command and change argument count.
Michal Demin
0001-Fix-command-p
Hello,
this patch add commands to access to x,y and p memory. For run time optimization some local jtag
function was changed to static inline.
Regards,
Mathias
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index 85d559a..4371d0a 100644
--- a/src/target/dsp563xx.c
+++ b/src/targe
On 02/03/2011 12:23 PM, Øyvind Harboe wrote:
On Thu, Feb 3, 2011 at 12:16 PM, gcembed wrote:
Hello,
I have downloaded today last git repo of OpenOCD
(git://repo.or.cz/openocd.git)
As previously, I still have problem to erase and program STM32. I sent a
patch to create unlock_mass_erase function
It's fast for 27kBytes/s for flash + erase. STM32F200 has 16M internal RC,
so the JTAG can run at 2.5M.
As I test for STM32F100, flash programming is usually at 13KBytes/s under
OpenOCD.
ST website is not available in China, I don't know the state of STM32F200.
I have placed an sample order of 20
Merged.
Thanks!
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 87 40 27
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
___
Openocd-
Merged.
Thanks!
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 87 40 27
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
___
Openocd-d
On Thu, Feb 3, 2011 at 12:16 PM, gcembed wrote:
> Hello,
> I have downloaded today last git repo of OpenOCD
> (git://repo.or.cz/openocd.git)
> As previously, I still have problem to erase and program STM32. I sent a
> patch to create unlock_mass_erase function ([PATCH] stm32 : improve unlock
> pro
Hello,
I have downloaded today last git repo of OpenOCD
(git://repo.or.cz/openocd.git)
As previously, I still have problem to erase and program STM32. I sent a
patch to create unlock_mass_erase function ([PATCH] stm32 : improve
unlock procedure for mass_erase) but it was never accepted because
Hi Rodrigo,
On 2/3/11, Rodrigo Rosa wrote:
> Great, I got that working.
> I haven't been able to figure out what the following parameters of a tap
> are: irlen, ircapture and irmask.
> What does "ir" stand for?
>
I suggest you take a look (a reading I mean) in original OpenOCD
author's thesis:
h
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