by: Antoine Tenart
> Signed-off-by: Paul Burton
Thanks,
Paul
[ This message was auto-generated; if you believe anything is incorrect
then please email paul.bur...@mips.com to report it. ]
Hello,
Antoine Tenart wrote:
> This patch adds one register range within the mscc,vsc7514-switch node,
> to describe the PTP registers.
Applied to mips-next.
> commit 048dc3abe827
> https://git.kernel.org/mips/c/048dc3abe827
>
> Signed-off-by: Antoine Tenart
> Signe
;)))
> +#define __read_mostly __section(.data..read_mostly)
>
> #endif /* _ASM_CACHE_H */
> --
> 2.23.0.rc1.153.gdeed80330f-goog
I'm not copied on the rest of the series so I'm not sure what your
expectations are about where this should be applied. Let me know if
you'd prefer this to go through mips-next, otherwise:
Acked-by: Paul Burton
Thanks,
Paul
f the
series:
Acked-by: Paul Burton
Same applies for patch 4.
Thanks,
Paul
> ---
> arch/mips/boot/dts/mscc/ocelot.dtsi | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi
> b/arch/mips/boot/dts/mscc/oc
that the target field is a pointer.
Signed-off-by: Paul Burton
Fixes: b6bd53f9c4e8 ("MIPS: Add missing file for eBPF JIT.")
Cc: Alexei Starovoitov
Cc: Daniel Borkmann
Cc: Martin KaFai Lau
Cc: Song Liu
Cc: Yonghong Song
Cc: netdev@vger.kernel.org
Cc: b...@vger.kernel.org
C
Hello,
Hauke Mehrtens wrote:
> The separate GPHY Firmware loader driver is not used any more, the GPHY
> firmware is now loaded by the GSWIP switch driver which also makes use
> of the GPHY.
> Remove the old unused GPHY firmware loader driver.
>
> The GPHY firmware is useless without an Ethernet
Hello,
Paul Burton wrote:
> The function prototype used to call JITed eBPF code (ie. the type of the
> struct bpf_prog bpf_func field) returns an unsigned int. The MIPS n64
> ABI that MIPS64 kernels target defines that 32 bit integers should
> always be sign extended when passed in
-by: Paul Burton
Fixes: b6bd53f9c4e8 ("MIPS: Add missing file for eBPF JIT.")
Cc: sta...@vger.kernel.org # v4.13+
---
arch/mips/net/ebpf_jit.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/mips/net/ebpf_jit.c b/arch/mips/net/ebpf_jit.c
index b1
REG_32BIT_ZERO_EX and REG_64BIT are always handled in exactly the same
way, and reg_val_propagate_range() never actually sets any register to
type REG_32BIT_ZERO_EX.
Remove the redundant & unused REG_32BIT_ZERO_EX.
Signed-off-by: Paul Burton
---
arch/mips/net/ebpf_jit.c
Hello,
Christoph Hellwig wrote:
> The DMA API generally relies on a struct device to work properly, and
> only barely works without one for legacy reasons. Pass the easily
> available struct device from the platform_device to remedy this.
>
> Also use GFP_KERNEL instead of GFP_ATOMIC as the gfp_
ons(-)
Would you like this to go through the MIPS tree or elsewhere? If the
latter:
Acked-by: Paul Burton
Thanks,
Paul
Hi Jiong,
On Tue, Dec 04, 2018 at 03:55:16PM -0500, Jiong Wang wrote:
> Jitting of BPF_K is supported already, but not BPF_X. This patch complete
> the support for the latter on both MIPS and microMIPS.
>
> Cc: Paul Burton
> Cc: linux-m...@vger.kernel.org
> Signed-
Hi Jakub,
On Mon, Dec 03, 2018 at 03:55:45PM -0800, Jakub Kicinski wrote:
> On Mon, 3 Dec 2018 22:42:04 +0000, Paul Burton wrote:
> > Jiong Wang wrote:
> > > For micro-mips, srlv inside POOL32A encoding space should use 0x50
> > > sub-opcode, NOT 0x90.
> > &g
ion which is using 0x50 for srlv and 0x90 for srav.
>
> v1->v2:
> - Keep mm_srlv32_op sorted by value.
>
> Fixes: f31318fdf324 ("MIPS: uasm: Add srlv uasm instruction")
> Cc: Markos Chandras
> Cc: Paul Burton
> Cc: linux-m...@vger.kernel.org
> Acked-by: Ja
itecture
team.
> Fixes: f31318fdf324 ("MIPS: uasm: Add srlv uasm instruction")
> CC: Markos Chandras
> CC: Paul Burton
> Acked-by: Jakub Kicinski
> Signed-off-by: Jiong Wang
> ---
> arch/mips/include/uapi/asm/inst.h | 2 +-
> 1 file changed, 1 insertion(+), 1
Hi Hauke,
On Sat, Jul 21, 2018 at 09:13:57PM +0200, Hauke Mehrtens wrote:
> diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
> index e0af39b33e28..c704312ef7d5 100644
> --- a/arch/mips/lantiq/xway/sysctrl.c
> +++ b/arch/mips/lantiq/xway/sysctrl.c
> @@ -536,7 +536,7 @@
> driver.
>
> Signed-off-by: Hauke Mehrtens
> ---
> arch/mips/lantiq/xway/dma.c| 1 -
> drivers/net/ethernet/lantiq_etop.c | 1 +
> 2 files changed, 1 insertion(+), 1 deletion(-)
If you'd like this to go via the netdev tree to keep it with the rest of
the series:
Hi Florian,
On Wed, Jun 27, 2018 at 10:54:24AM -0700, Florian Fainelli wrote:
> On 06/26/2018 05:06 PM, Paul Burton wrote:
> > When using a PHY connected via RGMII, as the pch_gbe driver presumes is
> > the case, the RX clock is provided by the PHY to the MAC. Various PHYs,
> &g
Hi Andrew,
On Wed, Jun 27, 2018 at 07:51:44PM +0200, Andrew Lunn wrote:
> > @@ -5,7 +5,8 @@
> > config PCH_GBE
> > tristate "OKI SEMICONDUCTOR IOH(ML7223/ML7831) GbE"
> > depends on PCI && (X86_32 || COMPILE_TEST)
> > - select MII
> > + select PHYLIB
> > + imply AT803X_PHY if X86_32
Hi Andrew,
On Wed, Jun 27, 2018 at 07:30:14PM +0200, Andrew Lunn wrote:
> On Tue, Jun 26, 2018 at 05:06:07PM -0700, Paul Burton wrote:
> > When using a PHY connected via RGMII, as the pch_gbe driver presumes is
> > the case, the RX clock is provided by the PHY to the MA
Hi Andrew,
On Wed, Jun 27, 2018 at 07:21:31PM +0200, Andrew Lunn wrote:
> > [1] Please, someone patent PHY hotplugging & rigorously enforce said
> > patent such that nobody can do it. At least not with an EG20T MAC.
>
> Hi Paul
>
> It is already possible, and probably patented. SFP cages are
drop that from the kerneldoc comment.
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: netdev@vger.kernel.org
---
Changes in v7: New patch
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 9 -
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 1 -
2 files cha
Allow the pch_gbe driver to be built on MIPS platforms, allowing its use
on the MIPS Boston development board.
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: netdev@vger.kernel.org
---
Changes in v7: None
drivers/net/ethernet/oki-semi/pch_gbe/Kconfig | 2 +-
1 file
register.
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: netdev@vger.kernel.org
---
Changes in v7: New patch
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 2 --
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 7 +--
2 files changed, 1 insertion(+), 8 d
series.
- Drop the AR8031 PHY hibernation disable fixup.]
Signed-off-by: Andrew Lunn
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: netdev@vger.kernel.org
---
Changes in v7:
- Heavy rebasing atop earlier patches.
Changes in v6:
- New patch
drivers/net/ethernet/oki
We should now be able to cope with the PHY entering hibernation, ie.
ceasing to provide the RX clock, whilst the ethernet link is down.
Remove the code responsible for disabling the AR8031 PHY's hibernation
feature, allowing the PHY to enter its low power hibernation state.
Signed-off-by:
Allow the ptp_pch driver to be built on MIPS platforms in preparation
for use on the MIPS Boston board.
Signed-off-by: Paul Burton
Acked-by: Richard Cochran
Cc: Andrew Lunn
Cc: David S. Miller
Cc: netdev@vger.kernel.org
---
Changes in v7: None
drivers/ptp/Kconfig | 2 +-
1 file changed, 1
mp; moving us closer to the behavior we'll
have with phylib.
[1] Please, someone patent PHY hotplugging & rigorously enforce said
patent such that nobody can do it. At least not with an EG20T MAC.
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: netdev@vger.kernel.
_rx_addrs() entirely, leaving the
address configuration performed by pch_gbe_set_multi() intact.
With this done we know that pch_gbe_reset() will leave us with the
multicast MAC addresses & filtering configured correctly, so we can
remove the call to pch_gbe_set_multi() in pch_gbe_watchdog
tch
moves us away from this model by only configuring the MAC when the PHY
indicates that the ethernet link is up. When the link is up we should be
able to safely expect that the RX clock is being provided, and therefore
safely reset & configure the MAC.
Signed-off-by: Paul Burton
Cc: An
entirely.
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: netdev@vger.kernel.org
---
Changes in v7: New patch
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/net/etherne
except for whitespace changes to satisfy
checkpatch.
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: netdev@vger.kernel.org
---
Changes in v7: New patch
.../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 103 +-
1 file changed, 52 insertions(+), 51 deletions
contains some platform-specific code for, so I haven't been able to test
the end result there.
Applies cleanly atop net-next as of commit 27a2628b3c24 ("selftests:
forwarding: mirror_gre_vlan_bridge_1q: Unset rp_filter").
Thanks,
Paul
Andrew Lunn (1):
net: pch_gbe: Convert
preprocessor defines won't be the best way to
select between them anyway.
Signed-off-by: Paul Burton
---
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 9 -
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h | 1 -
2 files changed, 10 deletions(-)
diff --git a/drivers/net/eth
values within a
struct pch_gbe_bus_info which is never used, so we simply remove the
call to it in pch_gbe_probe & remove struct pch_gbe_bus_info entirely.
Now that struct pch_gbe_functions is empty we remove it entirely too.
Signed-off-by: Paul Burton
---
.../net/ethernet/oki-semi/pch
The pch_gbe driver includes some code which appears to be an attempt to
work around a problem with the pch_gbe_free_rx_resources &
pch_gbe_free_tx_resources functions that no longer exists. Remove the
code guarded by the never-defined RINGFREE preprocessor macro.
Signed-off-by: Paul Bu
r_up & pch_phy_power_down directly.
Signed-off-by: Paul Burton
---
.../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 4
.../ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 22 ---
.../ethernet/oki-semi/pch_gbe/pch_gbe_api.h | 2 --
.../ethernet/oki-semi/pch_gbe/pch_gbe_main
the
single caller pch_gbe_sw_init.
With this pch_gbe_api.c & pch_gbe_api.h are essentially empty, so they
are removed & inclusions of the latter replaced with pch_gbe_phy.h which
was previously being included via pch_gbe_api.h.
Signed-off-by: Paul Burton
---
.../net/ethernet/oki-semi
) into its single caller
(pch_gbe_reset).
Signed-off-by: Paul Burton
---
.../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 2 -
.../ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 45 ---
.../ethernet/oki-semi/pch_gbe/pch_gbe_api.h | 1 -
.../ethernet/oki-semi/pch_gbe/pch_gbe_main.c
is defined in the same
translation unit as all of its callers, we can make it static & remove
it from the pch_gbe.h header.
Signed-off-by: Paul Burton
---
.../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 3 ---
.../ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 19 ---
.../ethe
In these cases, just as when
we want to monitor more multicast addresses than we have MAC address
registers, we disable multicast filtering so the MAC address registers
are unused.
Signed-off-by: Paul Burton
---
.../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 33 +--
1 file ch
registers, then frees the array.
This patch simplifies this somewhat by inlining
pch_gbe_mac_mc_addr_list_update into pch_gbe_set_multi, and removing the
requirement for the MAC addresses to stored consecutively in a single
array.
Signed-off-by: Paul Burton
---
.../ethernet/oki-semi/pch_gbe
, which is already called
directly within the same translation unit, can therefore be made static
and removed from the pch_gbe_phy.h header.
Signed-off-by: Paul Burton
---
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 2 --
.../net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 16
river has been in mainline, despite many changes being made
to it before and since.
Signed-off-by: Paul Burton
---
.../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 19 +--
1 file changed, 1 insertion(+), 18 deletions(-)
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_m
For some reason the pch_gbe driver contains a struct pch_gbe_functions
with pointers used by a HAL abstraction layer, even though there is only
one implementation of each function.
This patch removes the reset_phy abstraction in favor of calling
pch_gbe_phy_hw_reset directly.
Signed-off-by: Paul
The pch_gbe driver includes a 'copybreak' parameter which appears to
have been copied from the e1000e driver but is entirely unused. Remove
the dead code.
Signed-off-by: Paul Burton
---
.../net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 15 ---
1 file changed, 15
a little more maleable & reduce the probability of
me gouging out my eyes.
Applies cleanly atop net-next as of 5424ea27390f ("netns: get more
entropy from net_hash_mix()").
Thanks,
Paul
Paul Burton (14):
net: pch_gbe: Remove unused copybreak parameter
net: pch_gbe: Remove
miic & pch_gbe_phy_write_reg_miic
directly.
Signed-off-by: Paul Burton
---
.../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 4 ---
.../ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 36 ---
.../ethernet/oki-semi/pch_gbe/pch_gbe_api.h | 2 --
.../oki-semi/pch_gbe/pch_gbe_e
Hi Andrew,
On Fri, May 11, 2018 at 09:24:46PM +0200, Andrew Lunn wrote:
> > I could reorder the probe function a little to initialize the PHY before
> > performing the MAC reset, drop this patch and the AR803X hibernation
> > stuff from patch 2 if you like. But again, I can't actually test the
> >
On Fri, May 11, 2018 at 11:25:02AM -0700, Paul Burton wrote:
> Hi Andrew,
>
> On Fri, May 11, 2018 at 02:26:19AM +0200, Andrew Lunn wrote:
> > On Thu, May 10, 2018 at 04:16:52PM -0700, Paul Burton wrote:
> > > From: Andrew Lunn
> > >
> > > On s
Hi Andrew,
On Fri, May 11, 2018 at 02:26:19AM +0200, Andrew Lunn wrote:
> On Thu, May 10, 2018 at 04:16:52PM -0700, Paul Burton wrote:
> > From: Andrew Lunn
> >
> > On some boards, this PHY has a problem when it hibernates. Export this
> > function to a board can regi
Tree, so the DT and kernel are always shipped
together for the Boston platform.
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v6:
- New patch.
Changes in v5: None
Changes in v4: None
Changes in v3: None
Allow the pch_gbe driver to be built on MIPS platforms, allowing its use
on the MIPS Boston development board.
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v6:
- None.
Changes in v5:
- None.
Changes
Allow the ptp_pch driver to be built on MIPS platforms in preparation
for use on the MIPS Boston board.
Signed-off-by: Paul Burton
Acked-by: Richard Cochran
Cc: Andrew Lunn
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
Signed-off-by: Paul Burton
---
Changes
-NULL device
node in order to continue functioning as-is if a system has
CONFIG_OF_MDIO=y but doesn't use the devicetree.
Signed-off-by: Paul Burton
Cc: Andrew Lunn
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v6:
- New patch, signific
From: Andrew Lunn
On some boards, this PHY has a problem when it hibernates. Export this
function to a board can register a PHY fixup to disable hibernation.
Signed-off-by: Andrew Lunn
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
GPIOF_ACTIVE_LOW to the minnow PHY reset GPIO flags.]
Signed-off-by: Andrew Lunn
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v6:
- New patch.
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
i7200-processor-core-delivers-unmatched-performance-and-efficiency-for-advanced-lte5g-communications-and-networking-ic-designs/
Andrew Lunn (2):
net: phy: at803x: Export at803x_debug_reg_mask()
net: ethernet: pch_gbe: Convert to mdiobus and phylib
Paul Burton (4):
net: pch_gbe: Su
Hi Andrew,
On Tue, Feb 20, 2018 at 03:28:17AM +0100, Andrew Lunn wrote:
> Hi Paul
>
> Here is my stab at converting the OKI PCH GBE to use the common MDIO
> bus and phylib drivers. This is compile tested only, and pretty much
> guaranteed to be broken. But hopefully it will help you. Feel free to
Hi David,
On Mon, Feb 19, 2018 at 02:01:25PM +, David Laight wrote:
> From: Paul Burton
> > Sent: 17 February 2018 20:11
> >
> > The ethernet controller found in the Intel EG20T Platform Controller
> > Hub requires that we place 2 bytes of padding between the ether
Hi Andrew,
On Sun, Feb 18, 2018 at 06:56:07PM +0100, Andrew Lunn wrote:
> On Sun, Feb 18, 2018 at 09:03:10AM -0800, Paul Burton wrote:
> > Hi David,
> >
> > On Sun, Feb 18, 2018 at 10:31:12AM -0500, David Miller wrote:
> > > Nobody is going to see and apply thes
Hi David,
On Sun, Feb 18, 2018 at 10:31:12AM -0500, David Miller wrote:
> Nobody is going to see and apply these patches if you don't CC: the
> Linux networking development list, netdev@vger.kernel.org
You're replying to mail that was "To: netdev@vger.kernel.org" and I see
the whole series in the
Hi Andrew,
On Sun, Feb 18, 2018 at 12:34:42AM +0100, Andrew Lunn wrote:
> > Even if that is true, rewriting the driver's PHY handling would be a
> > very separate change to the changes this series make which allow this
> > driver to work on a platform besides the Minnowboard. The *only* thing
> >
Hi Andrew,
On Sat, Feb 17, 2018 at 11:29:33PM +0100, Andrew Lunn wrote:
> On Sat, Feb 17, 2018 at 12:10:25PM -0800, Paul Burton wrote:
> > The MIPS Boston development board uses the Intel EG20T Platform
> > Controller Hub, including its gigabit ethernet controller, and requir
Allow the ptp_pch driver to be built on MIPS platforms in preparation
for use on the MIPS Boston board.
Signed-off-by: Paul Burton
Acked-by: Richard Cochran
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5:
- Newly included in this series to
A is enabled only after all writes to the descriptors.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5:
- New patch.
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/net/ethernet/oki-semi/pch
ng, making it
clearer what the code is doing, and fix a typo in the comment indicating
that padding is inserted.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v
- we need to reset the PHY at all the same times. Do
that from pch_gbe_mac_reset_hw which is used to reset the MAC in all
cases.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Introduce documentation for a device tree binding for the Intel Platform
Controller Hub (PCH) GigaBit Ethernet (GBE) device. Although this is a
PCIe device & thus largely auto-detectable, this binding will be used to
provide the driver with the PHY reset GPIO.
Signed-off-by: Paul Burton
the same way.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5:
- New patch.
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 52 ++
pch_gbe_disable_dma_rx() rather than
duplicate its functionality.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5:
- New patch.
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../net/ethernet/oki-semi/pch_gbe
Allow the pch_gbe driver to be built on MIPS platforms, allowing its use
on the MIPS Boston development board.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2
hould
ensure that the device doesn't begin reading descriptors before we have
configured them.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5:
- New patch.
Changes in v4: None
Changes in v3: None
Changes in v2: None
l be probed after the ethernet MAC.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5: None
Changes in v4:
- Use ERR_CAST(), thanks kbuild test robot/Fengguang!
Changes in v3: None
Changes in v2:
- Tidy up handling of par
mode. Rectify this by appropriately byte swapping
these descriptor field values in the driver software.
Signed-off-by: Hassan Naveed
Signed-off-by: Paul Burton
Reviewed-by: Paul Burton
Reviewed-by: Matt Redfearn
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
the PHY reset GPIO.
Applies atop v4.16-rc1.
Hassan Naveed (1):
net: pch_gbe: Fix TX RX descriptor accesses for big endian systems
Paul Burton (13):
net: pch_gbe: Mark Minnow PHY reset GPIO active low
net: pch_gbe: Pull PHY GPIO handling out of Minnow code
dt-bindings: net: Document Intel
speed of the CPU.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5:
- Bump up the timeout based on feedback from Marcin.
Changes in v4: None
Changes in v3:
- Switch to using readl_poll_timeout_atomic().
Changes in v2
reflect logically whether the device is being reset or not.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/net/ethernet/oki-semi/pch_gbe/pch_gb
patches.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v5:
- Name struct pch_gbe_privdata's platform_init pdata arg, per checkpatch.
Changes in v4: None
Changes in v3:
- Use adapter->pdata as arg to platform_init
Hi David,
On Tuesday, 26 September 2017 21:53:21 PDT David Miller wrote:
> From: Paul Burton
> Date: Tue, 26 Sep 2017 21:30:56 -0700
>
> > Nobody said that you are required to do anything, I suggested that
> > it would be beneficial if you were to suggest a change to the
&
Hi David,
On Tuesday, 26 September 2017 19:52:44 PDT David Miller wrote:
> From: Paul Burton
> Date: Tue, 26 Sep 2017 14:30:33 -0700
>
> > I'd suggest that at a minimum if you're unwilling to obey the API as
> > described in Documentation/DMA-API.txt then it would
Hi David,
On Tuesday, 26 September 2017 13:33:09 PDT David Miller wrote:
> From: Paul Burton
> Date: Tue, 26 Sep 2017 11:48:19 -0700
>
> >> The device writes into only the bytes it was given access to, which
> >> starts at the DMA address.
> >
> > OK -
Hi David,
On Tuesday, 26 September 2017 10:34:00 PDT David Miller wrote:
> From: Matt Redfearn
> Date: Tue, 26 Sep 2017 14:57:39 +0100
>
> > Since the MIPS architecture requires software cache management,
> > performing a dma_map_single(TO_DEVICE) will writeback and invalidate
> > the cachelines
Allow the pch_gbe driver to be built on MIPS platforms, in preparation
for its use on the MIPS Boston board.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v4: None
speed of the CPU.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v4: None
Changes in v3:
- Switch to using readl_poll_timeout_atomic().
Changes in v2: None
drivers
- we need to reset the PHY at all the same times. Do
that from pch_gbe_mac_reset_hw which is used to reset the MAC in all
cases.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
l be probed after the ethernet MAC.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v4:
- Use ERR_CAST(), thanks kbuild test robot/Fengguang!
Changes in v3: None
Cha
Introduce documentation for a device tree binding for the Intel Platform
Controller Hub (PCH) GigaBit Ethernet (GBE) device. Although this is a
PCIe device & thus largely auto-detectable, this binding will be used to
provide the driver with the PHY reset GPIO.
Signed-off-by: Paul Burton
patches.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v4: None
Changes in v3:
- Use adapter->pdata as arg to platform_init, to fix bisectability.
Changes in v2: N
reflect logically whether the device is being reset or not.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
dri
the PHY reset GPIO.
Applies atop v4.12-rc4.
Paul Burton (7):
net: pch_gbe: Mark Minnow PHY reset GPIO active low
net: pch_gbe: Pull PHY GPIO handling out of Minnow code
dt-bindings: net: Document Intel pch_gbe binding
net: pch_gbe: Add device tree support
net: pch_gbe: Always reset PHY
Hi Andrew,
On Saturday, 3 June 2017 10:52:00 PDT Andrew Lunn wrote:
> > diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
> > b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index
> > d38198718005..cb9b904786e4 100644
> > --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_m
Allow the pch_gbe driver to be built on MIPS platforms, in preparation
for its use on the MIPS Boston board.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v3: None
speed of the CPU.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v3:
- Switch to using readl_poll_timeout_atomic().
Changes in v2: None
drivers/net/ethernet/oki-semi
- we need to reset the PHY at all the same times. Do
that from pch_gbe_mac_reset_hw which is used to reset the MAC in all
cases.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
Introduce documentation for a device tree binding for the Intel Platform
Controller Hub (PCH) GigaBit Ethernet (GBE) device. Although this is a
PCIe device & thus largely auto-detectable, this binding will be used to
provide the driver with the PHY reset GPIO.
Signed-off-by: Paul Burton
l be probed after the ethernet MAC.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v3: None
Changes in v2:
- Tidy up handling of parsing private data, drop err
patches.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v3:
- Use adapter->pdata as arg to platform_init, to fix bisectability.
Changes in v2: None
drivers/net/ether
reflect logically whether the device is being reset or not.
Signed-off-by: Paul Burton
Cc: David S. Miller
Cc: Eric Dumazet
Cc: Jarod Wilson
Cc: Tobias Klauser
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org
---
Changes in v3: None
Changes in v2: None
drivers/net/ethernet/oki-semi
the PHY reset GPIO.
Applies atop v4.12-rc3.
Paul Burton (7):
net: pch_gbe: Mark Minnow PHY reset GPIO active low
net: pch_gbe: Pull PHY GPIO handling out of Minnow code
dt-bindings: net: Document Intel pch_gbe binding
net: pch_gbe: Add device tree support
net: pch_gbe: Always reset PHY
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