Hi Jakub,
On Mon, Dec 03, 2018 at 03:55:45PM -0800, Jakub Kicinski wrote:
> On Mon, 3 Dec 2018 22:42:04 +0000, Paul Burton wrote:
> > Jiong Wang wrote:
> > > For micro-mips, srlv inside POOL32A encoding space should use 0x50
> > > sub-opcode, NOT 0x90.
> > >
> > > Some early version ISA doc describes the encoding as 0x90 for both srlv
> > > and
> > > srav, this looks to me was a typo. I checked Binutils libopcode
> > > implementation which is using 0x50 for srlv and 0x90 for srav.
> > >
> > > v1->v2:
> > > - Keep mm_srlv32_op sorted by value.
> > >
> > > Fixes: f31318fdf324 ("MIPS: uasm: Add srlv uasm instruction")
> > > Cc: Markos Chandras <markos.chand...@imgtec.com>
> > > Cc: Paul Burton <paul.bur...@mips.com>
> > > Cc: linux-m...@vger.kernel.org
> > > Acked-by: Jakub Kicinski <jakub.kicin...@netronome.com>
> > > Acked-by: Song Liu <songliubrav...@fb.com>
> > > Signed-off-by: Jiong Wang <jiong.w...@netronome.com>
> >
> > Applied to mips-fixes.
>
> Newbie process related question - are the arch JIT patches routed via
> arch trees or bpf-next? Jiong has more (slightly conflicting) JIT
> patches to send - I wonder how they'll get applied and whether to wait
> for the mips -> Linus -> net -> bpf merge chain.
I'd expect that to be a case-by-case "what makes most sense this time?"
sort of question.
In this particular patch the code you're changing isn't specifically
BPF-related code, it's part of the MIPS uasm assembler which MIPS BPF
happens to use behind the scenes, so since it seemed like a pretty
standalone patch taking it through the MIPS tree made sense to me.
If you have related patches the best thing to do would be to submit them
together as a series. Then after the maintainers involved can see the
patches we can figure out the best way to apply them.
Thanks,
Paul
