Hi Andreas,
On Mon, Sep 16, 2019 at 4:25 PM wrote:
>
>
>
> On 16.09.2019 13:14, Andreas Schwab wrote:
> > External E-Mail
> >
> >
> > On Sep 16 2019, wrote:
> >
> >> I will have a look on it. It would be good if you could give me some
> >> details about the steps to reproduce it.
> >
> > You nee
Hi Paul,
On Thu, Apr 4, 2019 at 6:35 PM Paul Thomas wrote:
>
> On Tue, Mar 19, 2019 at 1:07 PM Paul Thomas wrote:
> >
> Hi All, just a reminder on this.
Could you please resend the patch addressing Dave's review comments
about subject line and Fixes tag?
Regards,
Harini
Hi Paul,
On Tue, Mar 19, 2019 at 11:13 PM Paul Thomas wrote:
>
> Oh I notice that this is in the xilnx github repo so if it makes it in
> from there that works too.
No, I don't plan to send anything.
I just used your patch (retained your signed-off, of course) and
added the && check, because I w
Hi Paul, Jake,
On Wed, Mar 13, 2019 at 3:08 AM Keller, Jacob E
wrote:
>
>
>
> > -Original Message-
> > From: netdev-ow...@vger.kernel.org [mailto:netdev-ow...@vger.kernel.org] On
> > Behalf Of Paul Thomas
> > Sent: Tuesday, March 12, 2019 1:05 PM
> > To: netdev@vger.kernel.org
> > Subject:
Hi Paul, Jake,
On Wed, Mar 13, 2019 at 5:01 AM Paul Thomas wrote:
>
> On Tue, Mar 12, 2019 at 7:07 PM Keller, Jacob E
> wrote:
> >
> >
> >
> > > -Original Message-
> > > From: Paul Thomas [mailto:pthomas8...@gmail.com]
> > > Sent: Tuesday, March 12, 2019 3:05 PM
> > > To: Keller, Jacob E
Hi Andrew,
On Thu, Feb 28, 2019 at 1:03 PM Harini Katakam wrote:
>
> Hi,
> On Wed, Feb 27, 2019 at 2:35 PM Harini Katakam wrote:
> >
> > Hi Andrew, Paul,
> >
> > On Wed, Feb 27, 2019 at 2:15 PM Michal Simek
> > wrote:
> > >
> > > On 21
Hi Klaus,
> -Original Message-
> From: Klaus Doth [mailto:k...@doth.eu]
> Sent: Friday, March 8, 2019 10:19 PM
> To: netdev@vger.kernel.org
> Cc: da...@davemloft.net; claudiu.bez...@microchip.com; Harini Katakam
> ; Michal Simek ; Nicolas Ferre
>
> Subject: Cade
Hi Paul,
On Sat, Mar 9, 2019 at 3:13 AM Paul Thomas wrote:
>
> On Fri, Mar 8, 2019 at 1:07 PM Paul Thomas wrote:
> >
> > Hi Harini,
> >
> > On Fri, Mar 8, 2019 at 1:08 AM Harini Katakam wrote:
> > >
> > > Hi Paul,
> > > On Fri, Mar 8, 20
Hi Paul,
On Fri, Mar 8, 2019 at 12:33 AM Paul Thomas wrote:
>
> On Thu, Mar 7, 2019 at 12:32 AM Harini Katakam wrote:
> >
> > Hi Paul,
> > On Thu, Mar 7, 2019 at 4:38 AM Paul Thomas wrote:
> > >
> > > On Fri, Mar 1, 2019 at 1:24 AM Hari
Hi Paul,
On Thu, Mar 7, 2019 at 4:38 AM Paul Thomas wrote:
>
> On Fri, Mar 1, 2019 at 1:24 AM Harini Katakam wrote:
> >
> > +netdev
> >
> > Hi Paul,
> > On Fri, Mar 1, 2019 at 12:29 AM Richard Cochran
> > wrote:
> > >
> > >
TSU clock needs to be enabled/disabled as per support in devicetree
and it should also be controlled during suspend/resume (WOL has no
dependency on this clock).
Signed-off-by: Harini Katakam
---
v3 and v2:
No changes
drivers/net/ethernet/cadence/macb.h | 3 ++-
drivers/net/ethernet
: Kedareswara rao Appana
Signed-off-by: Harini Katakam
---
v3:
Fix >80 char lines
v2 changes:
Fixed parameter passed to phy calls.
drivers/net/ethernet/cadence/macb_main.c | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ether
Add runtime pm functions and move clock handling there.
Add runtime PM calls to mdio functions to allow for active mdio bus.
Signed-off-by: Shubhrajyoti Datta
Signed-off-by: Harini Katakam
---
v3 changes:
Fix exit path using goto
v2 changes:
Allow for mdio bus to be active
Changes from RFC
This series adds support for macb suspend/resume with system power down.
In relation to the above, this series also updates mdio_read/write
function for PM and adds tsu clock management.
Harini Katakam (4):
net: macb: Check MDIO state before read/write and use timeouts
net: macb: Support
Replace the while loop in MDIO read/write functions with a timeout.
In addition, add a check for MDIO bus busy before initiating a new
operation as well to make sure there is no ongoing MDIO operation.
Signed-off-by: Shubhrajyoti Datta
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Harini
+netdev
Hi Paul,
On Fri, Mar 1, 2019 at 12:29 AM Richard Cochran
wrote:
>
> On Thu, Feb 28, 2019 at 12:33:26PM -0500, Paul Thomas wrote:
> > Yes changing it to TSTAMP_ALL_PTP_FRAMES instead of TSTAMP_ALL_FRAMES
> > does seem to fix the ssh issue. My worry is that there is still a bug
> > somewher
Hi,
On Wed, Feb 27, 2019 at 2:35 PM Harini Katakam wrote:
>
> Hi Andrew, Paul,
>
> On Wed, Feb 27, 2019 at 2:15 PM Michal Simek wrote:
> >
> > On 21. 02. 19 12:03, Michal Simek wrote:
> > > On 21. 02. 19 11:24, Paul Kocialkowski wrote:
> > >> Hi,
&g
On Thu, Feb 28, 2019 at 12:10 AM Stephen Hemminger
wrote:
>
> On Wed, 27 Feb 2019 17:24:03 +0530
> Harini Katakam wrote:
>
>
> Device naming is a hard problem, and there is no perfect solution.
>
> Device tree should be providing hints to userspace policy for naming,
Hi,
We've had some users requesting control over net device name order
when multiple ethernet devices are present on a system. I've tried a
few solutions to this and looked it up on forums. But I apologize if
I have missed something.
I know that the current system allocates eth as per probe order
Hi Andrew, Paul,
On Wed, Feb 27, 2019 at 2:15 PM Michal Simek wrote:
>
> On 21. 02. 19 12:03, Michal Simek wrote:
> > On 21. 02. 19 11:24, Paul Kocialkowski wrote:
> >> Hi,
> >>
> >> On Wed, 2019-02-20 at 07:58 +0100, Michal Simek wrote:
> >>> Hi,
> >>>
> >>> On 19. 02. 19 18:25, Andrew Lunn wrot
on RX UBR interrupt. Hence introduce a
CAPS mask; enable this interrupt and workaround only on affected
versions.
Signed-off-by: Harini Katakam
---
v2 changes:
- Added caps mask in correct AT91RM9200 config
- Disabled RXUBR for devices other than AT91RM9200 and Zynq and
kept the interrupt and
Hi Nicolas,
On Fri, Jan 25, 2019 at 3:58 PM wrote:
>
> On 24/01/2019 at 14:38, Harini Katakam wrote:
> > The interrupt handler contains a workaround for RX hang applicable
> > to Zynq and AT91 only. Subsequent versions do not need this
>
> AT91RM9200 only. It's not
to enable this workaround.
Signed-off-by: Harini Katakam
---
Changes from RFC:
- Use CAPS mask instead introducing and errata field.
- Use check only on RX reset part; ISR should still be cleared.
drivers/net/ethernet/cadence/macb.h | 1 +
drivers/net/ethernet/cadence/macb_main.c | 16
Hi Anssi,
On Mon, Dec 3, 2018 at 4:02 PM Anssi Hannula wrote:
>
> Hi,
>
> On 3.12.2018 6:52, Harini Katakam wrote:
> > Hi Anssi,
> > On Fri, Nov 30, 2018 at 11:53 PM Anssi Hannula
> > wrote:
> >> Bit RX_USED set to 0 in the address field allows the contr
Hi Anssi,
On Fri, Nov 30, 2018 at 11:53 PM Anssi Hannula wrote:
>
> Bit RX_USED set to 0 in the address field allows the controller to write
> data to the receive buffer descriptor.
>
> The driver does not ensure the ctrl field is ready (cleared) when the
> controller sees the RX_USED=0 written by
ly corrupting unrelated system memory.
>
> Fix that by adding the necessary DMA memory barrier between the writes.
>
> This corruption was observed on a ZynqMP based system.
>
> Signed-off-by: Anssi Hannula
> Fixes: fff8019a08b6 ("net: macb: Add 64 bit addressing support f
Hi Claudiu,
On Thu, Nov 29, 2018 at 3:51 PM wrote:
>
>
>
> On 23.11.2018 11:59, Harini Katakam wrote:
> > - if (status & MACB_BIT(RXUBR)) {
> > + if ((bp->errata & MACB_ERRATA_RXLOCKUP) &&
> > + (status &
Hi Brandon,
On Thu, Nov 29, 2018 at 2:39 AM Brandon Streiff wrote:
>
> On 11/23/2018 3:59 AM, Harini Katakam wrote:
> > +/* Errata mask bits */
> > +#define MACB_ERRATA_RXLOCKUP 0x0001
> > +
> > /* LSO settings */
> > #define MACB_
Hi Claudiu,
>
> Replace the while loop in MDIO read/write functions with a timeout.
> In addition, add a check for MDIO bus busy before initiating a new
> operation as well to make sure there is no ongoing MDIO operation.
> >>>
> >>> Is this MDIO bus busy check necessary? The
Hi Claudiu,
On Mon, Nov 26, 2018 at 8:16 PM wrote:
>
>
>
> On 26.11.2018 09:07, Harini Katakam wrote:
>
> In the previous version you said you encountered some crashes while
> stressing this part if macb_open()/macb_close() was used in here. Could you
> share the tests s
Hi Andrew,
> > +#define MACB_IDLE_MASK (1 << MACB_IDLE_OFFSET)
>
> I think you could use the MACB_BIT() macro here.
>
> But otherwise,
>
> Reviewed-by: Andrew Lunn
Thanks, will fix this in next series.
Regards,
Harini
Hi Claudiu,
On Mon, Nov 26, 2018 at 8:22 PM Andrew Lunn wrote:
>
> On Mon, Nov 26, 2018 at 02:46:01PM +, claudiu.bez...@microchip.com wrote:
> > Hi Harini,
> >
> > On 26.11.2018 09:07, Harini Katakam wrote:
> > > From: Harini Katakam
> > >
>
This series adds support for macb suspend/resume with system power down.
In relation to the above, this series also updates mdio_read/write
function for PM and adds tsu clock management.
Harini Katakam (4):
net: macb: Check MDIO state before read/write and use timeouts
net: macb: Support
From: Harini Katakam
Replace the while loop in MDIO read/write functions with a timeout.
In addition, add a check for MDIO bus busy before initiating a new
operation as well to make sure there is no ongoing MDIO operation.
Signed-off-by: Shubhrajyoti Datta
Signed-off-by: Sai Pavan Boddu
: Kedareswara rao Appana
Signed-off-by: Harini Katakam
---
v2 changes:
Fixed parameter passed to phy calls.
drivers/net/ethernet/cadence/macb_main.c | 38 ++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b
From: Harini Katakam
Add runtime pm functions and move clock handling there.
Add runtime PM calls to mdio functions to allow for active mdio bus.
Signed-off-by: Shubhrajyoti Datta
Signed-off-by: Harini Katakam
---
v2 changes:
Allow for mdio bus to be active
Changes from RFC:
Updated pm get
From: Harini Katakam
TSU clock needs to be enabled/disabled as per support in devicetree
and it should also be controlled during suspend/resume (WOL has no
dependency on this clock).
Signed-off-by: Harini Katakam
---
v2:
No changes
drivers/net/ethernet/cadence/macb.h | 3 ++-
drivers
to enable this workaround.
Signed-off-by: Harini Katakam
---
Note: Enabled the errata in zynq and at91 configs only.
Please advise if any other versions are affected by this errata.
drivers/net/ethernet/cadence/macb.h | 6 ++
drivers/net/ethernet/cadence/macb_main.c | 9 +++--
2
Hi Andrew,
On Wed, Oct 31, 2018 at 8:24 PM Andrew Lunn wrote:
>
> On Wed, Oct 31, 2018 at 09:10:22AM +0530, Harini Katakam wrote:
> > From: Harini Katakam
> >
> > Add runtime pm functions and move clock handling there.
> > If device is suspended and not a wake dev
Hi,
On Tue, Sep 25, 2018 at 11:00 PM Harini Katakam wrote:
>
> Hi Daniel,
>
> On Tue, Sep 25, 2018 at 9:10 PM Andrew Lunn wrote:
> >
> > > I hope this this thread isn't too old to bring back to life. So it seems
> > > that Harini found that m88
Hi Daniel,
On Tue, Sep 25, 2018 at 9:10 PM Andrew Lunn wrote:
>
> > I hope this this thread isn't too old to bring back to life. So it seems
> > that Harini found that m88e did not need this errata, and Cisco
> > previously found that Harini's patch fixed m88e1112, we included it
> > internal
Hi Claudiu,
> -Original Message-
> From: Claudiu Beznea [mailto:claudiu.bez...@microchip.com]
> Sent: Tuesday, August 7, 2018 2:21 PM
> To: Harini Katakam ; Jennifer Dahm
>
> Cc: netdev@vger.kernel.org; David S . Miller ; Nathan
> Sullivan ; Rafal Ozieblo ;
>
Hi Jennifer,
On Tue, Jun 5, 2018 at 10:21 AM, Harini Katakam wrote:
> Hi Jeniffer,
>
> On Mon, Jun 4, 2018 at 8:35 PM, Nicolas Ferre
> wrote:
>> Jennifer,
>>
>> On 25/05/2018 at 23:44, Jennifer Dahm wrote:
>>>
>>> During testing, I disc
Hi Jeniffer,
On Mon, Jun 4, 2018 at 8:35 PM, Nicolas Ferre
wrote:
> Jennifer,
>
> On 25/05/2018 at 23:44, Jennifer Dahm wrote:
>>
>> During testing, I discovered that the Zynq GEM hardware overwrites all
>> outgoing UDP packet checksums, which is illegal in packet forwarding
>> cases. This happen
Hi Claudiu,
On Fri, May 4, 2018 at 5:47 PM, Claudiu Beznea
wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam
>>
>> This patch enables ARP wake event support in GEM through the following:
>>
>> -> WOL capabili
Hi Claudiu,
On Thu, May 3, 2018 at 3:39 PM, Claudiu Beznea
wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam
>>
>> When macb device is suspended and system is powered down, the clocks
>> are removed and hence mac
Hi Claudiu,
On Thu, May 3, 2018 at 3:39 PM, Claudiu Beznea
wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam
> I would use a "goto" instruction, e.g.:
> value = -ETIMEDOUT;
> g
Hi Claudiu,
On Thu, May 3, 2018 at 3:38 PM, Claudiu Beznea
wrote:
>
>
> On 22.03.2018 15:51, harinikatakamli...@gmail.com wrote:
>> From: Harini Katakam
>>
>> + ulong timeout;
>> +
>> + timeout = jiffies + msecs_to_jiffies(1000);
>> +
Hi David,
On Sat, Jan 27, 2018 at 12:09 PM, wrote:
> From: Harini Katakam
>
> Handle HRESP error by doing a SW reset of RX and TX and
> re-initializing the descriptors, RX and TX queue pointers.
>
> Signed-off-by: Harini Katakam
> Signed-off-by: Michal Simek
>
Hi David,
On Fri, Jan 26, 2018 at 9:25 PM, David Miller wrote:
> From: Harini Katakam
> Date: Fri, 26 Jan 2018 16:12:11 +0530
>
>> From: Harini Katakam
>>
>> Handle HRESP error by doing a SW reset of RX and TX and
>> re-initializing the descriptors, RX and TX
From: Harini Katakam
Handle HRESP error by doing a SW reset of RX and TX and
re-initializing the descriptors, RX and TX queue pointers.
Signed-off-by: Harini Katakam
Signed-off-by: Michal Simek
---
v2:
Rebased on top of latest net-next and reinitialized
all rx queues.
drivers/net/ethernet
From: "Edgar E. Iglesias"
Add RX queue pointer to macb queues to make it accessible for the
multiple queues available. Currently the first RX queue is used.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Harini Katakam
Signed-off-by: Michal Simek
---
drivers/net/ethernet/cade
From: "Edgar E. Iglesias"
Currently, we only use the first receive queue and leave the
remaining DMA descriptor pointers pointing at 0.
Disable unused queues by connecting them to a looped descriptor
chain without free slots.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Hari
From: Harini Katakam
Handle HRESP error by doing a SW reset of RX and TX and
re-initializing the descriptors, RX and TX queue pointers.
Signed-off-by: Harini Katakam
Signed-off-by: Michal Simek
---
drivers/net/ethernet/cadence/macb.h | 2 +
drivers/net/ethernet/cadence/macb_main.c | 65
This series fixes the following:
-> Ties off unused RX queues
-> Handles RX HRESP error
Edgar E. Iglesias (2):
net: macb: Add RBQP to the macb queues
net: macb: Tie-off unused RX queues
Harini Katakam (1):
net: macb: Handle HRESP error
drivers/net/ethernet/cadence/macb.h
Hi,
Please ignore this series.
I'm sending another updated one.
Sorry for the inconvenience.
Regards,
Harini
On Mon, Nov 27, 2017 at 12:33 PM, Harini Katakam
wrote:
> From: "Edgar E. Iglesias"
>
> Add RX queue pointer to macb queues to make it accessible for the
>
From: "Edgar E. Iglesias"
Currently, we only use the first receive queue and leave the
remaining DMA descriptor pointers pointing at 0.
Disable unused queues by connecting them to a looped descriptor
chain without free slots.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Hari
From: "Edgar E. Iglesias"
Add RX queue pointer to macb queues to make it accessible for the
multiple queues available. Currently the first RX queue is used.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Harini Katakam
Signed-off-by: Michal Simek
---
drivers/net/ethernet/cade
me still
> use fixed-link and have MDIO (to configure a switch), but not require
> a PHY.
>
> There was a patch set last year by Harini Katakam ("net: macb: Add MDIO
> driver for accessing multiple PHY devices") that might ultimately be a
> better approach to tackling thi
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Tuesday, May 23, 2017 4:59 AM
> To: David Miller
> Cc: Daniel Walker ; Harini Katakam
> ; Florian Fainelli ; netdev
> ; Andrew Lunn
> Subject: [PATCH v2 netdev] net: phy: marvell: Limit er
Hi Daniel,
> -Original Message-
> From: Daniel Walker [mailto:danie...@cisco.com]
> Sent: Tuesday, April 18, 2017 8:26 PM
> To: Harini Katakam ; Andrew Lunn
> Cc: Florian Fainelli ; Andy Fleming
> ; netdev@vger.kernel.org; HEMANT RAMDASI
> ; Julius Hemanth Pitti -X
Hi Daniel,
> -Original Message-
> From: Daniel Walker [mailto:danie...@cisco.com]
> Sent: Tuesday, April 18, 2017 8:05 PM
> To: Harini Katakam ; Andrew Lunn
> Cc: Florian Fainelli ; Andy Fleming
> ; netdev@vger.kernel.org; HEMANT RAMDASI
> ; Julius Hemanth Pitti -X
Hi Daniel,
> -Original Message-
> From: Daniel Walker [mailto:danie...@cisco.com]
> Sent: Tuesday, April 18, 2017 7:48 PM
> To: Andrew Lunn
> Cc: Florian Fainelli ; Andy Fleming
> ; Harini Katakam ;
> netdev@vger.kernel.org; HEMANT RAMDASI ; Julius
> Hemanth
Hi Rafal,
On Thu, Jan 26, 2017 at 8:45 PM, Rafal Ozieblo wrote:
>> -Original Message-
>> From: Andrei Pistirica [mailto:andrei.pistir...@microchip.com]
>> Sent: 19 stycznia 2017 16:56
>> Subject: [PATCH net-next v2] macb: Common code to enable ptp support for
>> MACB/GEM
>>
>>
>> +static
>>> - capability flags to enable PTP per platform basis
>>>
>>> Signed-off-by: Andrei Pistirica
>>
>> Acked-by: Nicolas Ferre
Reviewed-by: Harini Katakam
>
> Harini or Rafal, do you plan to review this patch and add your
> "Reviewed-by"
On Wed, Jan 18, 2017 at 11:02 PM, Nicolas Ferre wrote:
> Le 18/01/2017 à 09:57, Andrei Pistirica a écrit :
>> This patch does the following:
>> - add GEM-PTP interface
>> - registers and bitfields for TSU are named according to SAMA5Dx data sheet
>> - PTP support based on platform capability
>
> T
Hi Richard,
On Tue, Jan 3, 2017 at 3:59 PM, Richard Cochran
wrote:
> On Tue, Jan 03, 2017 at 10:36:11AM +0530, Harini Katakam wrote:
>> I understand that it is not accurate - it is an initial version.
>
> Why do you say, "it is an initial version?"
>
> The Atmel de
Hi Richard,
On Mon, Jan 2, 2017 at 9:43 PM, Richard Cochran
wrote:
> On Mon, Jan 02, 2017 at 03:47:07PM +0100, Nicolas Ferre wrote:
>> Le 02/01/2017 à 12:31, Richard Cochran a écrit :
>> > This Cadence IP core is a complete disaster.
>>
>> Well, it evolved and propose several options to different
Hi Richard,
On Mon, Jan 2, 2017 at 5:01 PM, Richard Cochran
wrote:
> On Mon, Jan 02, 2017 at 09:36:10AM +, Rafal Ozieblo wrote:
>> According Cadence Hardware team:
>> "It is just that some customers prefer to have the time in the descriptors
>> as that is provided per frame.
>> The registers
Hi Andrei,
On Mon, Dec 12, 2016 at 3:52 PM, wrote:
>
>
>> -Original Message-
>> From: Rafal Ozieblo [mailto:raf...@cadence.com]
>> Sent: Friday, December 09, 2016 11:20 AM
>> To: Andrei Pistirica - M16132; richardcoch...@gmail.com
>> Cc: netdev@vger.kernel.org; linux-ker...@vger.kernel.o
Hi,
On Thu, Dec 8, 2016 at 8:11 PM, wrote:
>
>
>> -Original Message-
>> From: Richard Cochran [mailto:richardcoch...@gmail.com]
>> Sent: Wednesday, December 07, 2016 11:04 PM
>> To: Andrei Pistirica - M16132
>> Cc: netdev@vger.kernel.org; linux-ker...@vger.kernel.org; linux-arm-
>> ker..
Hi Florian,
On Sun, Dec 4, 2016 at 4:10 AM, Florian Fainelli wrote:
> Le 12/03/16 à 13:35, Rob Herring a écrit :
>> On Mon, Nov 28, 2016 at 03:19:27PM +0530, Harini Katakam wrote:
>>> +- reg: Address and length of the register set of MAC to be used
>>> +- clock-names
Hi Rob,
Thanks for the review.
On Sun, Dec 4, 2016 at 3:05 AM, Rob Herring wrote:
> On Mon, Nov 28, 2016 at 03:19:27PM +0530, Harini Katakam wrote:
>> +Required properties:
>> +- compatible: Should be "cdns,macb-mdio"
>
> Only one version ever? This needs m
Hi David,
On Wed, Nov 30, 2016 at 5:35 AM, David Miller wrote:
> From: Harini Katakam
> Date: Mon, 28 Nov 2016 14:53:49 +0530
>
>> In macb_reset_hw, use read-modify-write to disable RX and TX.
>> This way exiting settings and reserved bits wont be disturbed.
>> Use t
well.
Signed-off-by: Harini Katakam
---
v2:
Make ctrl type as u32
Improve commit description
---
drivers/net/ethernet/cadence/macb.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index 0e489bb
Hi Andrew,
On Mon, Nov 28, 2016 at 10:03 PM, Andrew Lunn wrote:
> On Mon, Nov 28, 2016 at 03:19:14PM +0530, Harini Katakam wrote:
>> This patch is to add support for the hardware with multiple ethernet
>> MAC controllers and a single MDIO bus connected to multiple PHY devices.
&g
In macb_reset_hw, use read-modify-write to disable RX and TX.
This way exiting settings and reserved bits wont be disturbed.
Use the same method for clearing statistics as well.
Signed-off-by: Harini Katakam
---
drivers/net/ethernet/cadence/macb.c | 9 ++---
1 file changed, 6 insertions
MAC controller.
This handling along with PHY functionality is moved to macb_mdio.c
within the macb driver space.
This is because of the phy maintenance register is within the MAC.
Please advise on how to proceed with handling such a requirement.
Harini Katakam (2):
net: macb: Add MDIO driver for
Add documentations for macb mdio driver.
Signed-off-by: Harini Katakam
---
.../devicetree/bindings/net/macb-mdio.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/macb-mdio.txt
diff --git a/Documentation
controller. This handling along with PHY functionality is
moved to macb_mdio.c
Signed-off-by: Punnaiah Choudary Kalluri
Signed-off-by: Harini Katakam
---
drivers/net/ethernet/cadence/Makefile| 2 +-
drivers/net/ethernet/cadence/macb.c | 169 +++-
drivers/net/ethernet
Hi Nicolas,
On Mon, Nov 28, 2016 at 3:01 PM, Nicolas Ferre wrote:
> Le 28/11/2016 à 10:23, Harini Katakam a écrit :
>> In macb_reset_hw, use read-modify-write to disable RX and TX.
>> This way exiting settings and reserved bits wont be disturbed.
>
> Yes, indeed... but I wo
Hi Rafal
I'm still comparing the full solution but just a couple of things first:
> @@ -876,6 +964,17 @@ static int gem_rx(struct macb *bp, int budget)
> bp->stats.rx_packets++;
> bp->stats.rx_bytes += skb->len;
>
> +#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
> +
tHi Andrei,
>> Yes, Andre's version of Cadence does not ability to report have RX
>> timestamp.
>> The version I worked with did. This is the old series I sent:
>> https://lkml.org/lkml/2015/9/11/92
>> But right now, i'm working on building on top of Andre's changes.
>
>
> I'm addressing maintaine
Hi Rafal,
On Fri, Nov 18, 2016 at 2:29 PM, Rafal Ozieblo wrote:
> Hello,
>
>> From: Harini Katakam [mailto:harinikatakamli...@gmail.com]
>> Sent: 18 listopada 2016 05:30
>> To: Rafal Ozieblo
>> Cc: Nicolas Ferre; harini.kata...@xilinx.com; netdev@vger.kernel.org;
&
Hi Rafal,
> I can’t see a place where you enable extended descriptor for PTP. Did you add
> support for extended PTP descriptor?
Sorry, that was separate patch in the series:
http://lkml.iu.edu/hypermail/linux/kernel/1509.1/02239.html
> "DMA Configuration Register" 0x010:
> 29 tx_bd_extend
Hi Rafal,
On Fri, Nov 18, 2016 at 3:00 PM, Rafal Ozieblo wrote:
>>-Original Message-
>>From: Nicolas Ferre [mailto:nicolas.fe...@atmel.com]
>>Sent: 18 listopada 2016 10:10
>>To: Rafal Ozieblo; Harini Katakam; Andrei Pistirica
>>Cc: harini.kata...@xili
Hi Rafal,
On Thu, Nov 17, 2016 at 7:05 PM, Rafal Ozieblo wrote:
> -Original Message-
> From: Nicolas Ferre [mailto:nicolas.fe...@atmel.com]
> Sent: 17 listopada 2016 14:29
> To: Harini Katakam; Rafal Ozieblo
> Cc: harini.kata...@xilinx.com; netdev@vger.kernel.or
Hi Rafal,
On Thu, Nov 17, 2016 at 5:20 PM, Rafal Ozieblo wrote:
> Hello,
> I think, there could a bug in your patch.
>
>> +
>> +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
>> + dmacfg |= GEM_BIT(ADDR64);
>> +#endif
>
> You enable 64 bit addressing (64b dma bus width) always when appropriate
Hi,
On Tue, Sep 6, 2016 at 9:18 PM, Richard Cochran
wrote:
>
>> +#define GEM_TISUBN 0x01bc /* 1588 Timer Increment Sub-ns */
>
> This regsiter does not exist. Looking at
>
>Zynq-7000 AP SoC Technical Reference Manual
>UG585 (v1.10) February 23, 2015
>
> starting on page 1273 w
Hi Andrei,
+Richard Cochran
On Fri, Sep 2, 2016 at 6:23 PM, Andrei Pistirica
wrote:
> Hardware time stamp on the PTP Ethernet packets are received using the
> SO_TIMESTAMPING API. Timers are obtained from the PTP event/peer
> gem registers.
>
> Signed-off-by: Andrei Pistirica
> ---
> Integratio
Hi Andrei,
Adding Richard Cochran for PTP.
On Fri, Sep 2, 2016 at 6:23 PM, Andrei Pistirica
wrote:
> From: Harini Katakam
>
> Cadence GEM provides a 102 bit time counter with 48 bits for seconds,
> 30 bits for nsecs and 24 bits for sub-nsecs to control 1588 timestamping.
>
&g
Hi Andrei,
On Wed, Aug 10, 2016 at 3:42 PM, Andrei Pistirica
wrote:
> Hi Punnaiah,
>
> cpts_match(...) has a way to parse frames, while ptp_classify_raw identifies
> the underlying protocol (in case the frames are parsed on data path), or
> tx/rxtstamp callbacks can be used with PTP events. But,
t; From: Nicolas Ferre [mailto:nicolas.fe...@atmel.com]
>> Sent: Tuesday, August 09, 2016 10:10 PM
>> To: Harini Katakam ; Harini Katakam
>> ; Andrei Pistirica
>> Cc: da...@davemloft.net; Boris Brezillon > electrons.com>; alexandre.bell...@free-electrons.com;
>
H for MSB of BD pointers.
-> Change extraction and updation of buffer addresses to use
64 bit address.
-> In gem_rx extract address in one place insted of two and use a
separate flag for RXUSED.
Signed-off-by: Harini Katakam
---
drivers/net/ethernet/c
USRIO and JUMBO CAPS have the same mask.
Fix the same.
Fixes: ce721a702197 ("net: ethernet: cadence-macb: Add disabled usrio caps")
Cc: sta...@vger.kernel.org # v4.5+
Signed-off-by: Harini Katakam
Acked-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.h | 2 +-
1 file
On Thu, Aug 4, 2016 at 7:37 PM, Nicolas Ferre wrote:
> Le 01/08/2016 à 09:20, Harini Katakam a écrit :
>> USRIO and JUMBO CAPS have the same mask.
>> Fix the same.
>>
>> Signed-off-by: Harini Katakam
>
> Hi,
> Indeed there's a bug...
>
>
>
H for MSB of BD pointers.
-> Change extraction and updation of buffer addresses to use
64 bit address.
-> In gem_rx extract address in one place insted of two and use a
separate flag for RXUSED.
Signed-off-by: Harini Katakam
---
drivers/net/ethernet/c
USRIO and JUMBO CAPS have the same mask.
Fix the same.
Signed-off-by: Harini Katakam
---
drivers/net/ethernet/cadence/macb.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/cadence/macb.h
b/drivers/net/ethernet/cadence/macb.h
index 36893d8..b6fcf10
Handle HRESP error by doing a SW reset of RX and TX and
re-initializing the descriptors, RX and TX queue pointers.
Signed-off-by: Harini Katakam
---
drivers/net/ethernet/cadence/macb.c | 48 ---
drivers/net/ethernet/cadence/macb.h |2 ++
2 files changed, 46
.
Signed-off-by: Harini Katakam
---
drivers/net/phy/marvell.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 280e879..783d0ca 100644
--- a/drivers/net/phy/marvell.c
+++ b
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