[Mesa-dev] [PATCH 01/23] i965: Let caller of intel_miptree_create_layout() decide msaa layout

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 15 +++ 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 108dd87..0edd59f 100644

[Mesa-dev] [PATCH 11/23] i965/gen8: Remove dead assertion

hes will introduce proper support for the lossless compression and dropping this here makes the patches a little simpler. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/src/mesa/drivers/dri/i

[Mesa-dev] [PATCH 02/23] i965: Use miptree non-aligned dimensions directly for x-tiled

The logic in intel_miptree_create() uses the local copies for 64-byte aligned equivalent but only for stencil buffers which in turn are never x-tiled. This makes the logic a little more explicit and helps to keep subsequent patches easier to read. Signed-off-by: Topi Pohjolainen --- src/mesa

[Mesa-dev] [PATCH 22/23] i965: Add helper for checking for lossless compressible

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 21 + src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 +++ 2 files changed, 24 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 21/23] i965/gen9: Setup MCS for compressed texture surfaces

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index b140ff4..eaf5874 100644 --- a/src

[Mesa-dev] [PATCH 23/23] i965/gen9: Enable lossless compression

e run so the hit comes from something else. Perhaps the content is such that it doesn't really compress but the additional work required of the hardware to maintain the associated meta data slows us down. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_st

[Mesa-dev] [PATCH 10/23] i965: Use constant pointer when checking for compression

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 2 +- src/mesa/drivers/dri/i965/brw_surface_formats.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h

[Mesa-dev] [v2] Compression support for single-sampled

instead of introducing explicit type for lossless compression. Topi Pohjolainen (19): i965: Isolate aligned dimensions for stencil only i965: Separate miptree creation from auxiliary buffer setup i965: Don't try to create aux buffer for non-msrt aux-buffer i965: Stop considering

[Mesa-dev] [v2 16/19] i965: Expose logic telling if non-msrt mcs is supported

Alos use the opportunity to mark inputs constant. (Context has to be given as read-write to intel_miptree_supports_non_msrt_fast_clear() to support debug output). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 + src/mesa/drivers/dri/i965

[Mesa-dev] [v2 04/19] i965: Stop considering if msrt aux buffers need aux buffer

)possibility. v2 (Ben): Do not signal msaa layout with explicit argument but using layout_flags instead. Signed-off-by: Topi Pohjolainen Reviewed-by: Ben Widawsky --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions

[Mesa-dev] [v2 14/19] i965/gen9: Prepare surface state setup for lossless compression

v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression (intel_miptree_is_lossless_compressed()). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_defines.h| 1 + src/mesa/drivers

[Mesa-dev] [v2 13/19] i965: Set buffer cleared after actually clearing it

: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c index e92ae6c..6af6985 100644 --- a/src/mesa/drivers/dri

[Mesa-dev] [v2 01/19] i965: Isolate aligned dimensions for stencil only

This makes the logic a little more explicit and helps to keep subsequent patches easier to read. Suggested-by: Ben Widawsky Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 29 +-- 1 file changed, 14 insertions(+), 15 deletions

[Mesa-dev] [v2 09/19] i965: Resolve color buffer also in lossless compression case

v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression (intel_miptree_is_lossless_compressed()). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +++- 1 file changed

[Mesa-dev] [v2 05/19] i965: Add helper for detecting lossless compression

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 26 ++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4 2 files changed, 30 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 11/19] i965: Add a flag telling color resolve pass to ignore CCS_E

v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression (intel_miptree_is_lossless_compressed()). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.c | 12 +++- src

[Mesa-dev] [v2 07/19] i965: Add resolve option for lossless compression

v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression (intel_miptree_is_lossless_compressed()). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_defines.h | 1 + src/mesa/drivers

[Mesa-dev] [v2 03/19] i965: Don't try to create aux buffer for non-msrt aux-buffer

instead. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index e8b3116

[Mesa-dev] [v2 15/19] i965/gen9: Refactor msrt mcs initialization

This will be re-used to initialize auxiliary buffers in lossless compression case. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 36 --- 1 file changed, 22 insertions(+), 14 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 10/19] i965: Add means for limiting color resolves

ve is needed. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 2 +- src/mesa/drivers/dri/i965/brw_context.c| 8 src/mesa/drivers/dri/i965/intel_blit.c | 4 ++-- src/mesa/drivers/dri/i965/intel_copy_image.c | 4 ++-- src/mesa/drivers/dri

[Mesa-dev] [v2 19/19] i965/gen9: Enable lossless compression

e run so the hit comes from something else. Perhaps the content is such that it doesn't really compress but the additional work required of the hardware to maintain the associated meta data slows us down. v2 (Ben): Re-use msaa layout type for single sampled case. Signed-off-by: Topi Pohjolainen

[Mesa-dev] [v2 06/19] i965: Allow fast clear to be used with lossless compression

v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

[Mesa-dev] [v2 17/19] i965/gen9: Setup MCS for compressed texture surfaces

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index e1a37d8..d1c9b5a 100644 --- a/src

[Mesa-dev] [v2 12/19] i965: Add a few assertions on lossless compression

v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression (intel_miptree_is_lossless_compressed()). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 5 + src/mesa/drivers

[Mesa-dev] [v2 08/19] i965: Refactor resolving of auxiliary mode

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 62 -- 1 file changed, 29 insertions(+), 33 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index fc8f701

[Mesa-dev] [v2 18/19] i965: Add helper for lossless compression support

v2: Use explicitly against base type of GL_FLOAT instead of using _mesa_is_format_integer_color(). Otherwise we miss GL_UNSIGNED_NORMALIZED. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 22 ++ src/mesa/drivers/dri/i965

[Mesa-dev] [v2 02/19] i965: Separate miptree creation from auxiliary buffer setup

neral allocation and setup steps. v2 (Ben): - Do not reconsider for X-tiling in intel_miptree_create() as it was just forced to Y-tiling in miptree_create(). - Do not drop checks for allocation failures. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 14/40] i965/blorp: Add support for source swizzle

In order to support cases where gen9 uses RGBA format to back client requested RGB, one needs to have means to force alpha channel to one when user requested RGB surface is used as blit source. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++- src/mesa

[Mesa-dev] [PATCH 11/40] i965/blorp: Prepare sampling for gen9

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index 444ba26..35ab9af 100644 --- a

[Mesa-dev] [PATCH 10/40] i965/blorp: Prepare render target write for gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 2 +- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 3 ++- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 2 +- src/mesa/drivers/dri/i965/brw_fs.h | 2 +- src/mesa/drivers/dri/i965

[Mesa-dev] i965: Support for gen8/9 blorp

us to move back to meta if needs be. Big thanks to Ken for helping in debugging!! Topi Pohjolainen (40): i965/gen9: Use correct size for DS_STATE i965/gen8: Document inst buffer size modify enabling bit i965/gen8: Expose surface state helpers i965/gen8: Expose state base address setup

[Mesa-dev] [PATCH 04/40] i965/gen8: Expose state base address setup

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 3 +++ src/mesa/drivers/dri/i965/gen8_misc_state.c | 3 +-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index

[Mesa-dev] [PATCH 02/40] i965/gen8: Document inst buffer size modify enabling bit

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_misc_state.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/gen8_misc_state.c b/src/mesa/drivers/dri/i965/gen8_misc_state.c index a46b252..c0014e5 100644 --- a/src/mesa/drivers

[Mesa-dev] [PATCH 09/40] i965/blorp/gen6: Prepare vertex buffer setup logic for gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 ++ 1 file changed, 22 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index f3ce42c..d635962 100644

[Mesa-dev] [PATCH 03/40] i965/gen8: Expose surface state helpers

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 15 src/mesa/drivers/dri/i965/gen8_surface_state.c | 51 +- 2 files changed, 41 insertions(+), 25 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa

[Mesa-dev] [PATCH 06/40] i965/blorp/gen7: Prepare re-using for gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index eae1e30..4debeb3 100644 --- a/src/mesa/drivers/dri

[Mesa-dev] [PATCH 05/40] i965/blorp: Let compiler calculate the vertex buffer size

Currently the size is sizeof(float) times too large. One reserves GEN6_BLORP_VBO_SIZE many floats whereas GEN6_BLORP_VBO_SIZE stands for the size of vertex buffer in bytes. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 31 ++- 1 file

[Mesa-dev] [PATCH 07/40] i965/blorp: Use 8k chunk size for urb allocation

Otherwise switch from blorp to compute failes. Note that this now follows the normal i965 upload logic found in gen7_upload_urb(). Effectively vs_size changes from 2 to 1 and vs_start from 2 to 4. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 19

[Mesa-dev] [PATCH 40/40] i965/blorp: Enable for buffer resolves

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94181 Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 39/40] i965/blorp: Enable for normal color clears

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_clear.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index 841ba5d..d57b677 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b

[Mesa-dev] [PATCH 24/40] i965/meta: Expose fast clear rectangle calculation

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 44 ++--- src/mesa/drivers/dri/i965/brw_meta_util.h | 8 + 2 files changed, 33 insertions(+), 19 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src

[Mesa-dev] [PATCH 08/40] i965/blorp/gen7: Expose state setup applicable to gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 39 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 22 +- 2 files changed, 50 insertions(+), 11 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa

[Mesa-dev] [PATCH 36/40] i965/blorp: Reconfigure base state address only if needed

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 5 + src/mesa/drivers/dri/i965/gen8_blorp.cpp | 4 +++- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b

[Mesa-dev] [PATCH 27/40] i965/meta: Expose fast clear value setup

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 10 +- src/mesa/drivers/dri/i965/brw_meta_util.h | 5 + 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri

[Mesa-dev] [PATCH 20/40] i965/blorp: Add support for disabling color blending

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 4 src/mesa/drivers/dri/i965/brw_blorp.h| 1 + src/mesa/drivers/dri/i965/gen6_blorp.cpp | 5 + src/mesa/drivers/dri/i965/gen8_blorp.cpp | 9 + 4 files changed, 19 insertions(+) diff --git a/src

[Mesa-dev] [PATCH 19/40] i965/blorp: Add support for setting fast clear operation

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 1 + src/mesa/drivers/dri/i965/brw_blorp.h| 1 + src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 ++ src/mesa/drivers/dri/i965/gen8_blorp.cpp | 1 + 4 files changed, 5 insertions(+) diff --git a/src/mesa/drivers/dri

[Mesa-dev] [PATCH 28/40] i965/meta: Expose check for fast clear compatibility

Also add the additional render format check to the same utility. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 40 - src/mesa/drivers/dri/i965/brw_meta_util.h | 5 2 files changed, 25 insertions(+), 20 deletions

[Mesa-dev] [PATCH 31/40] i965/blorp: Skip uploading state/options not needed for clears

In case there is no source it means the program does a simple clear or a resolve. In such case there is no need to program sampling state or enable pixel kill in fragment shader. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 13 + src/mesa/drivers

[Mesa-dev] [PATCH 17/40] i965/blorp: Prepare stencil sampling for gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index

[Mesa-dev] [PATCH 26/40] i965/meta: Expose non-fast clear rectangle calculation

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 26 +++-- src/mesa/drivers/dri/i965/brw_meta_util.h | 5 + 2 files changed, 21 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src

[Mesa-dev] [PATCH 21/40] i965/blorp: Reduce scope for generator and its inputs

Generator is only needed for getting the assembly. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 23 ++- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 22 -- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 6

[Mesa-dev] [PATCH 13/40] i965/blorp: Pipeline upload support for gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_blorp.h | 3 + src/mesa/drivers/dri/i965/gen8_blorp.cpp | 694 + 3 files changed, 698 insertions(+) create mode 100644 src/mesa/drivers/dri

[Mesa-dev] [PATCH 01/40] i965/gen9: Use correct size for DS_STATE

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_ds_state.c | 22 ++ 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_ds_state.c b/src/mesa/drivers/dri/i965/gen8_ds_state.c index d91eb77..976e3cc 100644 --- a/src

[Mesa-dev] [PATCH 25/40] i965/meta: Expose resolve clear rectangle calculation

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 16 +--- src/mesa/drivers/dri/i965/brw_meta_util.h | 6 ++ 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa

[Mesa-dev] [PATCH 16/40] i965/blorp: Add check for supported sample numbers

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 10 ++ src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 +++-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri

[Mesa-dev] [PATCH 18/40] i965/blorp: Enable blits on gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 6 +- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 8 +--- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 +-- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri

[Mesa-dev] [PATCH 38/40] i965/blorp: Use more fine grained state trashing than new context

clearing with blorp will regress performance in some synthetic test cases on BDW. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 22/40] i965/blorp: Switch the order of render and texture targets

On gen8 color resolving won't work anymore if the target isn't the first entry in the binding table. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h | 2 +- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 4 2 files changed, 5 insertions(+),

[Mesa-dev] [PATCH 30/40] i965/blorp: Re-introduce clear programs

This partially reverts 2f28a0dc23165123cf1e8b5942acad37878edd8a Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources| 1 + src/mesa/drivers/dri/i965/brw_blorp.h | 8 + src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 +- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 33/40] i965/blorp: Prepare to switch from compute pipeline

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 618949c..5f0083c 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b

[Mesa-dev] [PATCH 35/40] i965/blorp: Do not tricker urb re-configuration unnecessarily

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 4 +++- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 5f0083c

[Mesa-dev] [PATCH 34/40] i965/blorp: Skip re-emitting urb config whenever possible

Otherwise clearing with blorp will regress performance in some synthetic test cases. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri

[Mesa-dev] [PATCH 37/40] i965/blorp: Leave new batch signaling to batch buffer logic

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 1d3b3e2..04a2a74 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 12/40] i965: Allow texture surface state setup to be used by blorp

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 ++- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 7 +-- src/mesa/drivers/dri/i965/gen8_surface_state.c| 7 --- 4 files changed

[Mesa-dev] [PATCH 32/40] i965/blorp/gen7: Prepare blorp being the very first renderer

figure but this is the right thing to do. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index ef96ec5..b85a6a5 100644 --- a/src/me

[Mesa-dev] [PATCH 23/40] i965: Declare input to mcs alignment calculation constant

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 29/40] i965/meta: Move check for srgb into is_color_fast_clear_compatible()

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 34 + src/mesa/drivers/dri/i965/brw_meta_util.h | 2 +- 2 files changed, 19 insertions(+), 17 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src

[Mesa-dev] [PATCH 15/40] i965/blorp: Add support for sampling 3D textures

. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 8 +++- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 18 ++ src/mesa/drivers/dri/i965/gen8_blorp.cpp | 3 ++- 3 files changed, 23 insertions(+), 6 deletions(-) diff --git a/src/mesa

[Mesa-dev] [v4 02/11] i965: Relax assertion of halign == 16 for lossless compressed aux

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index ae08300..b68575f 100644 --- a/src/mesa

[Mesa-dev] [v4 01/11] i965/blorp: Set full resolve for lossless compressed

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp index 41ff2a5..b1da935 100644 --- a/src/mesa

[Mesa-dev] [v4] i965: Compression support for single-sampled

it is unnecessary. Topi Pohjolainen (11): i965/blorp: Set full resolve for lossless compressed i965: Relax assertion of halign == 16 for lossless compressed aux i965/gen9: Prepare surface state setup for lossless compression i965: Add helper for lossless compression support i965

[Mesa-dev] [v4 11/11] i965/gen9: Enable lossless compression

) and brw_blorp_blit_miptrees() instead. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 23 ++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [v4 06/11] i965/blorp: Prepare blits for lossless compression

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 2 +- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 26 +- 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri

[Mesa-dev] [v4 07/11] i965/blorp: Do not resolve lossless compressed blit sources

Blorp blits use sampling engine which is capable of resolving on the fly. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri

[Mesa-dev] [v4 10/11] i965/wm: Don't sample lossless compressed as multisampled

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index dbc626c..ced9708 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b

[Mesa-dev] [v4 04/11] i965: Add helper for lossless compression support

v2: Check explicitly against base type of GL_FLOAT instead of using _mesa_is_format_integer_color(). Otherwise we miss GL_UNSIGNED_NORMALIZED. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 22 ++ src/mesa/drivers/dri/i965

[Mesa-dev] [v4 09/11] i965: Set render state for lossless compressed

v2: Add support for blorp and removed the support for meta Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 3 +++ src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 6 ++ src/mesa/drivers/dri/i965/brw_draw.c | 7 ++- 3 files changed, 15

[Mesa-dev] [v4 08/11] i965/gen9: Setup MCS for compressed texture surfaces

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index e3593d3..18e7c75 100644 --- a/src

[Mesa-dev] [v4 03/11] i965/gen9: Prepare surface state setup for lossless compression

brw_postdraw_set_buffers_need_resolve() using a separate patch. v4: Support for blorp Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_defines.h| 1 + src/mesa/drivers/dri/i965/gen8_blorp.cpp | 5 - src/mesa/drivers/dri/i965/gen8_surface_state.c | 3 +++ 3 files changed, 8

[Mesa-dev] [v4 05/11] i965: Deferred allocation of mcs for lossless compressed

. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 2 ++ src/mesa/drivers/dri/i965/brw_draw.c | 17 + src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 27 +++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4

[Mesa-dev] [PATCH 1/2] i965/blorp: Add support for encoding/decoding interleaved 2x msaa

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 44 +++- 1 file changed, 36 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index be16941..40b9135

[Mesa-dev] [PATCH 2/2] i965/blorp: Add support for 2x msaa

Suggested-by: Kenneth Graunke Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 14 +++--- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 5 ++--- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 1/2] mesa/formats: Take luminance into account in component count

Signed-off-by: Topi Pohjolainen --- src/mesa/main/glformats.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/main/glformats.c b/src/mesa/main/glformats.c index 96ab393..9274dc0 100644 --- a/src/mesa/main/glformats.c +++ b/src/mesa/main/glformats.c @@ -1569,6 +1569,7 @@ GLint

[Mesa-dev] [PATCH 2/2] i965/blorp: Fix clear code for ignoring colormask for XRGB formats on Gen9+

This is equivalent of 73b01e2711ff45a1f313d5372d6c8fa4fe55d4d2 for blorp. CC: Iago Toral Quiroga CC: Kenneth Graunke Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 36 +-- 1 file changed, 29 insertions(+), 7 deletions(-) diff --git

[Mesa-dev] [v2 1/7] i965: Remove pointers to non-existing atoms

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 8 1 file changed, 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 9f15326..e89b388 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src

[Mesa-dev] [v2 2/7] i965/blorp/gen6: Use normal base state address setup

tting it. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 4 --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 51 ++-- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 4 ++- 3 files changed, 5 insertions(+), 54 deletions(-) diff --git a/src

[Mesa-dev] [v2] i965/blorp: State emission optimizations

-emissions. Kenneth Graunke (1): i965: Make all atoms to track BRW_NEW_BLORP by default Topi Pohjolainen (6): i965: Remove pointers to non-existing atoms i965/blorp/gen6: Use normal base state address setup i965: Introduce state flag for blorp i965/blorp: Use BRW_NEW_BLORP instead of trashing

[Mesa-dev] [v2 3/7] i965: Introduce state flag for blorp

CC: Kenneth Graunke Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 2 ++ src/mesa/drivers/dri/i965/brw_state_upload.c | 1 + 2 files changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h

[Mesa-dev] [v2 5/7] i965/blorp: Use BRW_NEW_BLORP instead of trashing all state bits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 4 +--- src/mesa/drivers/dri/i965/gen7_urb.c| 3 +-- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index ce09b09

[Mesa-dev] [v2 6/7] i965/blorp: Reconfigure base state address only if needed

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3 ++- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 3 ++- src/mesa/drivers/dri/i965/gen8_blorp.cpp | 4 +++- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b

[Mesa-dev] [v2 7/7] i965/blorp: Do not tricker re-emission of base state address

In case blorp needs to configure it will be just as if render or compute pipeline had configured it. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 1 - src/mesa/drivers/dri/i965/gen8_misc_state.c | 1 - 2 files changed, 2 deletions(-) diff --git a/src/mesa

[Mesa-dev] [v2 4/7] i965: Make all atoms to track BRW_NEW_BLORP by default

From: Kenneth Graunke From: Kenneth Graunke Signed-off-by: Topi Pohjolainen https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [04.5/11] i965: Add flag telling if miptree is for client consumption

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 --- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 9 + 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [v5 05/11] i965: Deferred allocation of mcs for lossless compressed

. v2: Do not enable for scanout buffers Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 2 ++ src/mesa/drivers/dri/i965/brw_draw.c | 17 ++ src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 34 +++ src/mesa/drivers

[Mesa-dev] [v5 11/11] i965/gen9: Enable lossless compression

) and brw_blorp_blit_miptrees() instead. v4: (Ken): Drop MIPTREE_LAYOUT_ACCELERATED_UPLOAD when allocating mcs. Do not enable for scanout buffers Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 43 +-- 1 file changed, 40 insertions(+), 3 dele

[Mesa-dev] [PATCH] i965/ps: Use SET_FIELD() for sampler count

The value is actually clamped to 0-16 as sample state pointer can be used to support more than 16 samplers. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_defines.h | 1 + src/mesa/drivers/dri/i965/gen7_wm_state.c | 5 +++-- src/mesa/drivers/dri/i965/gen8_ps_state.c | 5

[Mesa-dev] i965: Revision of texture surface setup refactoring

, what do you think? I'm not too happy with reverting your work but overall this way it becomes cleaner, I think. CC: Francisco Jerez Francisco Jerez (1): i965: Implement surface state set-up for shader images. Topi Pohjolainen (11): Revert "i965/gen8: Factor out texture surface st

[Mesa-dev] [v2 01/12] Revert "i965/gen8: Factor out texture surface state set-up from gen8_update_texture_surface()."

This reverts commit e17dc004fd96e589e92ee64deeb45339af4bf671. --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 137 +++-- 1 file changed, 60 insertions(+), 77 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface

[Mesa-dev] [v2 02/12] Revert "i965/gen7: Factor out texture surface state set-up from gen7_update_texture_surface()."

This reverts commit 6f26ffaf66affb6563e548646fb6d6a049fe6bff. --- src/mesa/drivers/dri/i965/brw_context.h | 11 -- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 127 +- 2 files changed, 54 insertions(+), 84 deletions(-) diff --git a/src/mesa/drivers/dri/i965/b

[Mesa-dev] [v2 09/12] i965: Pass texture target as parameter for surface setup

Also changed a couple of direct shifts into SET_FIELD(). Reviewed-by: Matt Turner Reviewed-by: Kenneth Graunke Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 2 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 ++-- src/mesa/drivers

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