[Mesa-dev] [PATCH 01/10] intel: common: add flag to identify platforms by name

The perf infrastructure needs to identify specific platforms, not just generations. Signed-off-by: Lionel Landwerlin --- src/intel/common/gen_device_info.c | 23 +-- src/intel/common/gen_device_info.h | 3 +++ 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a

[Mesa-dev] [PATCH 02/10] i965: Add Gen8+ sys_vars for generated OA code

From: Robert Bragg In preparation for adding XML OA metric set descriptions for Gen 8 and 9 which will result in auto generated code that depends on a number of new system variables ($EuSubslicesTotalCount, $EuThreadsCount and $SliceMask) this adds corresponding members to brw->perf.sys_vars. Si

[Mesa-dev] [PATCH 05/10] i965: Add Gen8+ INTEL_performance_query support

From: Robert Bragg Enables access to OA unit metrics on Gen8+ via INTEL_performance_query. Signed-off-by: Robert Bragg --- src/mesa/drivers/dri/i965/Makefile.am | 8 +- src/mesa/drivers/dri/i965/brw_defines.h | 6 + src/mesa/drivers/dri/i965/brw_performance_query.c |

[Mesa-dev] [PATCH 03/10] i965: perf: fix codegen with single operand equation

We did support single value operand equations, but not single variable operand ones. In particular we were failing on "$Sampler0Bottleneck". Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_oa.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 07/10] i965: ensure isolated timer reports while idle don't confuse filtering

abelled as such. This change makes ensure that while reading OA reports, we only consider the GPU actually idle after 2 reports with an invalid context ID. Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_performance_query.c | 10 +- 1 file changed, 9 insertions

[Mesa-dev] [PATCH 08/10] i965: use gen_device_info rather then brw_context

Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_performance_query.c | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c index c6574df302a

[Mesa-dev] [PATCH 06/10] i965: perf: keep on reading reports until delimiting timestamp

s the i965 driver reading the perf stream when not necessary, leading to very long counter accumulation times (Lionel) Signed-off-by: Lionel Landwerlin Cc: Robert Bragg --- src/mesa/drivers/dri/i965/brw_performance_query.c | 133 ++ 1 file changed, 113 insertions(+

Re: [Mesa-dev] [PATCH 2/2] anv/i965: drop libdrm_intel dependency completely

ecipe for disaster. On 15 June 2017 at 01:22, Lionel Landwerlin wrote: With Ken's work to drop the library dependency on libdrm_intel, we now only depend on libdrm for the kernel uapi headers it provides. It seems like we're better off just embeddeding those headers ourselves, maki

[Mesa-dev] [PATCH v2 0/3] Anv/i965: Drop dependency on libdrm's kernel headers

Hi, This a pretty minor update that splits the build system changes into 2 parts (i915 & i965/anv) following Emil's comments. I left people's Ack-by/Reviewed-by given there isn't any functionnal change. Unless I get any complaint within the next day, it'll pushed. Thank

[Mesa-dev] [PATCH v2 1/3] aubinator: import intel_aub.h from libdrm

This enables us to compile aubinator without the libdrm dependency. Signed-off-by: Lionel Landwerlin Reviewed-by: Kenneth Graunke --- src/intel/tools/intel_aub.h | 153 1 file changed, 153 insertions(+) create mode 100644 src/intel/tools

[Mesa-dev] [PATCH v2 2/3] i915: use different CFLAGS/LIBS variables than i965/anv

Signed-off-by: Lionel Landwerlin Reviewed-by: Kenneth Graunke --- configure.ac| 4 ++-- src/gallium/drivers/i915/Automake.inc | 2 +- src/gallium/targets/pipe-loader/Makefile.am | 2 +- src/gallium/winsys/i915/drm/Makefile.am | 2 +- src/mesa/drivers

Re: [Mesa-dev] [PATCH 05/10] i965: Add Gen8+ INTEL_performance_query support

On 15/06/17 08:42, Kenneth Graunke wrote: On Wednesday, June 14, 2017 5:38:30 PM PDT Lionel Landwerlin wrote: From: Robert Bragg Enables access to OA unit metrics on Gen8+ via INTEL_performance_query. Signed-off-by: Robert Bragg --- src/mesa/drivers/dri/i965/Makefile.am | 8

Re: [Mesa-dev] [PATCH 06/10] i965: perf: keep on reading reports until delimiting timestamp

On 15/06/17 08:51, Kenneth Graunke wrote: On Wednesday, June 14, 2017 5:38:31 PM PDT Lionel Landwerlin wrote: Due to an underlying hardware race condition, we have no guarantee that all the reports coming from the OA buffer related to the workload we're trying to measure have landed to m

[Mesa-dev] [PATCH v2 03/13] i965: convert MI_REPORT_PERF_COUNT to genxml

Also make it available from gen7 only to gen7+. Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_context.h | 11 src/mesa/drivers/dri/i965/brw_performance_query.c | 33 --- src/mesa/drivers/dri/i965/genX_state_upload.c | 18

[Mesa-dev] [PATCH v2 02/13] i965: perf: fix codegen with single operand equation

We did support single value operand equations, but not single variable operand ones. In particular we were failing on "$Sampler0Bottleneck". Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_oa.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH v2 09/13] i965: perf: keep on reading reports until delimiting timestamp

makes the i965 driver reading the perf stream when not necessary, leading to very long counter accumulation times (Lionel) Signed-off-by: Lionel Landwerlin Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_performance_query.c | 133 ++ 1 file changed

[Mesa-dev] [PATCH v2 05/13] intel: common: add number of thread per eu

This will be used by to normalize OA counters. Signed-off-by: Lionel Landwerlin --- src/intel/common/gen_device_info.c | 24 ++-- src/intel/common/gen_device_info.h | 6 ++ 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/src/intel/common

[Mesa-dev] [PATCH v2 00/13] i965: Add performance query OA support on Gen 8 & 9

h/oa-next Cheers, Lionel Landwerlin (9): intel: common: add flag to identify platforms by name i965: perf: fix codegen with single operand equation i965: convert MI_REPORT_PERF_COUNT to genxml intel: common: express timestamps units in frequency intel: common: add number of thread pe

[Mesa-dev] [PATCH v2 01/13] intel: common: add flag to identify platforms by name

The perf infrastructure needs to identify specific platforms, not just generations. Signed-off-by: Lionel Landwerlin --- src/intel/common/gen_device_info.c | 26 -- src/intel/common/gen_device_info.h | 4 2 files changed, 24 insertions(+), 6 deletions(-) diff

[Mesa-dev] [PATCH v2 11/13] i965: perf: use gen_device_info rather then brw_context

Signed-off-by: Lionel Landwerlin Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_performance_query.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH v2 08/13] i965: Add Gen8+ INTEL_performance_query support

From: Robert Bragg Enables access to OA unit metrics on Gen8+ via INTEL_performance_query. v2: make use of new parameters coming from gen_device_info (Lionel) Signed-off-by: Robert Bragg Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/Makefile.am | 8 +- src

[Mesa-dev] [PATCH v2 10/13] i965: perf: ensure isolated timer reports while idle don't confuse filtering

abelled as such. This change makes ensure that while reading OA reports, we only consider the GPU actually idle after 2 reports with an invalid context ID. Signed-off-by: Lionel Landwerlin Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_performance_query.c | 18 +++

[Mesa-dev] [PATCH v2 06/13] i965: Add Gen8+ sys_vars for generated OA code

ars. Signed-off-by: Robert Bragg Reviewed-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_context.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index cf2c2cbed59..7663cf07e04 100644 --- a/src/m

[Mesa-dev] [PATCH v2 04/13] intel: common: express timestamps units in frequency

. Signed-off-by: Lionel Landwerlin --- src/intel/common/gen_device_info.c | 19 ++- src/intel/common/gen_device_info.h | 5 +++-- src/intel/vulkan/anv_device.c| 2 +- src/mesa/drivers/dri/i965/brw_queryobj.c | 2 +- 4 files changed, 15 insertions(+), 13

[Mesa-dev] [PATCH] intel: compiler/i965: fix is_broxton checks

In 5f2fe9302c is_geminilake was introduced for the differenciate broxton from geminilake. Unfortunately I failed as verifying that is_broxton is throughout the code base to mean Gen9lp. Fixes: 5f2fe9302c ("intel: common: add flag to identify platforms by name") Signed-off-by: Lionel

Re: [Mesa-dev] [PATCH] intel: compiler/i965: fix is_broxton checks

On 20/06/17 18:05, Ian Romanick wrote: On 06/20/2017 05:23 AM, Lionel Landwerlin wrote: In 5f2fe9302c is_geminilake was introduced for the differenciate broxton from geminilake. Unfortunately I failed as verifying that is_broxton is throughout the code base to mean Gen9lp. It looks like this

[Mesa-dev] [RFC PATCH 2/2] intel/i965: teach command streamer parsers about debug messages

We introduce a gen_decoder_context structure that holds state spanning multiple instructions. That way we can print debug messages that span multiple MI_NOOPs. Signed-off-by: Lionel Landwerlin --- src/intel/common/gen_decoder.c| 98 +++ src/intel/common

[Mesa-dev] [RFC PATCH 1/2] anv/i965/blorp: add command streamer debug messages

essages (3 * 7bits). Signed-off-by: Lionel Landwerlin --- src/intel/blorp/blorp.h | 2 ++ src/intel/blorp/blorp_blit.c | 4 src/intel/blorp/blorp_clear.c | 24 + src/intel/common/gen_debug.c | 1 +

[Mesa-dev] [RFC PATCH 0/2] intel: implement command buffer debug messages

bugging with INTEL_DEBUG=batch. Looking forward to comments! Cheers, Lionel Landwerlin (2): anv/i965/blorp: add command streamer debug messages intel/i965: teach command streamer parsers about debug messages src/intel/blorp/blorp.h | 2 + src/intel/blorp/blorp_blit.c

[Mesa-dev] [PATCH 1/2] intel: common: break has_hiz_and_separate_stencil into 2 flags

i965's brw_context needs to disable hiz under some debug flag, so break this in 2 so we can configure this at runtime. Signed-off-by: Lionel Landwerlin --- src/intel/common/gen_device_info.c | 12 src/intel/common/gen_device_info.h | 3 ++- src/intel/isl/

[Mesa-dev] [PATCH 0/2] anv/i965: remove copies of devinfo fields in brw_context

Hi, This is a bit of a cleanup, although it does add more lines than it removes :( We've copies of the device info fields in brw_context. Let's get rid of those and use the device info structure we have loaded at initalization. Cheers, Lionel Landwerlin (2): intel: com

Re: [Mesa-dev] [PATCH 0/2] anv/i965: remove copies of devinfo fields in brw_context

Second patch was too large. You can find the branch here : https://github.com/djdeath/mesa/tree/drop-brw-is-has On 20/06/17 23:42, Lionel Landwerlin wrote: Hi, This is a bit of a cleanup, although it does add more lines than it removes :( We've copies of the device info fiel

Re: [Mesa-dev] [PATCH 1/3] glsl: fix typo in comment

Patches 1 & 2 are : Reviewed-by: Lionel Landwerlin On 21/06/17 11:12, Timothy Arceri wrote: --- src/compiler/glsl/opt_algebraic.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/glsl/opt_algebraic.cpp b/src/compiler/glsl/opt_algebraic.cpp index a5b

[Mesa-dev] [PATCH] i965: perf: minimize the chances to spread queries across batchbuffers

into the hardware. Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_performance_query.c | 8 1 file changed, 8 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c index 06576a54d03..6b874d0

Re: [Mesa-dev] [PATCH 1/2] intel: common: break has_hiz_and_separate_stencil into 2 flags

think the correct reafactor here would be to make the miptree code directly look at INTEL_DEBUG & DEBUG_NOHIZ instead of whacking the context bit. On June 22, 2017 4:50:42 AM Iago Toral wrote: Reviewed-by: Iago Toral Quiroga On Tue, 2017-06-20 at 23:42 +0100, Lionel Landwerlin

[Mesa-dev] [PATCH] anv: use devinfo for number of thread/eu

It turns out Gen9LP has fewer threads per EU (6 vs 7). Signed-off-by: Lionel Landwerlin --- src/intel/vulkan/anv_device.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 504a757571f..3f761226484 100644

[Mesa-dev] [PATCH 2/5] vulkan: enum generator: sort enums by names

Signed-off-by: Lionel Landwerlin --- src/vulkan/util/gen_enum_to_str.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/vulkan/util/gen_enum_to_str.py b/src/vulkan/util/gen_enum_to_str.py index ab77ccc7c49..bf001b14582 100644 --- a/src/vulkan/util/gen_enum_to_str.py +++ b/src/vulkan

[Mesa-dev] [PATCH 3/5] vulkan: enum generator: make registry more flexible

It will be used to store extension numbers as well. Signed-off-by: Lionel Landwerlin --- src/vulkan/util/gen_enum_to_str.py | 19 +-- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/src/vulkan/util/gen_enum_to_str.py b/src/vulkan/util/gen_enum_to_str.py index

[Mesa-dev] [PATCH 4/5] vulkan: enum generator: generate extension number defines

num of the the format enum value. This change makes the extension number available in the generated enum code. Signed-off-by: Lionel Landwerlin --- src/vulkan/util/gen_enum_to_str.py | 23 +-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/src/v

[Mesa-dev] [PATCH 1/5] vulkan: enum generator: align function declarations/prototypes

Signed-off-by: Lionel Landwerlin --- src/vulkan/util/gen_enum_to_str.py | 27 ++- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/src/vulkan/util/gen_enum_to_str.py b/src/vulkan/util/gen_enum_to_str.py index fb31addf94f..ab77ccc7c49 100644 --- a/src

[Mesa-dev] [PATCH 5/5] vulkan: util: add macros to extract extension/offset number from enums

Signed-off-by: Lionel Landwerlin --- src/vulkan/util/vk_util.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/src/vulkan/util/vk_util.h b/src/vulkan/util/vk_util.h index 2ed601f881e..a152984d14d 100644 --- a/src/vulkan/util/vk_util.h +++ b/src/vulkan/util/vk_util.h @@ -199,4 +199,11

[Mesa-dev] [PATCH 0/5] Vulkan: add extensions numbers to generated enums

based off the extension number. The first 3 patches are just rework, the generated defines are in patch 4 and associated helpers in patch 5. Cheers, Lionel Landwerlin (5): vulkan: enum generator: align function declarations/prototypes vulkan: enum generator: sort enums by names vulkan: enum

Re: [Mesa-dev] [PATCH 0/2] Fix distcheck

Oops, thanks a lot! This series is : Reviewed-by: Lionel Landwerlin On 28/06/17 18:47, Juan A. Suarez Romero wrote: The following two patches fix distcheck. Juan A. Suarez Romero (2): intel: automake: include Makefile.drm.am intel: tools: add intel_aub.h as part of aubinator src

Re: [Mesa-dev] [PATCH] android: anv: drop libdrm_intel dependency

Not an expert on the android build system, I have a question below. Otherwise : Acked-by: Lionel Landwerlin Thanks! On 29/06/17 01:46, Mauro Rossi wrote: In addition to Rob Herring "Android: i965: remove libdrm_intel dependency", we can drop libdrm_intel dependency in anv f

Re: [Mesa-dev] [PATCH 1/5] intel: Move the DRM uapi headers to a non-Intel location.

I just sent a Ack-by on a patch to fix the android build with the intel driver : https://patchwork.freedesktop.org/patch/164312/ You might want to modify this as well so it's not broken again :) Otherwise this patch is : Reviewed-by: Lionel Landwerlin On 29/06/17 02:15, Eric Anholt

Re: [Mesa-dev] [PATCH] Android: i965: remove libdrm_intel dependency

Reviewed-by: Lionel Landwerlin On 28/06/17 23:08, Rob Herring wrote: Commit 7dd20bc3ee8f ("anv/i965: drop libdrm_intel dependency completely") removed the libdrm_intel dependency for automake, but Android builds still depended on it. Now the build requires a newer version of i915

Re: [Mesa-dev] [PATCH 01/18] nir/spirv: Move a "}"

How did this even compile? Should we cc stable? Reviewed-by: Lionel Landwerlin On 29/06/17 18:33, Jason Ekstrand wrote: It's closing a "{" at the begining of a switch case. --- src/compiler/spirv/vtn_variables.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) d

Re: [Mesa-dev] [PATCH] anv: Advertise support for VK_FORMAT_R8_SRGB

Reviewed-by: Lionel Landwerlin On 30/06/17 02:53, Jason Ekstrand wrote: Unreal Engine 4 seems to really like this format for some reason. We don't technically have the hardware format but we do have L8_SRGB. It's easy enough to fake with that and a swizzle. --- src/in

Re: [Mesa-dev] [PATCH] anv: check support for enabled features in vkCreateDevice()

Reviewed-by: Lionel Landwerlin On 30/06/17 07:59, Samuel Iglesias Gonsálvez wrote: From Vulkan spec, 4.2.1. "Device Creation": "vkCreateDevice verifies that extensions and features requested in the ppEnabledExtensionNames and pEnabledFeatures members of pCreateInf

Re: [Mesa-dev] [PATCH] intel/compiler: Don't use opt_sampler_eot() optimization on gen10+

Indeed, that's what the documentation says : Reviewed-by: Lionel Landwerlin On 27/06/17 23:51, Anuj Phogat wrote: This optimization has been removed on gen10+. Signed-off-by: Anuj Phogat --- src/intel/compiler/brw_fs.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --

[Mesa-dev] [PATCH] intel: genxml: make a couple of enums show up in aubinator

In particular Shader Channel Select & Texture Address Control Mode. Signed-off-by: Lionel Landwerlin --- src/intel/genxml/gen10.xml | 14 +++--- src/intel/genxml/gen6.xml | 6 +++--- src/intel/genxml/gen7.xml | 6 +++--- src/intel/genxml/gen75.xml

Re: [Mesa-dev] [PATCH v2] intel: Move the DRM uapi headers to a non-Intel location.

tree would be silly. v2: Update Android.mk as well, move distcheck drm*.h references to top-level noinst_HEADERS. Reviewed-by: Lionel Landwerlin Reviewed-by: Daniel Stone --- Makefile.am | 4 {src/intel/drm => include/drm-uapi}/README

Re: [Mesa-dev] [PATCH v2] intel: Move the DRM uapi headers to a non-Intel location.

On 30/06/17 17:43, Emil Velikov wrote: On 30 June 2017 at 17:40, Lionel Landwerlin wrote: On 30/06/17 17:14, Alex Deucher wrote: On Fri, Jun 30, 2017 at 12:02 PM, Eric Anholt wrote: Alex Deucher writes: On Thu, Jun 29, 2017 at 11:42 AM, Eric Anholt wrote: I want to remove vc4&#

[Mesa-dev] [PATCH] anv: fix reported timestampPeriod value

We lost some precision on a previous change due to switching to integers. Since we report a float in timestampPeriod, we want the division to happen in floats. CID: 1413021 Fixes: c77d98ef32 ("intel: common: express timestamps units in frequency") Signed-off-by: Lionel Landwerlin ---

Re: [Mesa-dev] [PATCH] mesa: check if any of the named builtins are available first

Looks good to me, but admittedly not an expert. Acked-by: Lionel Landwerlin On 03/07/17 22:08, Ilia Mirkin wrote: _mesa_glsl_has_builtin_function is used to determine whether any variant of a builtin are available, for the purpose of enforcing the GLSL ES 3.00+ rule that overloads or

[Mesa-dev] [PATCH 1/2] intel: add number of subslices to device info

We could have used a single integer to store that value, but Cannonlake has different number of subslices per slice depending on the GT. Signed-off-by: Lionel Landwerlin --- src/intel/common/gen_device_info.c | 54 -- src/intel/common/gen_device_info.h | 5

[Mesa-dev] [PATCH 2/2] i965: perf: use new subslices numbers from device info

Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_performance_query.c | 49 --- 1 file changed, 17 insertions(+), 32 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c index

Re: [Mesa-dev] [PATCH 2/7] intel: Fix clflushing on modern (Baytrail+) Atom CPUs.

I remember that DS had issues with CMAA (Conservative Morphological Anti-Aliasing) on Baytrail or Braswell ChromeOS devices. Would be worth a to see whether this series fixes that. Thanks! Acked-by: Lionel Landwerlin On 05/07/17 21:56, Kenneth Graunke wrote: Thanks to Chris Wilson for

[Mesa-dev] [PATCH 0/3] Intel: subslices/eus computation in perf query

i965: Use already existing eu_total Lionel Landwerlin (2): intel: add number of subslices to device info i965: perf: use new subslices numbers from device info src/intel/common/gen_device_info.c| 57 ++ src/intel/common/gen_device_info.h| 5 ++

[Mesa-dev] [PATCH 2/3] intel: add number of subslices to device info

We could have used a single integer to store that value, but Cannonlake has different number of subslices per slice depending on the GT. v2: Add CFL subslice numbers (Lionel) Signed-off-by: Lionel Landwerlin Reviewed-by: Ben Widawsky --- src/intel/common/gen_device_info.c | 57

[Mesa-dev] [PATCH 1/3] i965: Use already existing eu_total

From: Ben Widawsky Reduces IOCTL calls by 1, and provides a centralized place to override such configurations if we have a need to do so. Signed-off-by: Ben Widawsky Reviewed-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_performance_query.c | 9 + 1 file changed, 1

[Mesa-dev] [PATCH 3/3] i965: perf: use new subslices numbers from device info

Signed-off-by: Lionel Landwerlin Reviewed-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_performance_query.c | 49 --- 1 file changed, 17 insertions(+), 32 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965

Re: [Mesa-dev] [PATCH] anv: Stop leaking the no_aux sampler surface state

Well spotted! Reviewed-by: Lionel Landwerlin On 11/07/17 16:14, Jason Ekstrand wrote: Cc: mesa-sta...@lists.freedesktop.org --- src/intel/vulkan/anv_image.c | 5 + 1 file changed, 5 insertions(+) diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c index 76ab923

Re: [Mesa-dev] [PATCH 00/11] anv: A few refactors and fixes

Conflicting a bit with some upcoming work here too, but looks good overall : Reviewed-by: Lionel Landwerlin On 12/07/17 01:04, Jason Ekstrand wrote: I started working on another up-and-coming Vulkan feature today and, as is frequently the case, found a bunch of bugs along the way. This tiny

[Mesa-dev] [PATCH v2 i-g-t] igt/perf: add tests to verify create/destroy userspace configs

v2: Add tests regarding removing configs (Matthew) Add tests regarding adding/removing configs without permissions (Matthew) Signed-off-by: Lionel Landwerlin --- tests/perf.c | 201 +++ 1 file changed, 201 insertions(+) diff --git

Re: [Mesa-dev] [PATCH v2 i-g-t] igt/perf: add tests to verify create/destroy userspace configs

Wrong mailing list! On 13/07/17 12:11, Lionel Landwerlin wrote: v2: Add tests regarding removing configs (Matthew) Add tests regarding adding/removing configs without permissions (Matthew) Signed-off-by: Lionel Landwerlin --- tests/perf.c | 201

Re: [Mesa-dev] [PATCH 0/4] enable GL_EXT_disjoint_timer_query

delta, I don't think patch 2 is necessary. Otherwise this series looks good to me (you might want someone else to double check the API/xml stuff that I'm not super familiar with) : Reviewed-by: Lionel Landwerlin On 20/11/17 07:18, Tapani Pälli wrote: This series enables mostl

Re: [Mesa-dev] [PATCH 1/4] intel/decoder: Drop gen_field_decode helper

I was using it in the aubinator ui, but that's kind of stalled a bit. I'm fine adding it back later if people are still interested in the UI. This series is : Reviewed-by: Lionel Landwerlin On 13/12/17 01:38, Jason Ekstrand wrote: It's unused --- src/intel/common/ge

Re: [Mesa-dev] [PATCH 00/11] intel/tools: Unify batch decoding between aubinators

This looks really good :) I can't find anything to nitpick : Reviewed-by: Lionel Landwerlin On 13/12/17 20:05, Jason Ekstrand wrote: Both aubinator and aubinator_error_decode try and do the same task of decoding batches. They both have code to try and decode various things such as sh

Re: [Mesa-dev] [PATCH] spirv: Relax the validation conditions of OpSelect

Thanks for point me to the code actually doing this (nir_build_alu). Reviewed-by: Lionel Landwerlin On 15/12/17 03:56, Jason Ekstrand wrote: The Talos Principle contains shaders with an OpSelect between two vectors where the condition is a scalar boolean. This is technically against the spec

Re: [Mesa-dev] [PATCH] spirv: avoid infinite loop / freeze in vtn_cfg_walk_blocks()

Reviewed-by: Lionel Landwerlin On 21/12/17 13:53, Eero Tamminen wrote: Fixes: 9702fac68e (spirv: consider bitsize when handling OpSwitch cases) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104359 ---  src/compiler/spirv/vtn_cfg.c | 14 +++---  1 file changed, 7 insertions

Re: [Mesa-dev] [PATCH 3/4] intel/aubinator: Gracefully handle dynamic state not being available

Reviewed-by: Lionel Landwerlin On 27/12/17 20:58, Jason Ekstrand wrote: Some older versions of the Vulkan driver didn't properly tag dynamic state as needing to be captured. Also, this prevents crashes when looking at dumps on older kernels. --- src/intel/tools/gen_batch_decoder.

Re: [Mesa-dev] [PATCH 2/4] intel/aubinator: Free section data last

Good catch! Reviewed-by: Lionel Landwerlin On 27/12/17 20:58, Jason Ekstrand wrote: We were walking the sections, printing the batches, and then freeing them in one pass. If the batch happens to reference any earlier sections (which it almost certainly will since it's at the end), we

Re: [Mesa-dev] [PATCH 4/4] anv/device: Mark all state buffers as needing capture

Reviewed-by: Lionel Landwerlin On 27/12/17 20:58, Jason Ekstrand wrote: Previously, we were flagging the instruction state buffer for capture but not surface state or dynamic state. We want those captured too. --- src/intel/vulkan/anv_device.c | 6 +++--- 1 file changed, 3 insertions(+), 3

Re: [Mesa-dev] [PATCH] anv: Add missing unlock in anv_scratch_pool_alloc

Thanks Alex, Reviewed-by: Lionel Landwerlin On 04/01/18 11:33, Alex Smith wrote: Fixes hangs seen due to the lock not being released here. Signed-off-by: Alex Smith Cc: mesa-sta...@lists.freedesktop.org --- src/intel/vulkan/anv_allocator.c | 4 +++- 1 file changed, 3 insertions(+), 1

Re: [Mesa-dev] [PATCH] anv: Take write mask into account in has_color_buffer_write_enabled

Looks good to me too. Reviewed-by: Lionel Landwerlin Thanks a lot! - Lionel On 05/01/18 09:19, Iago Toral wrote: Looks good to me, unless Jason or Lionel say otherwise: Reviewed-by: Iago Toral Quiroga Iago On Thu, 2018-01-04 at 18:13 +, Alex Smith wrote: If we have a color

Re: [Mesa-dev] [PATCH] anv: Allow PMA optimization to enabled in secondary command buffers

This makes sense to me, it would be good to have Jason's opinion. I have a suggestion below. Reviewed-by: Lionel Landwerlin Thanks! On 05/01/18 11:20, Alex Smith wrote: This was never enabled in secondary buffers because hiz_enabled was never set to true for those. If the app provi

Re: [Mesa-dev] [PATCH] genxml: Add missing INSTDONE_1 bits on Gen7.5+.

Reviewed-by: Lionel Landwerlin On 08/01/18 06:33, Kenneth Graunke wrote: This will make aubinator_error_decode decode them properly. --- src/intel/genxml/gen10.xml | 2 ++ src/intel/genxml/gen75.xml | 2 ++ src/intel/genxml/gen8.xml | 2 ++ src/intel/genxml/gen9.xml | 2 ++ 4 files

Re: [Mesa-dev] [PATCH v3 1/6] spirv: Add a mechanism for dumping failing shaders

This series is : Reviewed-by: Lionel Landwerlin On 04/01/18 01:34, Jason Ekstrand wrote: --- src/compiler/spirv/spirv_to_nir.c | 28 src/compiler/spirv/vtn_private.h | 1 + 2 files changed, 29 insertions(+) diff --git a/src/compiler/spirv/spirv_to_nir.c b

Re: [Mesa-dev] [PATCH v3 1/6] spirv: Add a mechanism for dumping failing shaders

Hmm... The email subject says it's the v3. Am I missing something? (it's at the top of the list in my client, so it's probably the last you sent). On 08/01/18 16:38, Jason Ekstrand wrote: There's a v3 of this On Mon, Jan 8, 2018 at 8:36 AM, Lionel Landwerlin mai

Re: [Mesa-dev] [PATCH 06/11] spirv: Add better validation to Op[Spec]Constant

On 17/12/17 05:46, Jason Ekstrand wrote: --- src/compiler/spirv/spirv_to_nir.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 208ec95..d65c0d0 100644 --- a/src/compiler/spirv/spirv_to_nir.c

Re: [Mesa-dev] [PATCH 09/11] spirv: Add better type validation to OpTypeImage

On 17/12/17 05:46, Jason Ekstrand wrote: --- src/compiler/spirv/spirv_to_nir.c | 17 ++--- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 83c75c7..ffea442 100644 --- a/src/compiler/spirv/sp

Re: [Mesa-dev] [PATCH 00/11] SPIR-V More error checking/validation improvements

I have a nit for patch 6 and a question on patch 9, maybe there is a thing on change on that one. Otherwise this is : Reviewed-by: Lionel Landwerlin On 17/12/17 05:46, Jason Ekstrand wrote: This series is another 11 patches in the direction of improving SPIR-V error messages and validation

Re: [Mesa-dev] [PATCH] anv: VkDescriptorSetLayoutBinding can have descriptorCount == 0

Reviewed-by: Lionel Landwerlin Probably Cc stable too. Thanks! On 11/01/18 11:09, Samuel Iglesias Gonsálvez wrote: From Vulkan spec: "descriptorCount is the number of descriptors contained in the binding, accessed in a shader as an array. If descriptorCount is zero this binding ent

Re: [Mesa-dev] [PATCH] anv/pipeline: Don't look at blend state unless we have an attachment

Reviewed-by: Lionel Landwerlin On 18/01/18 01:16, Jason Ekstrand wrote: Without this, we may end up dereferencing blend before we check for binding->index != UINT32_MAX. However, Vulkan allows the blend state to be NULL so long as you don't have any color attachments. This fixes a

[Mesa-dev] [PATCH 09/15] isl: add surface layout for yuv formats

Signed-off-by: Lionel Landwerlin --- src/intel/isl/isl_format_layout.csv | 4 1 file changed, 4 insertions(+) diff --git a/src/intel/isl/isl_format_layout.csv b/src/intel/isl/isl_format_layout.csv index f340e30a1bf..30d07b8ad2d 100644 --- a/src/intel/isl/isl_format_layout.csv +++ b/src

[Mesa-dev] [PATCH 13/15] anv: add nir lowering pass for ycrcb textures

This pass implements all the implicit conversions required by the VK_KHR_sampler_ycbcr_conversion specification. It also inserts plane sources onto sampling instructions that we then let the pipeline layout pass deal with, when mapping things correctly to descriptors. Signed-off-by: Lionel

[Mesa-dev] [PATCH 12/15] anv: add descriptor support for multiplanar image/sampler

Signed-off-by: Lionel Landwerlin --- src/intel/vulkan/anv_descriptor_set.c| 107 +-- src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 44 +- src/intel/vulkan/anv_private.h | 24 - src/intel/vulkan/genX_cmd_buffer.c

[Mesa-dev] [PATCH 10/15] anv: modify the internal concept of format to express multiple planes

A given Vulkan format can now be decomposed into a set of planes. We now use 'struct anv_format_plane' to represent the format of those planes. Signed-off-by: Lionel Landwerlin --- src/intel/vulkan/anv_blorp.c | 31 +-- src/intel/vulkan/anv_formats

[Mesa-dev] [PATCH 15/15] anv: enable VK_KHR_sampler_ycbcr_conversion

Signed-off-by: Lionel Landwerlin --- src/intel/vulkan/anv_device.c | 51 ++-- src/intel/vulkan/anv_extensions.py | 1 + src/intel/vulkan/anv_formats.c | 59 ++ src/intel/vulkan/anv_image.c | 24 ++-- src

Re: [Mesa-dev] [PATCH 11/15] anv: add new formats KHR_sampler_ycbcr_conversion

On 15/09/17 23:36, Jason Ekstrand wrote:  struct anv_format_plane {     enum isl_format isl_format:16;     struct isl_swizzle swizzle; + +   /* Whether this plane contains chroma channels */ +   bool has_chroma; + +   /* For downscaling of YUV planes */ +   ui

Re: [Mesa-dev] [PATCH] anv: Implement VK_KHR_bind_memory2

I'll rebase my stuff on top of this. Reviewed-by: Lionel Landwerlin On 15/09/17 20:10, Jason Ekstrand wrote: --- src/intel/vulkan/anv_device.c | 41 +--- src/intel/vulkan/anv_extensions.py | 1 + src/intel/vulkan/anv_image.c

Re: [Mesa-dev] [PATCH] anv: Implement VK_KHR_image_format_list

On 15/09/17 17:18, Jason Ekstrand wrote: --- src/intel/vulkan/anv_extensions.py | 1 + src/intel/vulkan/anv_image.c | 37 +++-- 2 files changed, 36 insertions(+), 2 deletions(-) diff --git a/src/intel/vulkan/anv_extensions.py b/src/intel/vulkan/anv_ext

Re: [Mesa-dev] [PATCH] anv: Implement VK_KHR_image_format_list

On 17/09/17 16:02, Jason Ekstrand wrote: On September 17, 2017 3:57:39 AM Lionel Landwerlin wrote: On 15/09/17 17:18, Jason Ekstrand wrote: ---   src/intel/vulkan/anv_extensions.py |  1 +   src/intel/vulkan/anv_image.c   | 37 +++--   2 files changed, 36

Re: [Mesa-dev] [PATCH 05/15] vulkan: enum generator: generate extension number defines

the table of tables for the formats?  I don't see that in ithe series. On Mon, Sep 18, 2017 at 7:46 AM, Jason Ekstrand <mailto:ja...@jlekstrand.net>> wrote: On Fri, Sep 15, 2017 at 7:10 AM, Lionel Landwerlin mailto:lionel.g.landwer...@intel.com>> wrote:

Re: [Mesa-dev] [PATCH 08/12] anv/image: Support creating uncompressed views of compressed images

On 15/09/17 17:01, Jason Ekstrand wrote: In order to get support everywhere, this gets a bit complicated. On Sky Lake and later, everything is fine because HALIGN/VALIGN are specified in surface elements and are required to be at least 4 so any offsetting we may need to do falls neatly within th

Re: [Mesa-dev] [PATCH 09/12] intel/blorp: Internally expose surf_convert_to_uncompressed

Reviewed-by: Lionel Landwerlin On 15/09/17 17:01, Jason Ekstrand wrote: --- src/intel/blorp/blorp_blit.c | 29 - src/intel/blorp/blorp_priv.h | 5 + 2 files changed, 21 insertions(+), 13 deletions(-) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel

Re: [Mesa-dev] [PATCH 10/12] intel/blorp: Handle clearing compressed surfaces

Reviewed-by: Lionel Landwerlin On 15/09/17 17:01, Jason Ekstrand wrote: --- src/intel/blorp/blorp_clear.c | 24 +--- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c index 0feebef..e8b1e32 100644

Re: [Mesa-dev] [PATCH 04/15] vulkan: enum generator: make registry more flexible

On 15/09/17 22:27, Jason Ekstrand wrote: On Fri, Sep 15, 2017 at 7:10 AM, Lionel Landwerlin mailto:lionel.g.landwer...@intel.com>> wrote: It will be used to store extension numbers as well. Signed-off-by: Lionel Landwerlin mailto:lionel.g.landwer...@intel.com>>

Re: [Mesa-dev] [PATCH 06/15] vulkan: util: add macros to extract extension/offset number from enums

On 15/09/17 22:34, Jason Ekstrand wrote: On Fri, Sep 15, 2017 at 7:10 AM, Lionel Landwerlin mailto:lionel.g.landwer...@intel.com>> wrote: Signed-off-by: Lionel Landwerlin mailto:lionel.g.landwer...@intel.com>> ---  src/vulkan/util/vk_util.h | 7 +++  1 fil

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