[Mesa-dev] [Bug 102891] [radv] glitches on rpcs3 emulator (green zones)

https://bugs.freedesktop.org/show_bug.cgi?id=102891 --- Comment #7 from Samuel Pitoiset --- Yeah, zerovram doesn't change anything. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.___ mesa-d

Re: [Mesa-dev] [PATCH 2/4] r600: use mysterious DX10_CLAMP bit in pixel shader setup

The internal docs are pretty much the same (i.e. confusing and non-explicit), but my layman's reading of the RTL is that DX10_CLAMP only affects clamping. So if you have a v_mul_f32 0, inf that will generate a NaN just fine and is simply unaffected by DX10_CLAMP. However, if the clamp bit i

Re: [Mesa-dev] [PATCH] amd/addrlib: update to latest version

On 08.11.2017 23:54, Ilia Mirkin wrote: On Wed, Nov 8, 2017 at 4:13 AM, Nicolai Hähnle wrote: On 08.11.2017 09:53, Michel Dänzer wrote: On 07/11/17 10:58 PM, Marek Olšák wrote: On Tue, Nov 7, 2017 at 9:01 PM, Nicolai Hähnle wrote: On 07.11.2017 18:35, Michel Dänzer wrote: On 07/11/17

[Mesa-dev] [PATCH 3/3] i965: Fold ABO state upload code into the SSBO/UBO state upload code.

Having this separate could potentially make programs that rebind atomics but no other surfaces ever so slightly faster. But it's a tiny amount of code to add to the existing UBO/SSBO atom, and very related. The extra atoms have a cost on every draw call, and so dropping some of them would be nice

[Mesa-dev] [PATCH 2/3] i965: Use nir_lower_atomics_to_ssbos and delete ABO compiler code.

We use the same hardware mechanism for both atomic counters and SSBO atomics, so there's really no benefit to maintaining separate code to handle each case. Instead, we can just use Rob's shiny new NIR pass to convert atomic_uints to SSBOs, and delete piles of code. The ssbo_start section of the

[Mesa-dev] [PATCH 1/3] i965: Make a better helper function for UBO/SSBO/ABO surface handling.

This fixes the missing AutomaticSize handling in the ABO code, removes a bunch of duplicated code, and drops an extra layer of wrapping around brw_emit_buffer_surface_state(). --- src/mesa/drivers/dri/i965/brw_context.h | 10 -- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 113

Re: [Mesa-dev] [PATCH] i965: Pretend there are 4 subslices for compute shader threads on Gen9+.

Reviewed-by: Jordan Justen On 2017-11-08 10:56:00, Kenneth Graunke wrote: > Similar to what we did for pixel shader threads - see gen_device_info.c. > > We don't want to bump the actual Maximum Number of Threads though, so > we adjust it here. For pixel shaders, we don't use max_wm_threads, so

Re: [Mesa-dev] gallium/r600 atomic - v4

Am Donnerstag, den 09.11.2017, 11:54 +1000 schrieb Dave Airlie: > Hopefully last pass, a few fixes in here, patch 5 is the only > outstanding non-reviewed one, I think I've fixed the sparse > buffer binding in it well enough, there is also fix for Gert's > off-by one. I've run the patch series wit

Re: [Mesa-dev] [PATCH 1/3] i965: Make a better helper function for UBO/SSBO/ABO surface handling.

AFAICT functionality is identical; Reviewed-by: Tapani Pälli On 11/09/2017 10:45 AM, Kenneth Graunke wrote: This fixes the missing AutomaticSize handling in the ABO code, removes a bunch of duplicated code, and drops an extra layer of wrapping around brw_emit_buffer_surface_state(). --- src/

Re: [Mesa-dev] [PATCH 1/3] i965: Make a better helper function for UBO/SSBO/ABO surface handling.

On 11/09/2017 11:43 AM, Tapani Pälli wrote: AFAICT functionality is identical; (except for the AutomaticSize check of course) Reviewed-by: Tapani Pälli On 11/09/2017 10:45 AM, Kenneth Graunke wrote: This fixes the missing AutomaticSize handling in the ABO code, removes a bunch of duplica

Re: [Mesa-dev] [PATCH 00/17] i965 ARB_get_program_binary support

On 09/11/17 17:42, Jordan Justen wrote: git://people.freedesktop.org/~jljusten/mesa i965-get-program-binary-v1 This series adds i965 support for ARB_get_program_binary with greater than 0 supported formats. Today we support this extension, but advertise support for 0 formats. This series allows

Re: [Mesa-dev] [PATCH 03/17] compiler: Fold shader_cache in with libglsl sources

On 09.11.2017 07:42, Jordan Justen wrote: It appears that we include the shader cache sources into libglsl regardless. The Meson build already does this. Signed-off-by: Jordan Justen Patches 1-3: Reviewed-by: Nicolai Hähnle --- src/compiler/Android.glsl.mk | 3 +-- src/compiler/Make

Re: [Mesa-dev] [PATCH 15/17] main: Clear shader program data whenever ProgramBinary is called

Patches 10-15: Reviewed-by: Nicolai Hähnle On 09.11.2017 07:42, Jordan Justen wrote: The GL_ARB_get_program_binary extension spec says: "If ProgramBinary fails to load a binary, no error is generated, but any information about a previous link or load of that program object is lost."

Re: [Mesa-dev] [PATCH 16/17] util: Add Mesa ARB_get_program_binary helper functions

On 09.11.2017 07:42, Jordan Justen wrote: Signed-off-by: Jordan Justen --- src/util/Makefile.sources | 2 + src/util/meson.build | 2 + src/util/program_binary.c | 322 ++ src/util/program_binary.h | 91 + 4 files changed, 4

Re: [Mesa-dev] [PATCH 10/17] main: Allow non-zero NUM_PROGRAM_BINARY_FORMATS

On 11/09/2017 08:42 AM, Jordan Justen wrote: Signed-off-by: Jordan Justen --- src/mesa/main/get_hash_params.py | 2 +- src/mesa/main/mtypes.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py

[Mesa-dev] [PATCH 1/2] glsl/es: precision qualifier doesn't need to match in UBOs

Signed-off-by: Samuel Iglesias Gonsálvez --- src/compiler/glsl/link_interface_blocks.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/glsl/link_interface_blocks.cpp b/src/compiler/glsl/link_interface_blocks.cpp index 510d4f71bbe..c2c3b58f821 100644 --- a/src/c

[Mesa-dev] [PATCH 2/2] glsl: don't run intrastage array validation when the interface type is not an array

Signed-off-by: Samuel Iglesias Gonsálvez --- src/compiler/glsl/link_interface_blocks.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/glsl/link_interface_blocks.cpp b/src/compiler/glsl/link_interface_blocks.cpp index c2c3b58f821..ce90d916075 100644 --- a/src/c

Re: [Mesa-dev] [PATCH 1/2] glsl/es: precision qualifier doesn't need to match in UBOs

I forgot to add here that GLSL ES 320 requires precisions to match for default uniforms, but not for uniforms in UBOs. This spec change also affects OpenGL ES 3.1 and OpenGL ES 3.0. I fixed it locally. Sam On Thu, 2017-11-09 at 12:48 +0100, Samuel Iglesias Gonsálvez wrote: > Signed-off-by: Samue

Re: [Mesa-dev] [PATCH 4/6] radeonsi: pack r600_texture better

On 09.11.2017 04:15, Marek Olšák wrote: From: Marek Olšák 1752 -> 1736 bytes --- src/gallium/drivers/radeon/r600_pipe_common.h | 53 +-- 1 file changed, 26 insertions(+), 27 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/driver

Re: [Mesa-dev] [PATCH 6/6] radeonsi: remove has_cp_dma, has_streamout flags

On 09.11.2017 04:15, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeon/r600_buffer_common.c | 5 + src/gallium/drivers/radeon/r600_pipe_common.h | 2 -- src/gallium/drivers/radeonsi/si_pipe.c | 3 --- 3 files changed, 1 insertion(+), 9 deletions(-) diff --

Re: [Mesa-dev] [PATCH 03/17] compiler: Fold shader_cache in with libglsl sources

On 9 November 2017 at 06:42, Jordan Justen wrote: > It appears that we include the shader cache sources into libglsl > regardless. > > The Meson build already does this. > The separation is a left over as the files contained the disk cache implementation. That code now lives in src/util/disk_cache

Re: [Mesa-dev] [PATCH 7/6] radeonsi: don't call r600_can_dma_copy_buffer for DISCARD_RANGE

On 09.11.2017 04:21, Marek Olšák wrote: From: Marek Olšák we don't use dma_data in this codepath. Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_buffer_common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_buffer

Re: [Mesa-dev] [PATCH] r600/query: drop rest of vi workaround code.

On 09.11.2017 06:54, Dave Airlie wrote: From: Dave Airlie This isn't needed in r600 anymore. Signed-off-by: Dave Airlie Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/r600/r600_query.c | 46 ++- src/gallium/drivers/r600/r600_query.h | 4 --- 2 f

Re: [Mesa-dev] [PATCH 02/17] include/GL: Add GL_MESA_program_binary_formats

On 9 November 2017 at 06:42, Jordan Justen wrote: > Signed-off-by: Jordan Justen > --- > include/GL/gl.h | 8 > 1 file changed, 8 insertions(+) > > diff --git a/include/GL/gl.h b/include/GL/gl.h > index 5b284802885..6ae8088f6cb 100644 > --- a/include/GL/gl.h > +++ b/include/GL/gl.h > @@

Re: [Mesa-dev] [PATCH] mesa: replace GLenum with GLenum16 in common structures

>> struct gl_colorbuffer_attrib >> { >> GLuint ClearIndex; /**< Index for glClear */ >> union gl_color_union ClearColor;/**< Color for glClear, >> unclamped */ >> GLuint IndexMask; /**< Color index write mask >> */ >> GLubyt

Re: [Mesa-dev] [PATCH v2 07/26] winsys/amdgpu: handle cs_add_fence_dependency for deferred/unsubmitted fences

On 06.11.2017 19:21, Marek Olšák wrote: On Mon, Nov 6, 2017 at 11:23 AM, Nicolai Hähnle wrote: From: Nicolai Hähnle The idea is to fix the following interleaving of operations that can arise from deferred fences: Thread 1 / Context 1 Thread 2 / Context 2

Re: [Mesa-dev] [PATCH 16/17] util: Add Mesa ARB_get_program_binary helper functions

Hi Jordan, On 9 November 2017 at 06:42, Jordan Justen wrote: > Signed-off-by: Jordan Justen > --- > src/util/Makefile.sources | 2 + > src/util/meson.build | 2 + > src/util/program_binary.c | 322 > ++ > src/util/program_binary.h | 91

Re: [Mesa-dev] [PATCH v3] glsl/linker: location aliasing requires types to have the same width

On Tue, Nov 7, 2017 at 4:50 AM, Iago Toral Quiroga wrote: > Regarding location aliasing requirements, the OpenGL spec says: > > "Further, when location aliasing, the aliases sharing the location >must have the same underlying numerical type (floating-point or >integer)." > > Khronos has

[Mesa-dev] [PATCH 4/4] st/mesa: use asynchronous flushes for glFlush

From: Nicolai Hähnle Having the gallium driver thread flush in the background should be sufficient for glFlush semantics. Various end-of-frame flushes (from st_context_flush and st/dri) still use a synchronous flush. We should eventually be able to transition those to asynchronous flushes as wel

[Mesa-dev] [PATCH 0/4] st/mesa: use asynchronous flushes

Hi all, I've previously sent some of this series, but I'm splitting it up further for bisectability, plus the first patch is new. The idea here is to further reduce the amount of synchronization required with threaded gallium. Eventually, we should be able to eliminate synchronizations entirely

[Mesa-dev] [PATCH 3/4] st/mesa: use asynchronous flushes in st_finish

From: Nicolai Hähnle With threaded gallium, the driver may currently be running in another thread. In that case, we will execute all remaining commands in that thread instead of syncing, which should be better for cache locality. --- src/mesa/state_tracker/st_cb_flush.c | 2 +- 1 file changed, 1

[Mesa-dev] [PATCH 2/4] st/mesa: implement st_server_wait_sync properly

From: Nicolai Hähnle Asynchronous flushes require a proper implementation of st_server_wait_sync, because we could have the following with threaded Gallium: Context 1 app Context 1 driver Context 2 - - f = glFenceSync glFlush <--

[Mesa-dev] [PATCH 1/4] u_threaded_gallium: remove synchronization in fence_server_sync

From: Nicolai Hähnle The whole point of fence_server_sync is that it can be used to avoid waiting in the application thread. --- src/gallium/auxiliary/util/u_threaded_context.c | 14 +++--- src/gallium/auxiliary/util/u_threaded_context.h | 1 + src/gallium/auxiliary/util/u_t

Re: [Mesa-dev] [PATCH v3] glsl/linker: location aliasing requires types to have the same width

On Thu, 2017-11-09 at 08:41 -0500, Ilia Mirkin wrote: > On Tue, Nov 7, 2017 at 4:50 AM, Iago Toral Quiroga > wrote: > > Regarding location aliasing requirements, the OpenGL spec says: > > > >   "Further, when location aliasing, the aliases sharing the > > location > >    must have the same underl

Re: [Mesa-dev] [PATCH] anv/meson: Generate dev_icd.json

On Wednesday, 2017-11-08 13:40:13 -0800, Chad Versace wrote: > On Tue 07 Nov 2017, Dylan Baker wrote: > > Quoting Eric Engestrom (2017-11-07 07:25:53) > > > On Wednesday, 2017-11-01 13:49:03 -0700, Chad Versace wrote: > > > > I tested this in a setup where the builddir was outside of the srcdir. >

Re: [Mesa-dev] [PATCH 4/4] meson: Enable VC4's NEON assembly support.

On Wednesday, 2017-11-08 15:19:50 -0800, Eric Anholt wrote: > Dylan Baker writes: > > > [ Unknown signature status ] > > Quoting Eric Anholt (2017-11-08 14:14:57) > >> --- > >> meson.build | 5 +++-- > >> src/gallium/drivers/vc4/meson.build | 13 + > >> 2 fil

[Mesa-dev] [PATCH 0/3] docs/releasing: enhance the releasing documentation

Just some small updates on the releasing documentation. Andres Gomez (3): docs/releasing: drop custom LLVM_CONFIG if previously manually set docs/releasing: drop manually exported variables during smoke test docs/releasing: improve the pre-announce template and examples docs/releasing.html

[Mesa-dev] [PATCH 1/3] docs/releasing: drop custom LLVM_CONFIG if previously manually set

Cc: Emil Velikov Cc: Eric Engestrom Signed-off-by: Andres Gomez --- docs/releasing.html | 4 1 file changed, 4 insertions(+) diff --git a/docs/releasing.html b/docs/releasing.html index 66742b0bcb4..e588435e813 100644 --- a/docs/releasing.html +++ b/docs/releasing.html @@ -471,6 +471,10 @

[Mesa-dev] [PATCH 2/3] docs/releasing: drop manually exported variables during smoke test

Cc: Emil Velikov Cc: Eric Engestrom Signed-off-by: Andres Gomez --- docs/releasing.html | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/releasing.html b/docs/releasing.html index e588435e813..944b6e88bc1 100644 --- a/docs/releasing.html +++ b/docs/releasing.html @@ -504,8 +504,10 @@

[Mesa-dev] [PATCH 3/3] docs/releasing: improve the pre-announce template and examples

Cc: Emil Velikov Cc: Eric Engestrom Signed-off-by: Andres Gomez --- docs/releasing.html | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/docs/releasing.html b/docs/releasing.html index 944b6e88bc1..40cbe232014 100644 --- a/docs/releasing.html +++ b/docs/releas

[Mesa-dev] [Bug 102665] test_glsl_to_tgsi_lifetime.cpp:53:67: error: ‘?=>>=?UTF-8?Q?’ should be ‘?=> >=?UTF-8?Q?’ within a nested template argument list

https://bugs.freedesktop.org/show_bug.cgi?id=102665 Emil Velikov changed: What|Removed |Added Resolution|--- |FIXED Status|REOPENED

[Mesa-dev] [PATCH] i965: disable BLORP color clears for gen 4-5

From: Emil Velikov Using the codepath leads to a crashes in MPV's fullscreen mode. Disable temporarily, until we can investigate and address properly. Cc: Adesh Cc: Jason Ekstrand Cc: Dylan Baker Cc: Mark Janes Fixes: 79f2a5541f9 ("i965: Use BLORP for color clears on gen4-5") Bugzilla: https

[Mesa-dev] [PATCH] i965: implement (un)mapImage

v2: add early return if (flag & MAP_INTERNAL_MASK) v3: take input rect into account and test with kmscube and piglit. Already implemented for Gallium drivers. Useful for gbm_bo_(un)map. Tests: By porting wayland/weston/clients/simple-dmabuf-drm.c to GBM. kmscube --mode=rgba kmscube --mode=

Re: [Mesa-dev] [PATCH] r600/query: drop rest of vi workaround code.

Reviewed-by: Roland Scheidegger Am 09.11.2017 um 06:54 schrieb Dave Airlie: > From: Dave Airlie > > This isn't needed in r600 anymore. > > Signed-off-by: Dave Airlie > --- > src/gallium/drivers/r600/r600_query.c | 46 > ++- > src/gallium/drivers/r600/r600_que

Re: [Mesa-dev] [PATCH] i965: implement (un)mapImage

Quoting Julien Isorce (2017-11-09 15:30:23) > v2: add early return if (flag & MAP_INTERNAL_MASK) > v3: take input rect into account and test with kmscube and piglit. > > Already implemented for Gallium drivers. > > Useful for gbm_bo_(un)map. > > Tests: > By porting wayland/weston/clients/simpl

Re: [Mesa-dev] [PATCH] i965: implement (un)mapImage

Hi Emil, Thx for the suggestion about kmscube and piglit. I tried them and I have sent a v3 patch. Hi Chris, I can see that in Ben's patch it calls brw_bo_unreference instead of brw_bo_unmap. Also the existing brw_bo_unmap is a no op (strange it is implemented as just return 0) Any idea ? Thx J

Re: [Mesa-dev] [PATCH 3/3] docs/releasing: improve the pre-announce template and examples

On 9 November 2017 at 14:58, Andres Gomez wrote: > Cc: Emil Velikov > Cc: Eric Engestrom > Signed-off-by: Andres Gomez > --- > docs/releasing.html | 14 +++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/docs/releasing.html b/docs/releasing.html > index 944b6e88

Re: [Mesa-dev] [PATCH 16/17] util: Add Mesa ARB_get_program_binary helper functions

On 09/11/17 13:19, Emil Velikov wrote: Hi Jordan, On 9 November 2017 at 06:42, Jordan Justen wrote: Signed-off-by: Jordan Justen --- src/util/Makefile.sources | 2 + src/util/meson.build | 2 + src/util/program_binary.c | 322 ++ src/u

Re: [Mesa-dev] [PATCH 0/3] docs/releasing: enhance the releasing documentation

On Thursday, 2017-11-09 16:58:20 +0200, Andres Gomez wrote: > Just some small updates on the releasing documentation. Reviewed-by: Eric Engestrom > > Andres Gomez (3): > docs/releasing: drop custom LLVM_CONFIG if previously manually set > docs/releasing: drop manually exported variables dur

[Mesa-dev] [PATCH] radeonsi: remove has_cp_dma, has_streamout flags (v2)

From: Marek Olšák v2: remove r600_can_dma_copy_buffer --- src/gallium/drivers/radeon/r600_buffer_common.c | 17 ++--- src/gallium/drivers/radeon/r600_pipe_common.h | 2 -- src/gallium/drivers/radeonsi/si_pipe.c | 3 --- 3 files changed, 2 insertions(+), 20 deletions(-)

Re: [Mesa-dev] [PATCH] egl: EXT_pixel_format_float plumbing

On Thu, 2017-11-09 at 09:40 +0200, Tapani Pälli wrote: > Patch adds support and capability to match with new surface attribute, > component type. Currently no configs with floating point type are exposed. > > With this change, following dEQP test starts to pass: > >dEQP-EGL.functional.choose_

Re: [Mesa-dev] [PATCH 5/9] st/mesa: start adding support for hw atomics atom. (v2)

On Thu, Nov 9, 2017 at 2:54 AM, Dave Airlie wrote: > From: Dave Airlie > > This adds a new atom that calls the new driver API to > bind buffers containing hw atomics. > > v2: fixup bindings for sparse buffers. (mareko/nha) > don't bind buffer atomics when hw atomics are enabled. > use NewAtomicBu

[Mesa-dev] [PATCH] threads: fix MinGW build breakage

Fixes: f1a364878431c8 ("threads: update for late C11 changes") --- include/c11/threads_win32.h | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/c11/threads_win32.h b/include/c11/threads_win32.h index 77d923a..dac8ef7 100644 --- a/include/c11/threads_win32.h +++ b/inc

[Mesa-dev] [Bug 103586] OpenCL/Clover: AMD Turks: corrupt output buffer (depending on dimension order?)

https://bugs.freedesktop.org/show_bug.cgi?id=103586 --- Comment #11 from Jan Vesely --- (In reply to Dave Gilbert from comment #10) > I believe I'm still seeing this: > > dg@hath:~/ocl2$ clinfo > Number of platforms 1 > Platform Name

Re: [Mesa-dev] [PATCH 10/18] radeon/vcn: add encode header implementations

On 08/11/17 18:08, boyuan.zh...@amd.com wrote: > From: Boyuan Zhang > > Implement encoding of sps, pps, and silce headers using the newly added h.264 > header coding descriptors functions based on h.264 specs. > > Signed-off-by: Boyuan Zhang > --- > src/gallium/drivers/radeon/radeon_vcn_enc_1_

[Mesa-dev] [PATCH] radv: do not wait for idle when SURFACE_SYNC is emitted

Copied from RadeonSI. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/si_cmd_buffer.c | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 89ee399817..f5c04c07a8 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH] i965: implement (un)mapImage

v2: add early return if (flag & MAP_INTERNAL_MASK) v3: take input rect into account and test with kmscube and piglit. v4: handle wraparound and bo reference. Already implemented for Gallium drivers. Useful for gbm_bo_(un)map. Tests: By porting wayland/weston/clients/simple-dmabuf-drm.c to GBM.

Re: [Mesa-dev] [PATCH] egl: EXT_pixel_format_float plumbing

On Thursday, 2017-11-09 09:40:43 +0200, Tapani Pälli wrote: > Patch adds support and capability to match with new surface attribute, > component type. Currently no configs with floating point type are exposed. Have you tested android O with this patch? I think it might fail to start, as it require

Re: [Mesa-dev] [PATCH] i965: implement (un)mapImage

On Thursday, 2017-11-09 17:03:13 +, Julien Isorce wrote: > v2: add early return if (flag & MAP_INTERNAL_MASK) > v3: take input rect into account and test with kmscube and piglit. > v4: handle wraparound and bo reference. > > Already implemented for Gallium drivers. > > Useful for gbm_bo_(un)m

Re: [Mesa-dev] [PATCH 3/3] etnaviv: Add sampler TS support

Hi Wladimir! Am Mittwoch, den 08.11.2017, 03:41 +0100 schrieb Wladimir: > > +/* Return true if a resource has a TS, and it is valid for at least one > > level */ > > +static bool > > +etna_resource_has_valid_ts(struct pipe_resource *prsc) > > +{ > > +   struct etna_resource *rsc = etna_resource(p

Re: [Mesa-dev] [PATCH 10/18] radeon/vcn: add encode header implementations

Am 09.11.2017 um 17:57 schrieb Mark Thompson: On 08/11/17 18:08, boyuan.zh...@amd.com wrote: From: Boyuan Zhang Implement encoding of sps, pps, and silce headers using the newly added h.264 header coding descriptors functions based on h.264 specs. Signed-off-by: Boyuan Zhang --- src/galliu

Re: [Mesa-dev] [PATCH 1/4] r600: use min_dx10/max_dx10 instead of min/max

On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: > From: Roland Scheidegger > > I believe this is the safe thing to do, especially ever since the driver > actually generates NaNs for muls too. > Albeit since the radeon ISA docs are inaccurate/wrong there, I'm not > entirely sure what

Re: [Mesa-dev] [PATCH] radv: do not wait for idle when SURFACE_SYNC is emitted

Nack. We had that and Andres removed it due to high priority interactions. On 9 Nov 2017 18:01, "Samuel Pitoiset" wrote: Copied from RadeonSI. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/si_cmd_buffer.c | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --gi

Re: [Mesa-dev] [PATCH] i965: disable BLORP color clears for gen 4-5

This is a really rubbish solution. Yes, it fixes a crash in MPV but unless we disable all blorp on gen4-5 (which I don't think is possible anymore), we haven't actually fixed it for real. On Thu, Nov 9, 2017 at 7:21 AM, Emil Velikov wrote: > From: Emil Velikov > > Using the codepath leads to a

Re: [Mesa-dev] [PATCH 1/4] r600: use min_dx10/max_dx10 instead of min/max

Am 09.11.2017 um 18:19 schrieb Jan Vesely: > On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: >> From: Roland Scheidegger >> >> I believe this is the safe thing to do, especially ever since the driver >> actually generates NaNs for muls too. >> Albeit since the radeon ISA docs are inac

Re: [Mesa-dev] [PATCH 3/4] r600: use ieee version of rcp

On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: > From: Roland Scheidegger > > r600 used the clamped version for rcp, whereas both evergreen and cayman > used the ieee version. I don't know why that discrepancy exists (it does so > since day 1) but there does not seem to be a valid r

Re: [Mesa-dev] [PATCH 1/4] r600: use min_dx10/max_dx10 instead of min/max

On Thu, 2017-11-09 at 18:26 +0100, Roland Scheidegger wrote: > Am 09.11.2017 um 18:19 schrieb Jan Vesely: > > On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: > > > From: Roland Scheidegger > > > > > > I believe this is the safe thing to do, especially ever since the driver > > > actu

Re: [Mesa-dev] [PATCH] radv: do not wait for idle when SURFACE_SYNC is emitted

On 11/09/2017 06:22 PM, Bas Nieuwenhuizen wrote: Nack. We had that and Andres removed it due to high priority interactions. Ah right, missed that. On 9 Nov 2017 18:01, "Samuel Pitoiset" > wrote: Copied from RadeonSI. Signed-off-by: Samuel Pitois

Re: [Mesa-dev] [PATCH 3/4] r600: use ieee version of rcp

On Thu, Nov 9, 2017 at 12:27 PM, Jan Vesely wrote: > On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: >> From: Roland Scheidegger >> >> r600 used the clamped version for rcp, whereas both evergreen and cayman >> used the ieee version. I don't know why that discrepancy exists (it does

Re: [Mesa-dev] [PATCH 2/4] r600: use mysterious DX10_CLAMP bit in pixel shader setup

On Thu, 2017-11-09 at 09:13 +0100, Nicolai Hähnle wrote: > The internal docs are pretty much the same (i.e. confusing and > non-explicit), but my layman's reading of the RTL is that DX10_CLAMP > only affects clamping. So if you have a > >v_mul_f32 0, inf This is a GCN instruction. does it a

Re: [Mesa-dev] [PATCH 2/4] r600: use mysterious DX10_CLAMP bit in pixel shader setup

On 09.11.2017 18:37, Jan Vesely wrote: On Thu, 2017-11-09 at 09:13 +0100, Nicolai Hähnle wrote: The internal docs are pretty much the same (i.e. confusing and non-explicit), but my layman's reading of the RTL is that DX10_CLAMP only affects clamping. So if you have a v_mul_f32 0, inf This

Re: [Mesa-dev] [PATCH 1/4] r600: use min_dx10/max_dx10 instead of min/max

On 09.11.2017 18:26, Roland Scheidegger wrote: Am 09.11.2017 um 18:19 schrieb Jan Vesely: On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: From: Roland Scheidegger I believe this is the safe thing to do, especially ever since the driver actually generates NaNs for muls too. Albeit

Re: [Mesa-dev] [PATCH] i965: disable BLORP color clears for gen 4-5

On 9 November 2017 at 17:23, Jason Ekstrand wrote: > This is a really rubbish solution. Yes, it fixes a crash in MPV but unless > we disable all blorp on gen4-5 (which I don't think is possible anymore), we > haven't actually fixed it for real. > Fully agreed - it is nasty. Skimming through the

Re: [Mesa-dev] [PATCH 1/4] r600: use min_dx10/max_dx10 instead of min/max

On Thu, 2017-11-09 at 18:39 +0100, Nicolai Hähnle wrote: > On 09.11.2017 18:26, Roland Scheidegger wrote: > > Am 09.11.2017 um 18:19 schrieb Jan Vesely: > > > On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: > > > > From: Roland Scheidegger > > > > > > > > I believe this is the safe t

Re: [Mesa-dev] [PATCH 1/4] r600: use min_dx10/max_dx10 instead of min/max

Am 09.11.2017 um 18:43 schrieb Jan Vesely: > On Thu, 2017-11-09 at 18:39 +0100, Nicolai Hähnle wrote: >> On 09.11.2017 18:26, Roland Scheidegger wrote: >>> Am 09.11.2017 um 18:19 schrieb Jan Vesely: On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: > From: Roland Scheidegger >>

Re: [Mesa-dev] [PATCH 3/4] r600: use ieee version of rcp

Am 09.11.2017 um 18:27 schrieb Jan Vesely: > On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: >> From: Roland Scheidegger >> >> r600 used the clamped version for rcp, whereas both evergreen and cayman >> used the ieee version. I don't know why that discrepancy exists (it does so >> sin

Re: [Mesa-dev] [PATCH 3/4] r600: use ieee version of rcp

Am 09.11.2017 um 18:58 schrieb Roland Scheidegger: > Am 09.11.2017 um 18:27 schrieb Jan Vesely: >> On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: >>> From: Roland Scheidegger >>> >>> r600 used the clamped version for rcp, whereas both evergreen and cayman >>> used the ieee version. I

Re: [Mesa-dev] [PATCH] threads: fix MinGW build breakage

Looks alright to me. Reviewed-by: Roland Scheidegger Am 09.11.2017 um 17:46 schrieb Brian Paul: > Fixes: f1a364878431c8 ("threads: update for late C11 changes") > --- > include/c11/threads_win32.h | 5 - > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/include/c11/threads_

[Mesa-dev] [PATCH 2/5] r600: use DX10_CLAMP bit in shader setup

From: Roland Scheidegger The docs are not very concise in what this really does, however both Alex Deucher and Nicolai Hähnle suggested this only really affects instructions using the CLAMP output modifier, and I've confirmed that with the newly changed piglit isinf_and_isnan test. So, with this

[Mesa-dev] [PATCH 1/5] r600: use min_dx10/max_dx10 instead of min/max

From: Roland Scheidegger I believe this is the safe thing to do, especially ever since the driver actually generates NaNs for muls too. The ISA docs are not very helpful here, however the dx10 versions will pick a non-nan result over a NaN one (this is also the ieee754 behavior), whereas the non-

[Mesa-dev] [PATCH 5/5] r600: set the number type correctly for float rts in cb setup

From: Roland Scheidegger Float rts were always set as unorm instead of float. Not sure of the consequences, but at least it looks like the blend clamp would have been enabled, which is against the rules (only eg really bothered to even attempt to specify this correctly, r600 always used clamp any

[Mesa-dev] [PATCH 4/5] r600: use ieee version of rsq

From: Roland Scheidegger Both r600 and evergreen used the clamped version, whereas cayman used the ieee one. I don't think there's a valid reason for this discrepancy, so let's switch to the ieee version for r600 and evergreen too, since we generally want to stick to ieee arithmetic. With this, b

[Mesa-dev] [PATCH 3/5] r600: use ieee version of rcp

From: Roland Scheidegger r600 used the clamped version for rcp, whereas both evergreen and cayman used the ieee version. I don't know why that discrepancy exists (it does so since day 1) but there does not seem to be a valid reason for this, so make it consistent. This seems now safer than before

Re: [Mesa-dev] [PATCH] radv: do not wait for idle when SURFACE_SYNC is emitted

What high priority interactions? Marek On Thu, Nov 9, 2017 at 6:22 PM, Bas Nieuwenhuizen wrote: > Nack. We had that and Andres removed it due to high priority interactions. > > > On 9 Nov 2017 18:01, "Samuel Pitoiset" wrote: > > Copied from RadeonSI. > > Signed-off-by: Samuel Pitoiset > --- >

Re: [Mesa-dev] [PATCH v2 07/26] winsys/amdgpu: handle cs_add_fence_dependency for deferred/unsubmitted fences

FYI, this breaks: piglit/bin/bufferstorage-persistent read -auto and a bunch of others. Marek On Mon, Nov 6, 2017 at 11:23 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > The idea is to fix the following interleaving of operations > that can arise from deferred fences: > > Thread 1 / Co

Re: [Mesa-dev] [PATCH 2/3] intel/fs: Don't let undefined values prevent copy propagation.

Reviewed-by: Jason Ekstrand On Fri, Oct 27, 2017 at 5:05 PM, Francisco Jerez wrote: > This makes the dataflow propagation logic of the copy propagation pass > more intelligent in cases where the destination of a copy is known to > be undefined for some incoming CFG edges, building upon the > de

[Mesa-dev] [PATCH 1/2] anv/gen10: Implement WaSampleOffsetIZ workaround

We already have this workaround in OpenGL driver. See Mesa commit 3cf4fe2219. Signed-off-by: Anuj Phogat Cc: Nanley Chery Cc: Rafael Antognolli --- src/intel/vulkan/genX_state.c | 61 +++ 1 file changed, 61 insertions(+) diff --git a/src/intel/vulkan/ge

[Mesa-dev] [PATCH] st/dri: fix android fence regression

From: Marek Olšák Fixes piglit - egl_khr_fence_sync/android_native tests. Broken by 884a0b2a9e55d4c1ca39475b50d9af598d7d7280. --- src/gallium/include/state_tracker/st_api.h | 2 ++ src/gallium/state_trackers/dri/dri_helpers.c | 2 +- src/mesa/state_tracker/st_manager.c | 7 +-- 3

[Mesa-dev] [PATCH 2/2] anv/gen10: Enable float blend optimization

On CNL this bit has been moved to CACHE_MODE_SS register. We already have this enabled in OpenGL driver. See Mesa commit 6c681b4cc1 Signed-off-by: Anuj Phogat Cc: Nanley Chery Cc: Rafael Antognolli --- src/intel/genxml/gen10.xml| 12 src/intel/vulkan/genX_state.c | 12

Re: [Mesa-dev] [PATCH] i965: Pretend there are 4 subslices for compute shader threads on Gen9+.

On Thu, Nov 09, 2017 at 12:59:12AM -0800, Jordan Justen wrote: > Reviewed-by: Jordan Justen It's also Tested-by: Rafael Antognolli > On 2017-11-08 10:56:00, Kenneth Graunke wrote: > > Similar to what we did for pixel shader threads - see gen_device_info.c. > > > > We don't want to bump the ac

Re: [Mesa-dev] [PATCH] radv: do not wait for idle when SURFACE_SYNC is emitted

IIRC if we wait using SURFACE_SYNC other waits in other rings seemed to sometimes get insanely long, almost like it got stuck behind it. However, the shader waits don't have this issue. On Thu, Nov 9, 2017 at 8:00 PM, Marek Olšák wrote: > What high priority interactions? > > Marek > > On Thu, Nov

[Mesa-dev] [PATCH 2/3] mesa: s/GLint/gl_buffer_index/ for _ColorReadBufferIndex

BUFFER_NONE is -1 so no reason for GLint. --- src/mesa/main/mtypes.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index af9115e..a8e2b39 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -3484,7 +3484,7 @@ str

[Mesa-dev] [PATCH] st/mesa: remove 'struct' keyword on function parameter

st_src_reg is a class, not a struct. Simply remove 'struct' to silence a MSVC compiler warning (class vs. struct mismatch). --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/s

[Mesa-dev] [PATCH 3/3] mesa: s/GLint/gl_buffer_index/ for _ColorDrawBufferIndexes

Also fix local variable declarations and replace -1 with BUFFER_NONE. No Piglit changes. --- src/mesa/drivers/common/meta.c | 2 +- src/mesa/main/buffers.c | 16 src/mesa/main/clear.c| 9 + src/mesa/main/framebuffer.c | 4 ++--

[Mesa-dev] [PATCH 1/3] mesa: minor reformatting, add const to gl_external_samplers()

This function should probably be moved elsewhere, too. --- src/mesa/main/mtypes.h | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index d092630..af9115e 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -2532

[Mesa-dev] [PATCH] mesa/st/nir: assign driver_location for images

Signed-off-by: Rob Clark --- src/mesa/state_tracker/st_glsl_to_nir.cpp | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp index e9a8d6414e7..b748e13de1b 100644 --- a/src/mesa/state_trac

Re: [Mesa-dev] [PATCH] swr: Fixed an uncommon freed-memory access during state validation

Looks good.. Reviewed-By: George Kyriazis mailto:george.kyria...@intel.com>> On Nov 8, 2017, at 6:39 PM, Bruce Cherniak mailto:bruce.chern...@intel.com>> wrote: State validation is performed during clear and draw calls. Validation during clear was still accessing vertex buffer state. When th

Re: [Mesa-dev] [PATCH 3/3] mesa: s/GLint/gl_buffer_index/ for _ColorDrawBufferIndexes

For this series, Reviewed-by: Charmaine Lee From: Brian Paul Sent: Thursday, November 9, 2017 11:31:42 AM To: mesa-dev@lists.freedesktop.org Cc: Charmaine Lee Subject: [PATCH 3/3] mesa: s/GLint/gl_buffer_index/ for _ColorDrawBufferIndexes Also fix local

Re: [Mesa-dev] [PATCH 1/3] i965: Make a better helper function for UBO/SSBO/ABO surface handling.

On Thu, Nov 9, 2017 at 12:45 AM, Kenneth Graunke wrote: > This fixes the missing AutomaticSize handling in the ABO code, removes > a bunch of duplicated code, and drops an extra layer of wrapping around > brw_emit_buffer_surface_state(). > --- > src/mesa/drivers/dri/i965/brw_context.h |

Re: [Mesa-dev] [PATCH 3/3] i965: Fold ABO state upload code into the SSBO/UBO state upload code.

On Thu, Nov 9, 2017 at 12:45 AM, Kenneth Graunke wrote: > Having this separate could potentially make programs that rebind atomics > but no other surfaces ever so slightly faster. But it's a tiny amount > of code to add to the existing UBO/SSBO atom, and very related. > > The extra atoms have a

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