Re: [Mesa-dev] [PATCH] Replace byte-swapping code with builtins in pack.c

Am 04.10.2017 um 05:59 schrieb Matt Turner: On Tue, Oct 3, 2017 at 11:01 AM, Jochen Rollwagen wrote: From 4cebe50a9bade6717923e104c954f3fad75f71bb Mon Sep 17 00:00:00 2001 From: Jochen Rollwagen Date: Tue, 3 Oct 2017 19:54:10 +0200 Subject: [PATCH] Replace byte-swapping code with builtins in

Re: [Mesa-dev] [PATCH] Replace byte-swapping code with builtins in pack.c

On Thu, Oct 5, 2017 at 8:59 PM, Jochen Rollwagen wrote: > Am 04.10.2017 um 05:59 schrieb Matt Turner: >> >> On Tue, Oct 3, 2017 at 11:01 AM, Jochen Rollwagen >> wrote: >>> >>> From 4cebe50a9bade6717923e104c954f3fad75f71bb Mon Sep 17 00:00:00 2001 >>> From: Jochen Rollwagen >>> Date: Tue, 3 Oct

[Mesa-dev] [PATCH 2/3] radv: do not need to zero-init ds/raster states

Already done when creating the pipeline. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 5da27935c2..cc33fbc96d 100644 --- a/src/amd/vulkan/radv_pipeline.

[Mesa-dev] [PATCH 1/3] radv: remove unused fields in radv_raster_state

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_private.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index fa1475aeb9..adeaa6d443 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1010

[Mesa-dev] [PATCH 3/3] radv: configure VGT_VERTEX_REUSE at pipeline creation

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 18 -- src/amd/vulkan/radv_pipeline.c | 7 +++ src/amd/vulkan/radv_private.h| 1 + 3 files changed, 16 insertions(+), 10 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/r

[Mesa-dev] [Bug 103122] 17.1 and 17.2 glsl/tests/cache-test regression. 17.0.6 works.

https://bugs.freedesktop.org/show_bug.cgi?id=103122 Bug ID: 103122 Summary: 17.1 and 17.2 glsl/tests/cache-test regression. 17.0.6 works. Product: Mesa Version: 17.2 Hardware: x86-64 (AMD64) OS: Linux (All)

[Mesa-dev] [Bug 103122] 17.1 and 17.2 glsl/tests/cache-test regression. 17.0.6 works.

https://bugs.freedesktop.org/show_bug.cgi?id=103122 --- Comment #1 from hagbardce...@gmail.com --- Created attachment 134701 --> https://bugs.freedesktop.org/attachment.cgi?id=134701&action=edit Full emerge log of 17.2.2 from gentoo -- You are receiving this mail because: You are the assignee

Re: [Mesa-dev] [PATCH] ac/nir: use llvm fma intrinsic if nir instruction is exact.

On 6 October 2017 at 03:39, Dave Airlie wrote: > On 6 October 2017 at 12:31, Marek Olšák wrote: > > On Fri, Oct 6, 2017 at 4:10 AM, Connor Abbott > wrote: > >> On Thu, Oct 5, 2017 at 10:08 PM, Marek Olšák wrote: > >>> On Fri, Oct 6, 2017 at 3:50 AM, Connor Abbott > wrote: > Why? While it

[Mesa-dev] [PATCH 3/4] spirv: add sampler and image variable support when handling texture opcodes

From: Samuel Iglesias Gonsalvez Signed-off-by: Samuel Iglesias Gonsalvez --- src/compiler/spirv/spirv_to_nir.c | 58 +++ 1 file changed, 47 insertions(+), 11 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c ind

[Mesa-dev] [PATCH 4/4] spirv: add support for image variables for image opcodes

From: Samuel Iglesias Gonsalvez Signed-off-by: Samuel Iglesias Gonsalvez --- src/compiler/spirv/spirv_to_nir.c | 27 ++- 1 file changed, 22 insertions(+), 5 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index cf7617454d

[Mesa-dev] [PATCH 1/4] i965/fs: some TXF don't provide LOD

SpvOpImageFetch doesn't provide it, so set it to zero. Signed-off-by: Samuel Iglesias Gonsálvez --- src/intel/compiler/brw_fs_nir.cpp | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 5b8ccd50

[Mesa-dev] [PATCH 2/4] spirv: Add support for fuction arguments of type image and sampler

These arguments are actually variables, not pointers. This is allowed by SPIR-V spec but the support was missing. Signed-off-by: Samuel Iglesias Gonsálvez --- src/compiler/spirv/vtn_cfg.c | 13 + src/compiler/spirv/vtn_private.h | 5 + 2 files changed, 18 insertions(+) diff

Re: [Mesa-dev] [PATCH v2] vc4: Mark BOs as purgeable when they enter the BO cache

On Thu, 05 Oct 2017 11:25:46 -0700 Eric Anholt wrote: > Boris Brezillon writes: > > > This patch makes use of the DRM_IOCTL_VC4_GEM_MADVISE ioctl to mark all > > BOs placed in the mesa BO cache as purgeable so that the system can > > reclaim this memory under memory pressure. > > > > Signed-off

Re: [Mesa-dev] [PATCH 3/4] spirv: add sampler and image variable support when handling texture opcodes

On Fri, 2017-10-06 at 11:36 +0200, Samuel Iglesias Gonsálvez wrote: > From: Samuel Iglesias Gonsalvez > > Signed-off-by: Samuel Iglesias Gonsalvez This patch and the following should be signed off by my Igalia email. Fixed locally. Sam > --- > src/compiler/spirv/spirv_to_nir.c | 58 > +++

Re: [Mesa-dev] [PATCH] Replace byte-swapping code with builtins in pack.c

On 05.10.2017 20:59, Jochen Rollwagen wrote: Am 04.10.2017 um 05:59 schrieb Matt Turner: On Tue, Oct 3, 2017 at 11:01 AM, Jochen Rollwagen wrote:  From 4cebe50a9bade6717923e104c954f3fad75f71bb Mon Sep 17 00:00:00 2001 From: Jochen Rollwagen Date: Tue, 3 Oct 2017 19:54:10 +0200 Subject: [PATCH

Re: [Mesa-dev] [PATCH v2 05/12] meson: de-tabularize meson_options.txt

Hi, On 05.10.2017 20:12, Dylan Baker wrote: This ends up being unworkable as more options get added, and with description wrapped onto a new line it doesn't improve readability anyway. Signed-off-by: Dylan Baker --- meson_options.txt | 12 ++-- 1 file changed, 6 insertions(+), 6 del

[Mesa-dev] [PATCH 1/6] radv: allow to skip descriptors flush when binding a pipeline

When a meta operation doesn't use any descriptors, we don't need to flush them. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 31 +-- src/amd/vulkan/radv_private.h| 9 + 2 files changed, 30 insertions(+), 10 deletions(-) diff --gi

[Mesa-dev] [PATCH 2/6] radv: skip descriptors flush when restoring meta pipelines

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta.c | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c index 3f57618ad2..d12797a76c 100644 --- a/src/amd/vulkan/radv_meta.c +++ b/src/amd/vulkan/radv_

[Mesa-dev] [PATCH 3/6] radv: skip descriptors flush for some meta operations

It would be better to rely on RADV_META_SAVE_DESCRIPTORS but we can't really do it for now. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_clear.c | 10 ++ src/amd/vulkan/radv_meta_decompress.c | 5 +++-- src/amd/vulkan/radv_meta_fast_clear.c | 5 +++-- src/amd/vulkan

[Mesa-dev] [PATCH 6/6] radv: skip constants upload for some meta operations

This is actually a no-op but I think it improves consistency with the RADV_BIND_PIPELINE_SKIP_DESCRIPTORS flag. It would be better to rely on RADV_META_SAVE_CONSTANTS but we can't really do it for now. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_buffer.c | 6 +++--- src/amd/

[Mesa-dev] [PATCH 5/6] radv: skip constants upload when restoring meta pipelines

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c index d12797a76c..43d32263f3 100644 --- a/src/amd/vulkan/radv_meta.c +++ b/src/amd/vulkan/radv_meta.c @@ -98,6 +98,8 @@ radv_

[Mesa-dev] [PATCH 4/6] radv: allow to skip constants upload when binding a pipeline

When a meta operation doesn't use any constants, we don't need to re-upload them. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 8 ++-- src/amd/vulkan/radv_private.h| 1 + 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffe

Re: [Mesa-dev] [PATCH v2 06/12] meson: Build i965 and dri stack

Hi, On 5 October 2017 at 18:12, Dylan Baker wrote: > This gets pretty much the entire classic tree building, as well as > i965, including the various glapis. There are some workarounds for bugs > that are fixed in meson 0.43.0, which is due out on October 8th. I'm not really sure what prompt you

Re: [Mesa-dev] [PATCH v2 09/12] meson: build gbm

Hi, On 5 October 2017 at 22:22, Dylan Baker wrote: > Quoting Eric Anholt (2017-10-05 12:43:47) >> Dylan Baker writes: >> > +install_headers('main/gbm.h') >> > + >> > +pkg.generate( >> > + name : 'gbm', >> > + filebase : 'gbm', >> > + description : 'Mesa gbm library', >> > + version : meson.p

Re: [Mesa-dev] [PATCH 1/4] i965/fs: some TXF don't provide LOD

Is there a test case for this? Reviewed-by: Jason Ekstrand On Fri, Oct 6, 2017 at 2:36 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > SpvOpImageFetch doesn't provide it, so set it to zero. > > Signed-off-by: Samuel Iglesias Gonsálvez > --- > src/intel/compiler/brw_fs_nir.cpp |

Re: [Mesa-dev] [PATCH 2/4] spirv: Add support for fuction arguments of type image and sampler

On Fri, Oct 6, 2017 at 2:36 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > These arguments are actually variables, not pointers. This is allowed > by SPIR-V spec but the support was missing. > In SPIR-V, even OpVariable returns a pointer. I think you could probably save yourself

Re: [Mesa-dev] [PATCH 1/4] i965/fs: some TXF don't provide LOD

I fixed a similar bug in the vec4 backend a couple of days ago. Can we maybe put this logic somewhere that could reused across backends? Or maybe a nir pass to add the missing parameters? Thanks, - Lionel On 06/10/17 14:07, Jason Ekstrand wrote: Is there a test case for this? Reviewed-by: Jas

Re: [Mesa-dev] [PATCH] spirv: Don't warn on the ImageCubeArray capability

Reviewed-by: Lionel Landwerlin On 06/10/17 04:47, Jason Ekstrand wrote: --- src/compiler/spirv/spirv_to_nir.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index a2538d6..5dccbf6 100644 --- a/src/com

Re: [Mesa-dev] [PATCH 2/4] spirv: Add support for fuction arguments of type image and sampler

On Fri, 2017-10-06 at 06:22 -0700, Jason Ekstrand wrote: > On Fri, Oct 6, 2017 at 2:36 AM, Samuel Iglesias Gonsálvez igalia.com> wrote: > > These arguments are actually variables, not pointers. This is > > allowed > > by SPIR-V spec but the support was missing. > > In SPIR-V, even OpVariable retu

[Mesa-dev] [PATCH v5 02/16] isl: make format layout channels accessible by index

Signed-off-by: Lionel Landwerlin Reviewed-by: Chad Versace Reviewed-by: Jason Ekstrand --- src/intel/isl/isl.h | 21 - 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index df275f85c49..98de4c0f57f 100644 --- a/src/int

[Mesa-dev] [PATCH v5 03/16] isl: check whether a format is rgb if colorspace is yuv

Suggested by Chad. Signed-off-by: Lionel Landwerlin Reviewed-by: Jason Ekstrand --- src/intel/isl/isl.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 98de4c0f57f..e3acb0ec280 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -1

[Mesa-dev] [PATCH v5 01/16] vulkan: util: add macros to extract extension/offset number from enums

v2: Simplify offset enum computation (Jason) v3: capitalize macros (Chad) Signed-off-by: Lionel Landwerlin Reviewed-by: Jason Ekstrand --- src/vulkan/util/vk_util.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/vulkan/util/vk_util.h b/src/vulkan/util/vk_util.h index 2ed601f881e

[Mesa-dev] [PATCH v5 00/16] anv: implement KHR_sampler_ycbcr_conversion

Hi, Update with some refactoring from Jason that make the mapping of AspectMasks to plane a bit cleaner. Cheers, Jason Ekstrand (4): anv/blorp: Add a concept of default aux usage anv/cmd_buffer: Make get_fast_clear_state return an address anv: Take a single aspect in anv_layout_to_aux_usag

[Mesa-dev] [PATCH v5 07/16] anv: add new formats KHR_sampler_ycbcr_conversion

Adding new downsampling factors for each planes. Signed-off-by: Lionel Landwerlin Reviewed-by: Jason Ekstrand --- src/intel/vulkan/anv_formats.c| 158 -- src/intel/vulkan/anv_private.h| 10 +++ src/intel/vulkan/vk_format_info.h | 27 +++ 3 files

[Mesa-dev] [PATCH v5 04/16] isl: fill out layout descriptions for yuv formats

Some description was missing. Signed-off-by: Lionel Landwerlin Reviewed-by: Jason Ekstrand --- src/intel/isl/isl_format_layout.csv | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/intel/isl/isl_format_layout.csv b/src/intel/isl/isl_format_layout.csv index f340e30

[Mesa-dev] [PATCH v5 05/16] anv: prepare formats to handle disjoints sets

Newer format enums start at offset 10, making it impossible to have them all in one table. This change splits the formats into sets that we then access through indirection. v2: rename format_extract to vk_to_anv_format (Chad/Jason) Signed-off-by: Lionel Landwerlin Reviewed-by: Jason Ekst

[Mesa-dev] [PATCH v5 08/16] anv/apply_pipeline_layout: Prepare for multi-planar images

Signed-off-by: Lionel Landwerlin Reviewed-by: Jason Ekstrand --- src/intel/vulkan/anv_descriptor_set.c| 13 +++ src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 113 ++- src/intel/vulkan/anv_private.h | 7 ++ src/intel/vulkan/genX_state.c

[Mesa-dev] [PATCH v5 06/16] anv: modify the internal concept of format to express multiple planes

A given Vulkan format can now be decomposed into a set of planes. We now use 'struct anv_format_plane' to represent the format of those planes. v2: by Jason Rename anv_get_plane_format() to anv_get_format_plane() Don't rename anv_get_isl_format() Replace ds_fmt() by fmt2() Introduc

[Mesa-dev] [PATCH v5 09/16] anv: prepare sampler emission code for multiplanar images

New settings from the KHR_sampler_ycbcr_conversion specifications might require different sampler settings for luma and chroma planes. This change makes the sampler table emission ready to handle multiple planes. Signed-off-by: Lionel Landwerlin Reviewed-by: Jason Ekstrand --- src/intel/vulkan/

[Mesa-dev] [PATCH v5 12/16] anv/cmd_buffer: Make get_fast_clear_state return an address

From: Jason Ekstrand Reviewed-by: Lionel Landwerlin --- src/intel/vulkan/genX_cmd_buffer.c | 46 -- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index f19746db442..779

[Mesa-dev] [PATCH v5 11/16] anv/blorp: Add a concept of default aux usage

From: Jason Ekstrand A good chunk of anv_blorp just wants the aux usage from the image. This magic aux_usage value means just that. Reviewed-by: Lionel Landwerlin --- src/intel/vulkan/anv_blorp.c | 27 --- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a

[Mesa-dev] [PATCH v5 10/16] anv: add nir lowering pass for ycbcr textures

This pass implements all the implicit conversions required by the VK_KHR_sampler_ycbcr_conversion specification. It also inserts plane sources onto sampling instructions that we then let the pipeline layout pass deal with, when mapping things correctly to descriptors. v2: Add new file to meson bu

[Mesa-dev] [PATCH v5 14/16] anv: Take an image in can_sample_with_hiz

From: Jason Ekstrand Reviewed-by: Lionel Landwerlin --- src/intel/vulkan/anv_blorp.c | 3 +-- src/intel/vulkan/anv_image.c | 2 +- src/intel/vulkan/anv_private.h | 14 -- 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/v

[Mesa-dev] [PATCH v5 13/16] anv: Take a single aspect in anv_layout_to_aux_usage

From: Jason Ekstrand Reviewed-by: Lionel Landwerlin --- src/intel/vulkan/anv_image.c | 21 + src/intel/vulkan/anv_private.h | 2 +- src/intel/vulkan/genX_cmd_buffer.c | 10 +- 3 files changed, 15 insertions(+), 18 deletions(-) diff --git a/src/intel/vulka

[Mesa-dev] [PATCH v5 16/16] anv: enable VK_KHR_sampler_ycbcr_conversion

v2: Make GetImageMemoryRequirements2KHR() iterate over all pInfo structs (Lionel) Handle VkSamplerYcbcrConversionImageFormatPropertiesKHR (Andrew/Jason) Iterator over BindImageMemory2KHR's pNext structs correctly (Jason) v3: Revert GetImageMemoryRequirements2KHR() change from v2 (Jason

Re: [Mesa-dev] [PATCH 1/4] i965/fs: some TXF don't provide LOD

On Fri, 2017-10-06 at 14:23 +0100, Lionel Landwerlin wrote: > I fixed a similar bug in the vec4 > backend a couple of days ago. > > Can we maybe put this logic somewhere that could reused across > backends? > > Or maybe a nir pass to add the missing parameters? > >

[Mesa-dev] [PATCH 1/2] radv: emit PA_SU_POINT_{SIZE, MINMAX} in si_emit_config()

These registers don't change during the lifetime of the command buffer, there is no need to re-emit them when binding a new pipeline. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 16 src/amd/vulkan/si_cmd_buffer.c | 15 +++ 2 files changed,

[Mesa-dev] [PATCH 2/2] radv: set ALPHA_TO_MASK_ENABLE at blend state init

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 5da27935c2..670b89c922 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/a

[Mesa-dev] [PATCH 3/3] radeonsi: remove wrappers si_decompress_xx_textures

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c | 12 +--- src/gallium/drivers/radeonsi/si_compute.c| 2 +- src/gallium/drivers/radeonsi/si_pipe.h | 3 +-- src/gallium/drivers/radeonsi/si_state_draw.c | 2 +- 4 files changed, 4 insertions(+), 15 deletions(

[Mesa-dev] [PATCH] radeonsi: disable primitive binning on Vega10

From: Marek Olšák Our driver implementation is known to decrease performance for some tests, but we don't know if any apps and benchmarks (especially those tested by Phoronix) are affected. This disables the feature just to be safe. The debug flags are inverted for Vega10. To enable it, set:

[Mesa-dev] [PATCH 2/3] gallium/radeon: remove r600_atom::num_dw

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h| 2 -- src/gallium/drivers/radeon/r600_query.c | 15 --- src/gallium/drivers/radeon/r600_streamout.c | 21 ++--- src/gallium/drivers/radeonsi/si_state_viewport.c | 3 --- 4 files c

[Mesa-dev] [PATCH 1/3] gallium/radeon: remove old r600g code checking chip_class and family

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.c | 99 +++ src/gallium/drivers/radeon/r600_pipe_common.h | 20 -- src/gallium/drivers/radeon/r600_query.c | 31 +++-- src/gallium/drivers/radeon/r600_streamout.c | 96 ++

[Mesa-dev] [PATCH] radv: allow launching waves out-of-order for compute

Ported from RadeonSI, and -pro seems to enable it as well. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index d9243beae5..c64

[Mesa-dev] [PATCH 05/12] gallium/u_blitter: let drivers decide which VS to use for draw_rectangle

From: Marek Olšák This approach allows drivers to set their own vertex shader and skip compilation of u_blitter vertex shaders. --- src/gallium/auxiliary/util/u_blitter.c | 91 +++- src/gallium/auxiliary/util/u_blitter.h | 11 src/gallium/drivers/r300/r30

[Mesa-dev] [PATCH 01/12] radeonsi: move si_draw_rectangle into si_state_draw.c

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.c | 83 --- src/gallium/drivers/radeon/r600_pipe_common.h | 5 -- src/gallium/drivers/radeonsi/si_state.h | 5 ++ src/gallium/drivers/radeonsi/si_state_draw.c | 80 ++ 4 fil

[Mesa-dev] [PATCH 00/12] RadeonSI: 3D clears and blits w/out VBOs and viewport state

Hi, There are 3 states that blits don't have to use or touch: - vertex buffers (also no buffer upload is needed) - vertex element state - viewport state The blit implementation is reworked as follows. VS blit shaders read inputs from user SGPRs and return positions in window space. (clipping and

[Mesa-dev] [PATCH 02/12] radeonsi: don't use util_draw_arrays_instanced in si_draw_rectangle

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_draw.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 43ad97a..adebba6 100644 --- a/src/gallium/drivers/r

[Mesa-dev] [PATCH 08/12] radeonsi: use new VS blit shaders (VS inputs in SGPRs)

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c | 6 ++ src/gallium/drivers/radeonsi/si_pipe.h | 2 + src/gallium/drivers/radeonsi/si_state.h | 5 ++ src/gallium/drivers/radeonsi/si_state_draw.c| 94 ++--- src/gallium/drivers/rade

[Mesa-dev] [PATCH 04/12] gallium/u_blitter: let drivers set the vertex elements state

From: Marek Olšák radeonsi won't set it. --- src/gallium/auxiliary/util/u_blitter.c | 54 ++-- src/gallium/auxiliary/util/u_blitter.h | 2 ++ src/gallium/drivers/r300/r300_context.h | 1 + src/gallium/drivers/r300/r300_render.c | 7 ++-- src/gall

[Mesa-dev] [PATCH 03/12] gallium/u_blitter: remove blitter_context_priv::viewport

From: Marek Olšák --- src/gallium/auxiliary/util/u_blitter.c | 18 -- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/src/gallium/auxiliary/util/u_blitter.c b/src/gallium/auxiliary/util/u_blitter.c index 65938c5..9153ae1 100644 --- a/src/gallium/auxiliary/util/u_b

[Mesa-dev] [PATCH 07/12] radeonsi: add VS blit shader creation

From: Marek Olšák no users yet --- src/gallium/drivers/radeonsi/si_pipe.c| 10 ++ src/gallium/drivers/radeonsi/si_pipe.h| 5 + src/gallium/drivers/radeonsi/si_shader.c | 114 ++ src/gallium/drivers/radeonsi/si_shader.h | 12 +++ s

[Mesa-dev] [PATCH 09/12] radeonsi: don't save and restore vertex buffers and elements for u_blitter

From: Marek Olšák --- src/gallium/auxiliary/util/u_blitter.c | 15 +-- src/gallium/drivers/radeonsi/si_blit.c | 2 -- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/src/gallium/auxiliary/util/u_blitter.c b/src/gallium/auxiliary/util/u_blitter.c index 47042e4..a5c1f1

[Mesa-dev] [PATCH 10/12] radeonsi: minor cleanup of si_update_vs_writes_viewport_index

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.h | 2 +- src/gallium/drivers/radeonsi/si_state_shaders.c | 6 +++--- src/gallium/drivers/radeonsi/si_state_viewport.c | 6 +- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_

[Mesa-dev] [PATCH 11/12] radeonsi: set correct PA_SC_VPORT_ZMIN/ZMAX when viewport is disabled

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_viewport.c | 21 +++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_viewport.c b/src/gallium/drivers/radeonsi/si_state_viewport.c index 0d280f6..0d6b7a8 100644 ---

[Mesa-dev] [PATCH 12/12] radeonsi: don't change viewport for blits, use window-space positions

From: Marek Olšák The viewport state was an identity anyway. --- src/gallium/auxiliary/util/u_blitter.c | 4 +++- src/gallium/auxiliary/util/u_blitter.h | 1 + src/gallium/drivers/radeonsi/si_blit.c | 1 - src/gallium/drivers/radeonsi/si_pipe.c | 1 +

[Mesa-dev] [PATCH 06/12] radeonsi: split declare_default_desc_pointers

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 23 ++- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index c0037fe..c6cb45b 100644 --- a/src/gallium/drivers

Re: [Mesa-dev] [PATCH 00/12] RadeonSI: 3D clears and blits w/out VBOs and viewport state

BTW, I abandoned the previous patches that generated the VS position from VertexID. The reason was that I saw a decrease in performance on Raven when I changed to viewport transformation to non-identity. This series is much better anyway. Marek On Fri, Oct 6, 2017 at 4:10 PM, Marek Olšák wrote:

Re: [Mesa-dev] [PATCH v5 08/16] anv/apply_pipeline_layout: Prepare for multi-planar images

On Fri, Oct 6, 2017 at 6:31 AM, Lionel Landwerlin < lionel.g.landwer...@intel.com> wrote: > Signed-off-by: Lionel Landwerlin > Reviewed-by: Jason Ekstrand > --- > src/intel/vulkan/anv_descriptor_set.c| 13 +++ > src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 113 > +

Re: [Mesa-dev] [PATCH v5 08/16] anv/apply_pipeline_layout: Prepare for multi-planar images

On 06/10/17 15:52, Jason Ekstrand wrote: to get rid of the reference that he source carries to the load_const SSA def.  Sorry that's not terribly intuitive. Applied locally. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freed

Re: [Mesa-dev] [PATCH 1/4] i965/fs: some TXF don't provide LOD

On Fri, Oct 6, 2017 at 6:36 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > On Fri, 2017-10-06 at 14:23 +0100, Lionel Landwerlin wrote: > > I fixed a similar bug in the vec4 backend a couple of days ago. > Can we maybe put this logic somewhere that could reused across backends? > Or

Re: [Mesa-dev] [PATCH 1/4] i965/fs: some TXF don't provide LOD

On Fri, 2017-10-06 at 08:28 -0700, Jason Ekstrand wrote: > On Fri, Oct 6, 2017 at 6:36 AM, Samuel Iglesias Gonsálvez igalia.com> wrote: > > > > > > On Fri, 2017-10-06 at 14:23 +0100, Lionel Landwerlin wrote: > > > I fixed a similar bug in the vec4 > > > backend a couple of days

Re: [Mesa-dev] [PATCH 1/4] i965/fs: some TXF don't provide LOD

On 06/10/17 16:31, Samuel Iglesias Gonsálvez wrote: On Fri, 2017-10-06 at 08:28 -0700, Jason Ekstrand wrote: On Fri, Oct 6, 2017 at 6:36 AM, Samuel Iglesias Gonsálvez mailto:sigles...@igalia.com>> wrote: On Fri, 2017-10-06 at 14:23 +0100, Lionel Landwerlin wrote: I fixed a similar bug in the v

[Mesa-dev] [PATCH 1/2] anv: fix push descriptors with set > 0

When writing to set > 0, we were just wrongly writing to set 0. This commit fixes this by lazily allocating each set as we write to them. We didn't go for having them directly into the command buffer as this would require an additional ~45Kb per command buffer. v2: Allocate push descriptors from

[Mesa-dev] [PATCH 0/2] anv: push descriptor fixes

Another roll of this series with a quick change in patch 2 which reuses anv_cmd_state_reset() to destroy a command buffer cleanly. Cheers, Lionel Landwerlin (2): anv: fix push descriptors with set > 0 anv: fix potential push constant buffer leaks src/intel/vulkan/anv_cmd_buffer.c | 61 +

[Mesa-dev] [PATCH 2/2] anv: fix potential push constant buffer leaks

Valgrind stats on dEQP-VK.pipeline.push_constant.graphics_pipeline.range_size_128 : Before: HEAP SUMMARY: in use at exit: 2,467,381 bytes in 1,304 blocks total heap usage: 697,853 allocs, 696,531 frees, 138,466,600 bytes allocated LEAK SUMMARY: definitely lost: 936 bytes in 10 blocks

Re: [Mesa-dev] [PATCH] ac/nir: use llvm fma intrinsic if nir instruction is exact.

Am 06.10.2017 um 11:29 schrieb Alex Smith: > On 6 October 2017 at 03:39, Dave Airlie > wrote: > > On 6 October 2017 at 12:31, Marek Olšák > wrote: > > On Fri, Oct 6, 2017 at 4:10 AM, Connor Abbott > wrote

[Mesa-dev] [PATCH 01/15] i965: Complete 'expose RGBA visuals only on Android'

Commit 731ba6924a2ed6cdf47a78fd637a91a19ddcf9ed "expose RGBA visuals only on Android" replaced ARRAY_SIZE(formats) by num_formats, but there are 3 loops which add configs, and only one was updated to num_formats. Also update loops for configs with accumulation buffer and multisample configs. Fixe

[Mesa-dev] Rev 2: RGB10 bit rendering support for OpenGL + Intel i965

Hi, here's revision 2 of the 10 bit OpenGL rendering support patches for i965. I think i addressed all previous feedback. Patch 1 is adding to Emil's 'expose RGBA visuals only on Android' patch, which i think missed some bits. Patch 3 dropped special format handling for GLX_EXT_texture_from_pix

[Mesa-dev] [PATCH 07/15] dri/common: Add option to allow exposure of 10 bpc color configs. (v2)

Some clients may not like RGB10X2 and RGB10A2 fbconfigs and visuals. Add a new driconf option 'allow_rgb10_configs' to allow per application enable/disable. The option defaults to enabled. v2: Rename expose_rgb10_configs to allow_rgb10_configs, as suggested by Emil. Add comment to option pars

[Mesa-dev] [PATCH 08/15] i965/screen: Honor 'allow_rgb10_configs' option. (v2)

Allows to prevent exposing RGB10 configs and visuals to clients. v2: Rename expose_rgb10_configs to allow_rgb10_configs, as suggested by Emil. Signed-off-by: Mario Kleiner --- src/mesa/drivers/dri/i965/intel_screen.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/s

[Mesa-dev] [PATCH 14/15] egl/wayland: Add Wayland dmabuf support for RGB10 winsys buffers.

Successfully tested under Weston 3.0. Photometer confirms 10 rgb bits from rendering to display. Signed-off-by: Mario Kleiner --- src/egl/drivers/dri2/egl_dri2.c | 3 +++ src/egl/drivers/dri2/egl_dri2.h | 2 ++ src/egl/drivers/dri2/platform_wayland.c | 16 +++- 3 fi

[Mesa-dev] [PATCH 09/15] mesa: Add GL_RGBA + GL_UNSIGNED_INT_2_10_10_10_REV for OES read type.

This format + type combo is good for BGRA1010102 framebuffers for use with glReadPixels() under GLES, so add it for the GL_IMPLEMENTATION_COLOR_READ_TYPE_OES query. Allows successful testing of 10 bpc / depth 30 rendering with dEQP test case dEQP-EGL.functional.wide_color.window_1010102_colorspace

[Mesa-dev] [PATCH 10/15] egl/x11: Match depth 30 RGB visuals to 32-bit RGBA EGLConfigs.

Similar to the matching of 24 bit RGB visuals to 32-bit RGBA EGLConfigs, so X11 compositors won't alpha-blend any config with a destination alpha buffer during compositing. Additionally this fixes failure to select ARGB2101010 configs via eglChooseConfig() with EGL_ALPHA_BITS 2 on a depth 30 X-Scr

[Mesa-dev] [PATCH 03/15] i965: Support accelerated blit for depth 30 formats. (v2)

Extend intel_miptree_blit() to handle at least ARGB2101010 -> XRGB2101010, ARGB2101010 -> ARGB2101010, and XRGB2101010 -> XRGB2101010 via the BLT engine, but not XRGB2101010 -> ARGB2101010 yet. This works as tested under Compiz, KDE-5, Gnome-Shell. v2: Restrict BLT fast path to exclude XRGB210101

[Mesa-dev] [PATCH 04/15] dri: Add 10 bpc formats as available formats. (v2)

Used to support ARGB2101010 and XRGB2101010 winsys framebuffers / drawables, but added other 10 bpc fourcc's as well for consistency with definitions in wayland_drm.h, gbm.h, and drm_fourcc.h. v2: Align new defines with tabs instead of spaces, for consistency with remainder of that block of de

[Mesa-dev] [PATCH 11/15] egl/x11: Handle depth 30 drawables under software rasterizer.

For fixing eglCreateWindowSurface() under swrast, as tested with LIBGL_ALWAYS_SOFTWARE=1. Suggested-by: Eric Engestrom Signed-off-by: Mario Kleiner --- src/egl/drivers/dri2/platform_x11.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/egl/drivers/dri2/platform_x11.c b/src/egl/drivers/

[Mesa-dev] [PATCH 02/15] i965/screen: Add basic support for rendering 10 bpc/depth 30 framebuffers. (v2)

Expose formats which are supported at least back to Gen 5 Ironlake, possibly further. Allow creation of 10 bpc winsys buffers for drawables. glxinfo now lists new RGBA 10 10 10 2/0 formats. Works correctly under DRI2 without compositing. v2: Move the BGRA/BGRX1010102 formats before the RGBA/RGBX8

[Mesa-dev] [PATCH 05/15] loader/dri3: Add XRGB2101010 and ARGB2101010 support.

To allow DRI3/Present buffer sharing for 10 bpc buffers. Signed-off-by: Mario Kleiner Reviewed-by: Tapani Pälli --- src/loader/loader_dri3_helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/loader/loader_dri3_helper.c b/src/loader/loader_dri3_helper.c index 19ab581..1904af7 1006

[Mesa-dev] [PATCH 06/15] i965/screen: Add XRGB2101010 and ARGB2101010 support for DRI3.

Allow DRI3/Present buffer sharing for 10 bpc buffers. Otherwise composited desktops under DRI3 will only display black client areas for redirected windows. Signed-off-by: Mario Kleiner --- src/mesa/drivers/dri/i965/intel_screen.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa

[Mesa-dev] [PATCH 12/15] egl/x11: Handle depth 30 drawables for EGL_KHR_image_pixmap.

Enables eglCreateImageKHR() with target set to EGL_NATIVE_PIXMAP_KHR to handle color depth 30 X11 drawables. Note that in theory the drawable depth 32 case in the current implementation is ambiguous: A depth 32 drawable could be of format ARGB or ARGB2101010, therefore an assignment of __DRI_I

[Mesa-dev] [PATCH 13/15] egl/wayland: Add Wayland drm support for RGB10 winsys buffers.

Successfully tested under Weston 3.0. Photometer confirms 10 rgb bits from rendering to display. Signed-off-by: Mario Kleiner --- src/egl/drivers/dri2/platform_wayland.c | 37 --- src/egl/wayland/wayland-drm/wayland-drm.c | 6 + 2 files changed, 40 insertions(+

[Mesa-dev] [PATCH 15/15] egl/wayland: Add Wayland shm swrast support for RGB10 winsys buffers.

Signed-off-by: Mario Kleiner --- src/egl/drivers/dri2/platform_wayland.c | 16 +--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/src/egl/drivers/dri2/platform_wayland.c b/src/egl/drivers/dri2/platform_wayland.c index 08b7084..20e31aa 100644 --- a/src/egl/drivers/dri

Re: [Mesa-dev] [PATCH v2 05/12] meson: de-tabularize meson_options.txt

Quoting Eero Tamminen (2017-10-06 03:22:56) > Hi, > > On 05.10.2017 20:12, Dylan Baker wrote: > > This ends up being unworkable as more options get added, and with > > description wrapped onto a new line it doesn't improve readability > > anyway. > > > > Signed-off-by: Dylan Baker > > --- > >

Re: [Mesa-dev] [PATCH v2 06/12] meson: Build i965 and dri stack

Quoting Daniel Stone (2017-10-06 03:25:15) > Hi, > > On 5 October 2017 at 18:12, Dylan Baker wrote: > > This gets pretty much the entire classic tree building, as well as > > i965, including the various glapis. There are some workarounds for bugs > > that are fixed in meson 0.43.0, which is due o

Re: [Mesa-dev] [PATCH v2 09/12] meson: build gbm

Quoting Daniel Stone (2017-10-06 03:28:48) > Hi, > > On 5 October 2017 at 22:22, Dylan Baker wrote: > > Quoting Eric Anholt (2017-10-05 12:43:47) > >> Dylan Baker writes: > >> > +install_headers('main/gbm.h') > >> > + > >> > +pkg.generate( > >> > + name : 'gbm', > >> > + filebase : 'gbm', > >>

Re: [Mesa-dev] [PATCH] ac/nir: use llvm fma intrinsic if nir instruction is exact.

On Fri, Oct 6, 2017 at 4:39 AM, Dave Airlie wrote: > On 6 October 2017 at 12:31, Marek Olšák wrote: >> On Fri, Oct 6, 2017 at 4:10 AM, Connor Abbott wrote: >>> On Thu, Oct 5, 2017 at 10:08 PM, Marek Olšák wrote: On Fri, Oct 6, 2017 at 3:50 AM, Connor Abbott wrote: > Why? While it migh

Re: [Mesa-dev] [PATCH] Replace byte-swapping code with builtins in pack.c

Quoting Erik Faye-Lund (2017-10-06 00:31:20) > On Thu, Oct 5, 2017 at 8:59 PM, Jochen Rollwagen > wrote: > > Am 04.10.2017 um 05:59 schrieb Matt Turner: > >> > >> On Tue, Oct 3, 2017 at 11:01 AM, Jochen Rollwagen > >> wrote: > >>> > >>> From 4cebe50a9bade6717923e104c954f3fad75f71bb Mon Sep 17 0

Re: [Mesa-dev] [PATCH 20/21] intel/compiler: Allocate pull_param in assign_constant_locations

On 2017-09-29 14:25:20, Jason Ekstrand wrote: > diff --git a/src/intel/compiler/brw_vec4_visitor.cpp > b/src/intel/compiler/brw_vec4_visitor.cpp > index ff5cd2d..ae51619 100644 > --- a/src/intel/compiler/brw_vec4_visitor.cpp > +++ b/src/intel/compiler/brw_vec4_visitor.cpp > @@ -1782,6 +1782,11 @@

[Mesa-dev] [Bug 103126] glthread doesn't offload anything in Witcher 2

https://bugs.freedesktop.org/show_bug.cgi?id=103126 Bug ID: 103126 Summary: glthread doesn't offload anything in Witcher 2 Product: Mesa Version: 17.2 Hardware: Other OS: All Status: NEW Severity: normal

[Mesa-dev] [Bug 103126] glthread doesn't offload anything in Witcher 2

https://bugs.freedesktop.org/show_bug.cgi?id=103126 --- Comment #1 from Alexander Tsoy --- My GPU: 01:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Tonga PRO [Radeon R9 285/380] [1002:6939] (rev f1) (prog-if 00 [VGA controller]) -- You are receiving this mail bec

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