[Mesa-dev] [PATCH v2 1/3] nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warnings

Signed-off-by: Hans de Goede --- src/gallium/drivers/nouveau/codegen/nv50_ir_util.h | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h index 7b0de85..c619499 100644 --- a/src/gallium/driv

[Mesa-dev] [PATCH v2 2/3] nouveau: Fix a couple of "foo may be used uninitialized' compiler warnings

These are all new false positives with gcc6. In nouveau_compiler.c: gcc6 no longer assumes that passing a pointer to a variable into a function initialises that variable. In nv50_ir_from_tgsi.cpp op and mode are not set if there are 0 enabled dst channels, this never happens, but gcc cannot know

[Mesa-dev] [PATCH v2 1/4] tgsi: Add WORK_DIM System Value

Add a new WORK_DIM SV type, this is will return the grid dimensions (1-4) for compute (opencl) kernels. This is necessary to implement the opencl get_work_dim() function. Signed-off-by: Hans de Goede --- Changes in v2: -No changes Changes in v1 (first non RFC): -Document TGSI_SEMANTIC_WORK_DIM i

[Mesa-dev] [PATCH v2 2/4] clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driver

In order to implement get_work_dim() the driver may need to know the clEnqueueNDRangeKernel() work_dim parameter, so pass it to the driver. Signed-off-by: Hans de Goede --- Changes in v2: -No changes --- src/gallium/include/pipe/p_state.h| 7 +++ src/gallium/state_trackers/cl

Re: [Mesa-dev] Split gl_shader in two and clean-ups

On Tue, 2016-06-28 at 16:30 +0200, Iago Toral wrote: > On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > > There are two distinctly different uses of this struct. The first > > is to store GL shader objects. The second is to store information > > about a shader stage thats been linked. > >

Re: [Mesa-dev] Split gl_shader in two and clean-ups

On Wed, 2016-06-29 at 14:40 +0200, Iago Toral wrote: > On Tue, 2016-06-28 at 16:30 +0200, Iago Toral wrote: > > On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > > > There are two distinctly different uses of this struct. The first > > > is to store GL shader objects. The second is to stor

Re: [Mesa-dev] [PATCH 2/3] st/omx: add support for nouveau / interlaced

On 06/28/2016 05:07 AM, Christian König wrote: Hi Leo, nice catch patch is Reviewed-by: Christian König . But we still need to fix transcoding issue with interlaced as true. Our transcode support tunneling, basic the decode buffer will be used directly for encode. Ah, yes of course. Sor

Re: [Mesa-dev] [PATCH 5/7] glsl/mesa: split gl_shader in two

On Wed, 2016-06-29 at 14:36 +0200, Iago Toral wrote: > On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > > There are two distinctly different uses of this struct. The first > > is to store GL shader objects. The second is to store information > > about a shader stage thats been linked. > >

Re: [Mesa-dev] [PATCH 5/7] glsl/mesa: split gl_shader in two

On Wed, 2016-06-29 at 22:54 +1000, Timothy Arceri wrote: > On Wed, 2016-06-29 at 14:36 +0200, Iago Toral wrote: > > On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > > > There are two distinctly different uses of this struct. The first > > > is to store GL shader objects. The second is to

[Mesa-dev] [Bug 93551] Divinity: Original Sin Enhanced Edition(Native) crash on start

https://bugs.freedesktop.org/show_bug.cgi?id=93551 Jonas Platte changed: What|Removed |Added CC||freedesk...@jonasplatte.de -- You are re

Re: [Mesa-dev] Split gl_shader in two and clean-ups

On Wed, 2016-06-29 at 14:42 +0200, Iago Toral wrote: > On Wed, 2016-06-29 at 14:40 +0200, Iago Toral wrote: > > On Tue, 2016-06-28 at 16:30 +0200, Iago Toral wrote: > > > On Tue, 2016-06-28 at 11:52 +1000, Timothy Arceri wrote: > > > > There are two distinctly different uses of this struct. The > >

[Mesa-dev] [PATCH 2/2] st/vdpau: use bicubic filter for scaling(v6.1)

use bicubic filtering as high quality scaling L1. v2: fix a typo and add a newline to code v3: -render the unscaled image on a temporary surface (Christian) -apply noise reduction and sharpness filter on unscaled surface -render the final scaled surface using bicubic interpolatio

[Mesa-dev] [PATCH 1/2] vl: add a bicubic interpolation filter(v5)

This is a shader based bicubic interpolater which uses cubic Hermite spline algorithm. v2: set dst_area and dst_clip during scaling (Christian) v3: clear the render target before rendering v4: intialize offsets while initializing shaders use a constant buffer to send dst_size to frag shader

Re: [Mesa-dev] Fwd: [PATCH] st/vdpau: use bicubic filter for scaling

Hi Andy, On Wed, Jun 29, 2016 at 12:05 AM, Andy Furniss wrote: > Christian König wrote: > >> Am 28.06.2016 um 20:11 schrieb Nayan Deshmukh: >> >>> Hi Andy, >>> >>> Thanks for testing the patches. >>> >>> On Tue, Jun 28, 2016 at 11:26 PM, Andy Furniss >> > wrote: >>>

Re: [Mesa-dev] [PATCH v2 1/3] nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warnings

For those of us who are lazy and forgetful (i.e. me), can you remind the difference between auto_ptr and unique_ptr? IIRC unique_ptr is more like scoped_ptr, while auto_ptr has transfer semantics? On Wed, Jun 29, 2016 at 8:38 AM, Hans de Goede wrote: > Signed-off-by: Hans de Goede > --- > src/g

[Mesa-dev] [PATCH] Revert "i965: get PrimitiveMode from the program rather than the shader struct"

This reverts commit 644e015f0b9236e955d679cac4bcc7a1523fc475. PrimitiveMode from the program doesn't hold the proper value when reaching this code. We rather take it from the linked shader. Signed-off-by: Andres Gomez --- src/mesa/drivers/dri/i965/brw_tcs.c | 5 +++-- 1 file changed, 3 insertio

Re: [Mesa-dev] [PATCH v2 3/3] nv30: Fix "array subscript is below array bounds" compiler warning

Reviewed-by: Ilia Mirkin On Wed, Jun 29, 2016 at 8:38 AM, Hans de Goede wrote: > gcc6 does not like the trick where we point to one entry before the > array start and then start a while with a pre-increment. > > Signed-off-by: Hans de Goede > --- > src/gallium/drivers/nouveau/nv30/nv30_transfe

Re: [Mesa-dev] [PATCH v2 2/3] nouveau: Fix a couple of "foo may be used uninitialized' compiler warnings

Since you're the 75th person to send these, I'm going to break down and say "fine, whtvr". I really hate this "pander to stupid compilers" things. If the warning is wrong, my natural inclination would be to disable it (after my even more natural inclination to ignore it). But sticking 0's in all ov

Re: [Mesa-dev] [PATCH 2/2] st/vdpau: use bicubic filter for scaling(v6.1)

Am 29.06.2016 um 15:24 schrieb Nayan Deshmukh: use bicubic filtering as high quality scaling L1. v2: fix a typo and add a newline to code v3: -render the unscaled image on a temporary surface (Christian) -apply noise reduction and sharpness filter on unscaled surface -render the

Re: [Mesa-dev] [PATCH v2 1/3] nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warnings

I saw those warnings few weeks ago when I updated to GCC6 as well (but was lazy to fix them). Thanks. Reviewed-by: Samuel Pitoiset On 06/29/2016 02:38 PM, Hans de Goede wrote: Signed-off-by: Hans de Goede --- src/gallium/drivers/nouveau/codegen/nv50_ir_util.h | 4 1 file changed, 4 ins

Re: [Mesa-dev] [PATCH v2 4/4] nouveau: Add support for SV_WORK_DIM

On Wed, Jun 29, 2016 at 8:37 AM, Hans de Goede wrote: > Add support for SV_WORK_DIM for nvc0 and nve4. > > Signed-off-by: Hans de Goede > --- > Changes in v2 > -Use new NVC0_CB_AUX_GRID_INFO(i) version > Changes in v1 (first non RFC posting): > -Adjust NVC0_CB_AUX_GRID_SIZE for the extra value in

Re: [Mesa-dev] [PATCH 2/3] st/omx: add support for nouveau / interlaced

Am 29.06.2016 um 14:46 schrieb Leo Liu: On 06/28/2016 05:07 AM, Christian König wrote: Hi Leo, nice catch patch is Reviewed-by: Christian König . But we still need to fix transcoding issue with interlaced as true. Our transcode support tunneling, basic the decode buffer will be used dire

Re: [Mesa-dev] [PATCH v2 2/3] nouveau: Fix a couple of "foo may be used uninitialized' compiler warnings

On 06/29/2016 03:33 PM, Ilia Mirkin wrote: Since you're the 75th person to send these, I'm going to break down and say "fine, whtvr". I really hate this "pander to stupid compilers" things. If the warning is wrong, my natural inclination would be to disable it (after my even more natural inclin

Re: [Mesa-dev] [PATCH v2 4/4] nouveau: Add support for SV_WORK_DIM

On 06/29/2016 03:41 PM, Ilia Mirkin wrote: On Wed, Jun 29, 2016 at 8:37 AM, Hans de Goede wrote: Add support for SV_WORK_DIM for nvc0 and nve4. Signed-off-by: Hans de Goede --- Changes in v2 -Use new NVC0_CB_AUX_GRID_INFO(i) version Changes in v1 (first non RFC posting): -Adjust NVC0_CB_AUX

Re: [Mesa-dev] [PATCH v2 1/3] nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warnings

Hi, On 29-06-16 15:27, Ilia Mirkin wrote: For those of us who are lazy and forgetful (i.e. me), can you remind the difference between auto_ptr and unique_ptr? IIRC unique_ptr is more like scoped_ptr, while auto_ptr has transfer semantics? Actually I had to look this up myself (before writing t

Re: [Mesa-dev] [PATCH v2 1/3] nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warnings

On 06/29/2016 03:55 PM, Hans de Goede wrote: Hi, On 29-06-16 15:27, Ilia Mirkin wrote: For those of us who are lazy and forgetful (i.e. me), can you remind the difference between auto_ptr and unique_ptr? IIRC unique_ptr is more like scoped_ptr, while auto_ptr has transfer semantics? Actuall

Re: [Mesa-dev] [PATCH] radeonsi: don't advertise multisample shader images

Reviewed-by: Nicolai Hähnle On 29.06.2016 11:20, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 54febce..cec5e84

Re: [Mesa-dev] [PATCH v2 1/3] nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warnings

Hi, On 29-06-16 15:57, Samuel Pitoiset wrote: On 06/29/2016 03:55 PM, Hans de Goede wrote: Hi, On 29-06-16 15:27, Ilia Mirkin wrote: For those of us who are lazy and forgetful (i.e. me), can you remind the difference between auto_ptr and unique_ptr? IIRC unique_ptr is more like scoped_ptr,

Re: [Mesa-dev] [PATCH] Revert "i965: get PrimitiveMode from the program rather than the shader struct"

On 29 June 2016 11:29:17 pm AEST, Andres Gomez wrote: >This reverts commit 644e015f0b9236e955d679cac4bcc7a1523fc475. > >PrimitiveMode from the program doesn't hold the proper value when >reaching this code. We rather take it from the linked shader. Usually when reverting you should say what the

Re: [Mesa-dev] [PATCH 4/4] radeonsi: enable distributed tess on multi-SE parts only

For the series: Reviewed-by: Nicolai Hähnle On 28.06.2016 19:53, Marek Olšák wrote: From: Marek Olšák ported from Vulkan --- src/gallium/drivers/radeonsi/si_pipe.c | 4 src/gallium/drivers/radeonsi/si_pipe.h | 1 + src/gallium/drivers/radeonsi/si_state_draw.c|

Re: [Mesa-dev] [PATCH 1/2] nvc0: fix up image support for allowing multiple samples

Ooops, forgot to fix the number of samples returned. (Right now we hard-code it to 1.) But the rest of the change should still be fine, and there's no piglit execution test for imageSamples(). On Wed, Jun 29, 2016 at 12:13 AM, Ilia Mirkin wrote: > Basically we just have to scale up the coordinate

[Mesa-dev] [PATCH 3/8] gallium/radeon: add and use r600_texture_reference

From: Marek Olšák Reviewed-by: Alex Deucher Reviewed-by: Vedran Miletić Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/r600/r600_uvd.c | 2 +- src/gallium/drivers/radeon/r600_pipe_common.c | 3 +-- src/gallium/drivers/radeon/r600_pipe_common.h | 6 ++ src/gallium/drivers

[Mesa-dev] [PATCH 4/8] gallium/radeon: R600_DEBUG=nodccfb disables separate DCC

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.c | 1 + src/gallium/drivers/radeon/r600_pipe_common.h | 1 + src/gallium/drivers/radeon/r600_texture.c | 3 ++- 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/sr

[Mesa-dev] [PATCH 1/8] gallium/radeon: add a heuristic enabling DCC for scanout surfaces (v2)

From: Marek Olšák DCC for displayable surfaces is allocated in a separate buffer and is enabled or disabled based on PS invocations from 2 frames ago (to let queries go idle) and the number of slow clears from the current frame. At least an equivalent of 5 fullscreen draws or slow clears must be

[Mesa-dev] [PATCH 0/8] RadeonSI: DCC for displayable surfaces (v2)

Hi, This is a much improved version of diplayable DCC support. GpuTest/Triangle: No change in performance. GLMark2: -0.5% performance glxgears: There seems to be a small difference, but it might also be just noise. See the changes in patches 4-8, but generally this is enough to enable DCC for ca

[Mesa-dev] [PATCH 2/8] gallium/radeon: add a HUD query for PS draw ratio stats from separate DCC

From: Marek Olšák Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_pipe_common.h | 1 + src/gallium/drivers/radeon/r600_query.c | 5 + src/gallium/drivers/radeon/r600_query.h | 1 + src/gallium/drivers/radeon/r600_texture.c | 1 + 4 files changed, 8 insertions

Re: [Mesa-dev] [PATCH] Revert "i965: get PrimitiveMode from the program rather than the shader struct"

On Thu, 2016-06-30 at 00:09 +1000, Timothy Arceri wrote: > > On 29 June 2016 11:29:17 pm AEST, Andres Gomez > wrote: > > This reverts commit 644e015f0b9236e955d679cac4bcc7a1523fc475. > > > > PrimitiveMode from the program doesn't hold the proper value when > > reaching this code. We rather take

[Mesa-dev] [PATCH 5/8] gallium/radeon: separate DCC starts as disabled (ps_draw_ratio = 0)

From: Marek Olšák DRI3: - Only slows clears can enable it for the first frame. - A good PS/draw ratio can enable it for other frames. DRI2: - Only slows clears can enable it for a frame. - Page-flipped color buffers are unref'd at the end of each frame, so it can't be enabled in any other way.

[Mesa-dev] [PATCH 8/8] gallium/radeon: remove zombie textures kept alive by DCC stat gathering

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 39 +-- 1 file changed, 27 insertions(+), 12 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 776ad7c..68f1701 100644 --- a/src/gal

[Mesa-dev] [PATCH 7/8] gallium/radeon: don't re-create queries for DCC stat gathering

From: Marek Olšák --- src/gallium/drivers/radeon/r600_query.c | 4 ++-- src/gallium/drivers/radeon/r600_query.h | 2 ++ src/gallium/drivers/radeon/r600_texture.c | 9 ++--- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gall

[Mesa-dev] [PATCH 6/8] gallium/radeon: assume X11 DRI3 can use at most 5 back buffers

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index fc50b91..c145dc3 100644 --- a/src/gallium/drivers/rade

[Mesa-dev] Congrats AMD-Team! --- RX480 + Mesa-git + 4.7-rcX

Well done! Best wishes. Dieter ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] Make single-buffered GLES representation internally consistent

There a few places in the code where clearing and reading are done on incorrect buffers for GLES contexts. See comments for details. This fixes 75 GLES3 dEQP tests on the surfaceless platform with no regressions. v2: Corrected unclear comment v3: Make the change in context.c instead of get.c ---

Re: [Mesa-dev] [PATCH 1/4] glx: Call __glXInitVertexArrayState() with a usable gc.

I'm not familiar with the code, other than diving in to fix these indirect multi-texture problems, so you will know much more about it than me. But, my understanding is that __glXInitVertexArrayState needs info from the server, obtained by calls to _indirect_glGetString & __indirect_glGetInteger

Re: [Mesa-dev] [PATCH 0/8] RadeonSI: DCC for displayable surfaces (v2)

On 29.06.2016 16:20, Marek Olšák wrote: Hi, This is a much improved version of diplayable DCC support. GpuTest/Triangle: No change in performance. GLMark2: -0.5% performance glxgears: There seems to be a small difference, but it might also be just noise. See the changes in patches 4-8, but gen

[Mesa-dev] [PATCH] radeon uvd add uvd fw version for amdgpu

From: sonjiang Signed-off-by: sonjiang Cc: "12.0" --- src/gallium/drivers/radeon/radeon_winsys.h| 1 + src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 11 ++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/d

[Mesa-dev] [PATCH 2/3] radeon/uvd: seperate uvd context buffer from DPB

From: sonjiang Signed-off-by: sonjiang Cc: "12.0" --- src/gallium/drivers/radeon/radeon_uvd.c | 106 +--- 1 file changed, 97 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c index a2d1d2d.

[Mesa-dev] [PATCH v2] docs: update MESA_DEBUG envvar documentation.

silent, flush, incomplete_tex and incomplete_fbo flags were not documented (see src/mesa/main.debug.c for more info). FP is not checked anymore. v2 (Brian Paul): * MESA_DEBUG accepts a comma-separated list of parameters. * Clarify how MESA_DEBUG behaves with mesa debug and release builds. * Up

[Mesa-dev] [PATCH 3/3] radeon/uvd: fix a h265 context size bug

From: sonjiang Signed-off-by: sonjiang Cc: "12.0" --- src/gallium/drivers/radeon/radeon_uvd.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c index 1f28b01..7d0d2fd 100644 --- a/src/gallium/drivers/radeon

Re: [Mesa-dev] [Intel-gfx] [PATCH 2/2] drm/i915: Removing PCI IDs that are no longer listed as Kabylake.

On Wed, 2016-06-29 at 12:24 +0300, Jani Nikula wrote: > On Fri, 24 Jun 2016, Rodrigo Vivi wrote: > > > > This is unusual. Usually IDs listed on early stages of platform > > definition are kept there as reserved for later use. > > > > However these IDs here are not listed anymore in any of steppi

[Mesa-dev] [PATCH 3/4] nv50/ir: print RSQ/RCP subops in debug mode

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 10 ++ 1 file changed, 10 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp index 122245c..7d8549a 100644 ---

[Mesa-dev] [PATCH 1/4] nv50/ir: print SHFL subops in debug mode

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 9 + 1 file changed, 9 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp index 3580b33..276e8d3 100644 --- a/

[Mesa-dev] [PATCH 2/4] nv50/ir: print PIXLD subops in debug mode

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 9 + 1 file changed, 9 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp index 276e8d3..122245c 100644 --- a/

[Mesa-dev] [PATCH 4/4] nv50/ir: print EMIT subops in debug mode

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 9 + 1 file changed, 9 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp index 7d8549a..d88bdce 100644 --- a/

Re: [Mesa-dev] [PATCH 2/3] st/omx: add support for nouveau / interlaced

On 06/29/2016 09:08 AM, Christian König wrote: Am 29.06.2016 um 14:46 schrieb Leo Liu: On 06/28/2016 05:07 AM, Christian König wrote: Hi Leo, nice catch patch is Reviewed-by: Christian König . But we still need to fix transcoding issue with interlaced as true. Our transcode support tun

[Mesa-dev] [PATCH 0/4] RadeonSI: Multithreaded shader compilation

Hi, This series implements basic multithreaded LLVM shader compilation in a minimally invasive way. (+51 lines of code in the main patch) It doesn't help on-demand shader compilation, but it does improve loading and startup times by being able to saturate up to 4 CPU cores if given enough shaders

[Mesa-dev] [PATCH 1/4] radeonsi: move LLVMTargetMachineRef creation to a separate function

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 32 ++-- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 633d4bb..2e8d846 100644 --- a/src/gallium/dri

[Mesa-dev] [PATCH 3/4] radeonsi: don't lock shader cache mutex during compilation

From: Marek Olšák to allow multiple shaders to be compiled simultaneously. --- src/gallium/drivers/radeonsi/si_state_shaders.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeons

[Mesa-dev] [PATCH 2/4] radeonsi: separate the compilation chunk of si_create_shader_selector

From: Marek Olšák The function interface is ready to be used by util_queue. Also, si_shader_select_with_key can no longer accept si_context. --- src/gallium/drivers/radeonsi/si_shader.h| 7 + src/gallium/drivers/radeonsi/si_state.h | 1 + src/gallium/drivers/radeonsi/si_state

[Mesa-dev] [PATCH 4/4] radeonsi: do compilation from si_create_shader_selector asynchronously

From: Marek Olšák Main shader parts and geometry shaders are compiled asynchronously by util_queue. si_create_shader_selector doesn't wait and returns. si_draw_vbo(si_shader_select) waits for completion. This has the best effect when shaders are compiled at app-loading time. It doesn't help much

Re: [Mesa-dev] [PATCH] radeon uvd add uvd fw version for amdgpu

On Wed, Jun 29, 2016 at 11:38 AM, Leo Liu wrote: > From: sonjiang > > Signed-off-by: sonjiang > Cc: "12.0" For the series: Reviewed-by: Alex Deucher > --- > src/gallium/drivers/radeon/radeon_winsys.h| 1 + > src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 11 ++- > 2 files chan

Re: [Mesa-dev] Fwd: [PATCH] st/vdpau: use bicubic filter for scaling

Nayan Deshmukh wrote: Hi Andy, One Issue I just tested - it doesn't work with sharpen or denoise, corrupted output compared to hqscale=0. The issue is fixed in the new patch series. Yes, this is OK now. All seems good apart from the slight offset on scaled up vids, though no one is really

[Mesa-dev] [PATCH] i965: Use drmIoctl for DRM_I915_GETPARAM (v2)

Stop using drmCommandWriteRead for such a simple ioctl. v2: Handle errno correctly. [ickle] --- src/mesa/drivers/dri/i965/intel_screen.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_scre

Re: [Mesa-dev] Fwd: [PATCH] st/vdpau: use bicubic filter for scaling

On Wed, Jun 29, 2016 at 10:20 PM, Andy Furniss wrote: > Nayan Deshmukh wrote: > >> Hi Andy, >> > > One Issue I just tested - it doesn't work with sharpen or denoise, >>> corrupted output compared to hqscale=0. >>> >>> >>> The issue is fixed in the new patch series. >> > > Yes, this is OK now. All

Re: [Mesa-dev] [PATCH v4] swr: Refactor checks for compiler feature flags

Tested on gcc-5.3.1, clang-3.8, icc-16.0.3 Reviewed-by: Tim Rowley Tested-by: Tim Rowley > On Jun 28, 2016, at 2:50 PM, Chuck Atkins wrote: > > Encapsulate the test for which flags are needed to get a compiler to > support certain features. Along with this, give various options to try > for

Re: [Mesa-dev] [PATCH 4/4] nv50/ir: print EMIT subops in debug mode

Series is Reviewed-by: Ilia Mirkin On Wed, Jun 29, 2016 at 12:13 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 9 + > 1 file changed, 9 insertions(+) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50

Re: [Mesa-dev] [PATCH v2 2/4] clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driver

On Wed, 2016-06-29 at 14:37 +0200, Hans de Goede wrote: > In order to implement get_work_dim() the driver may need to know the > clEnqueueNDRangeKernel() work_dim parameter, so pass it to the > driver. The workdim info is passed as the first implicit argument (after explicit kernel arguments, see

Re: [Mesa-dev] [PATCH] radeon uvd add uvd fw version for amdgpu

Am 29.06.2016 um 18:35 schrieb Alex Deucher: On Wed, Jun 29, 2016 at 11:38 AM, Leo Liu wrote: From: sonjiang Signed-off-by: sonjiang Cc: "12.0" For the series: Reviewed-by: Alex Deucher Reviewed-by: Christian König as well. Christian. --- src/gallium/drivers/radeon/radeon_winsys

Re: [Mesa-dev] [PATCH v2 2/4] clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driver

On Wed, Jun 29, 2016 at 2:42 PM, Jan Vesely wrote: > On Wed, 2016-06-29 at 14:37 +0200, Hans de Goede wrote: >> In order to implement get_work_dim() the driver may need to know the >> clEnqueueNDRangeKernel() work_dim parameter, so pass it to the >> driver. > > The workdim info is passed as the fi

[Mesa-dev] [PATCH 2/2] radeon/vce: update encRefPic addr and array mode

Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_vce_52.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/radeon/radeon_vce_52.c b/src/gallium/drivers/radeon/radeon_vce_52.c index 7d33313..869b29b 100644 --- a/src/gallium/drivers/radeon/radeon_vce_52.c +++ b/s

[Mesa-dev] [PATCH 1/2] radeon/vce: check alignment for dpb buffer

This will make safer for not acrossing the boundary Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_vce.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index e8aac8e..0a41

[Mesa-dev] [Bug 77449] Tracker bug for all bugs related to Steam titles

https://bugs.freedesktop.org/show_bug.cgi?id=77449 Bug 77449 depends on bug 96602, which changed state. Bug 96602 Summary: [radeonsi] Dreamfall Chapters: one shader fails to compile, minor visual corruption https://bugs.freedesktop.org/show_bug.cgi?id=96602 What|Removed

Re: [Mesa-dev] [PATCH v2 2/4] clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driver

On Wed, 2016-06-29 at 15:45 -0400, Ilia Mirkin wrote: > On Wed, Jun 29, 2016 at 2:42 PM, Jan Vesely > wrote: > > On Wed, 2016-06-29 at 14:37 +0200, Hans de Goede wrote: > > > In order to implement get_work_dim() the driver may need to know > > > the > > > clEnqueueNDRangeKernel() work_dim paramete

Re: [Mesa-dev] [PATCH v2 2/4] clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driver

Ilia Mirkin writes: > On Wed, Jun 29, 2016 at 2:42 PM, Jan Vesely wrote: >> On Wed, 2016-06-29 at 14:37 +0200, Hans de Goede wrote: >>> In order to implement get_work_dim() the driver may need to know the >>> clEnqueueNDRangeKernel() work_dim parameter, so pass it to the >>> driver. >> >> The wo

Re: [Mesa-dev] [PATCH v2 2/4] clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driver

On Wed, 2016-06-29 at 16:18 -0400, Jan Vesely wrote: > On Wed, 2016-06-29 at 15:45 -0400, Ilia Mirkin wrote: > > On Wed, Jun 29, 2016 at 2:42 PM, Jan Vesely > > > > wrote: > > > On Wed, 2016-06-29 at 14:37 +0200, Hans de Goede wrote: > > > > In order to implement get_work_dim() the driver may need

Re: [Mesa-dev] [PATCH] i965: Use drmIoctl for DRM_I915_GETPARAM (v2)

On Wed, Jun 29, 2016 at 09:50:36AM -0700, Chad Versace wrote: > Stop using drmCommandWriteRead for such a simple ioctl. > > v2: Handle errno correctly. [ickle] Yes, lgtm, Reviewed-by: Chris Wilson -Chris -- Chris Wilson, Intel Open Source Technology Centre _

[Mesa-dev] [PATCH v2] mesa: Close fp on error path.

--- src/mesa/main/dlist.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/mesa/main/dlist.c b/src/mesa/main/dlist.c index 3845d2e..9d9e319 100644 --- a/src/mesa/main/dlist.c +++ b/src/mesa/main/dlist.c @@ -10086,15 +10086,12 @@ print_list(struct gl_context *ctx,

[Mesa-dev] [PATCH v2] glx: Undo memory allocation checking damage.

This partially reverts commit d41f5396f3cb619729021390c273f838d92f11fb. That untested commit broke the tex-skipped-unit piglit test and the arbvparray Mesa demo when run with indirect GLX. state->array_state is used during initialization, so its assignment cannot be moved to the end of the functi

Re: [Mesa-dev] [PATCH v2 00/34] i965: Use ISL for emitting surface state

On Thu 23 Jun 2016, Jason Ekstrand wrote: > This series is largely a resend of the earlier series. Most of the > precursor ISL cleanup patches have been pushed and tagged for 12.0 for > Vulkan. These are the patches actually needed to convert the i965 driver > over. > > The primary change since

Re: [Mesa-dev] [PATCH v2 01/34] genxml: Add enough XML for gens 4, 4.5, and 5 to get SURFACE_STATE

On Thu 23 Jun 2016, Jason Ekstrand wrote: > --- > src/intel/genxml/Android.mk | 15 +++ > src/intel/genxml/Makefile.am | 3 +++ > src/intel/genxml/Makefile.sources | 3 +++ > src/intel/genxml/gen4.xml | 52 > src/intel/genxml/gen45.

[Mesa-dev] [PATCH 11/24] glsl: Add lowering pass for ir_unop_find_msb

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/ir_optimization.h | 1 + src/compiler/glsl/lower_instructions.cpp | 106 +++ 2 files changed, 107 insertions(+) diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optim

[Mesa-dev] [PATCH 02/24] MESA_shader_integer_functions: Boiler plate extension tracking

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/glcpp/glcpp-parse.y| 3 +++ src/compiler/glsl/glsl_parser_extras.cpp | 1 + src/compiler/glsl/glsl_parser_extras.h | 2 ++ src/compiler/glsl/standalone_scaffolding.cpp | 2 ++ src/mesa/main/extensions_table.h

[Mesa-dev] [PATCH 03/24] MESA_shader_integer_functions: Expose new built-in functions

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/builtin_functions.cpp | 31 --- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/src/compiler/glsl/builtin_functions.cpp b/src/compiler/glsl/builtin_functions.cpp index 018e4064..44a

[Mesa-dev] [PATCH 10/24] glsl: Add lowering pass for ir_unop_find_lsb

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/ir_optimization.h | 1 + src/compiler/glsl/lower_instructions.cpp | 86 2 files changed, 87 insertions(+) diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimiz

[Mesa-dev] [PATCH 14/24] i965: Always enable GL_ARB_shading_language_packing

From: Ian Romanick With the existing lowering passes, the functions from this extension become a bunch of bit twiddling operations that have always been supported. Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/intel_extensions.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Mesa-dev] [PATCH 13/24] i965: Move enable of EXT_shader_integer_mix

From: Ian Romanick This extension does not depend on the Gen. It only depends on the availability of GLSL 1.30. Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/intel_extensions.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_ex

[Mesa-dev] [PATCH 16/24] i965: Use LZD to implement nir_op_ifind_msb on Gen < 7

From: Ian Romanick Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 50 ++-- src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 52 +++--- 2 files changed, 81 insertions(+), 21 deletions(-) diff --git a/src/mesa/drivers/dri/

[Mesa-dev] [PATCH 05/24] MESA_shader_integer_functions: Allow new function overload matching rules

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/ir_function.cpp | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/compiler/glsl/ir_function.cpp b/src/compiler/glsl/ir_function.cpp index 0b4cb4b..c0b62af 100644 --- a/src/compiler/glsl/ir_f

[Mesa-dev] [PATCH 08/24] glsl: Add lowering pass for ir_quadop_bitfield_insert

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/ir_optimization.h | 1 + src/compiler/glsl/lower_instructions.cpp | 73 2 files changed, 74 insertions(+) diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimiz

[Mesa-dev] [PATCH 17/24] i965: Use LZD to implement nir_op_find_lsb on Gen < 7

From: Ian Romanick Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 22 +- src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 21 - 2 files changed, 41 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.

[Mesa-dev] [PATCH 18/24] i965: Update assertion to account for Gen < 7

From: Ian Romanick Previously SHADER_OPCODE_MULH could only exist on Gen7+, so the assertion assumed the Gen7+ accumulator rules. A future patch will allow this instruction on at least Gen6, so update the assertion. Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_fs.cpp | 6

[Mesa-dev] [PATCH 09/24] glsl: Add lowering pass for ir_unop_bitfield_reverse

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/ir_optimization.h | 1 + src/compiler/glsl/lower_instructions.cpp | 91 2 files changed, 92 insertions(+) diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimiz

[Mesa-dev] [PATCH 00/24] Add MESA_shader_integer_functions

This patch series adds support for a (useful) subset of GL_ARB_gpu_shader5 to every GPU in Mesa that supports GLSL 1.30 or later. Many of these functions are needed to implement a lowering pass for 64-bit integers on non-GL4 GPUs. It didn't make a lot of sense to me to have an extension (public o

[Mesa-dev] [PATCH 01/24] MESA_shader_integer_functions: Add extension specification

From: Ian Romanick --- docs/specs/MESA_shader_integer_functions.txt | 519 +++ 1 file changed, 519 insertions(+) create mode 100644 docs/specs/MESA_shader_integer_functions.txt diff --git a/docs/specs/MESA_shader_integer_functions.txt b/docs/specs/MESA_shader_integer_f

[Mesa-dev] [PATCH 15/24] i965: Use LZD to implement nir_op_ufind_msb

From: Ian Romanick This uses one less instruction. Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_fs.h | 4 src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++ src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 26 +++- src/mesa/dri

[Mesa-dev] [PATCH 12/24] glsl: Add lowering pass for ir_bin_imul_high

From: Ian Romanick This isn't the lowering pass you want. Most GPUs that can support GLSL 1.30 have a multiply unit that can do something more interesting than 32x32->32. Many have 32x16->48. Any GPU that does, should do the lowering in the backend. This is just the thing that will always wor

[Mesa-dev] [PATCH 24/24] RFC nir/algebraic: Optimize open-coded nir_binop_bfm

From: Ian Romanick BFM is (((1u << a) - 1) << b). Recognize a couple patterns that look like this, and replace them with BFM. NOTE: Using lower_bitfield_insert is definitely not the right way to flag this optimization... so, I'm looking for some advice as to what the right way is. Signed-off-b

[Mesa-dev] [PATCH 22/24] nir/algebraic: Optimize fabs(u2f(x))

From: Ian Romanick I noticed this when I tried to do frexp(float(some_unsigned)) in the ir_unop_find_lsb lowering pass. The code generated for frexp() uses fabs, and this resulted in an extra instruction. Ultimately I ended up not using frexp. Signed-off-by: Ian Romanick --- src/compiler/nir

[Mesa-dev] [PATCH 04/24] MESA_shader_integer_functions: Allow implicit int->uint conversions

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/ast_to_hir.cpp | 3 ++- src/compiler/glsl_types.cpp | 13 - 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/src/compiler/glsl/ast_to_hir.cpp b/src/compiler/glsl/ast_to_hir.cpp index 0cfce68..a

[Mesa-dev] [PATCH 07/24] glsl: Add lowering pass for ir_triop_bitfield_extract

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/ir_optimization.h | 1 + src/compiler/glsl/lower_instructions.cpp | 80 2 files changed, 81 insertions(+) diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimiz

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