Re: [Mesa-dev] [PATCH] i965: Increase BRW_MAX_UBO to 15.

On Mon, Nov 30, 2015 at 4:49 PM, Kenneth Graunke wrote: > I believe that DirectX offers 16 UBOs, with one reserved for special > purposes. This means that the practical lower bound is 15, even if > OpenGL only mandates 12. > > Without this, Shadow of Mordor shaders fail to work because of limit >

Re: [Mesa-dev] [PATCH] i965: Increase BRW_MAX_UBO to 15.

How sure are you about this? This would make it very annoying to implement on recent (kepler+) nvidia hardware... there are 16 constbuf positions total, of which one has to contain texture descriptor data (mandated by the hw), and it's common to have at least one driver-internal one. If you're care

Re: [Mesa-dev] [PATCH 12/12] mesa: Drop the blacklisting of new GL enums.

On 11/25/2015 07:10 PM, Eric Anholt wrote: > Now when people need new extensions, they can skip the entire > enum-definition process, and we can stop reviewing new extension XML for > its enum content. This is only 99% true. The enums are also used for some GLX protocol generation. There isn't a

Re: [Mesa-dev] [PATCH 01/12] mesa: Cut enum_strings.cpp test down to a few hand-chosen enums.

Patches 1 through 5, and patches 7 through 12 are Reviewed-by: Ian Romanick I think patch 6 is okay, but I'd like to hear from Brian. On 11/25/2015 07:10 PM, Eric Anholt wrote: > The previous contents appeared to be the output of some form of code > generation for all enums, with a few entries

[Mesa-dev] [Bug 93089] mesa fails to check for gcc atomic primitives before using them

https://bugs.freedesktop.org/show_bug.cgi?id=93089 --- Comment #2 from Jonathan Gray --- It seems mips64 got the sync builtins later than other platforms, they are available in later versions of gcc but not gcc 4.2. Alpha also hit an ICE so for now we stopped building Mesa on alpha/mips64 in Ope

Re: [Mesa-dev] [PATCH] i965: Increase BRW_MAX_UBO to 15.

On Monday, November 30, 2015 07:55:02 PM Ilia Mirkin wrote: > How sure are you about this? This would make it very annoying to > implement on recent (kepler+) nvidia hardware... there are 16 constbuf > positions total, of which one has to contain texture descriptor data > (mandated by the hw), and

Re: [Mesa-dev] [PATCH] i965: Increase BRW_MAX_UBO to 15.

On Monday, November 30, 2015 04:51:51 PM Matt Turner wrote: > On Mon, Nov 30, 2015 at 4:49 PM, Kenneth Graunke > wrote: > > I believe that DirectX offers 16 UBOs, with one reserved for special > > purposes. This means that the practical lower bound is 15, even if > > OpenGL only mandates 12. > >

[Mesa-dev] [PATCH v2] i965: Increase BRW_MAX_UBO to 14.

The NVIDIA binary driver and Intel's closed source driver both expose 14 here, rather than the GL minimum of 12. Let's follow suit. Without this, Shadow of Mordor fails to render correctly and triggers OpenGL errors: Mesa: User error: GL_INVALID_VALUE in glBindBufferBase(index=68) Mesa: User err

Re: [Mesa-dev] [PATCH 1/3] dri_interface: Introduce __DRI_IMAGE_USE_SCANOUT_ROTATION_* flags (v3)

On Thu, 26 Nov 2015 16:44:20 +0900 Michel Dänzer wrote: > On 26.11.2015 11:01, Vivek Kasireddy wrote: > > On Wed, 25 Nov 2015 18:38:50 +0900 > > Michel Dänzer wrote: > > > >> On 21.11.2015 12:38, Vivek Kasireddy wrote: > >>> These flags can be used by the DRI driver to set additional > >>> requ

Re: [Mesa-dev] [PATCH 04/53] r600: move to using hw stages array for hw stage atoms

Hi, Am 30.11.2015 um 07:20 schrieb Dave Airlie: > From: Dave Airlie > > This moves to using an array of hw stages for the atoms. > > Signed-off-by: Dave Airlie > --- > src/gallium/drivers/r600/evergreen_state.c | 8 +++- > src/gallium/drivers/r600/r600_hw_context.c | 8 > s

Re: [Mesa-dev] [PATCH 05/53] r600: use a macro to remove common shader selection code.

On 30 November 2015 at 22:20, Oded Gabbay wrote: > On Mon, Nov 30, 2015 at 8:20 AM, Dave Airlie wrote: >> From: Dave Airlie >> >> This function is going to get a lot messier with tessellation >> so I'm going to use some macros to try and clean some bits >> of common code up. >> >> Signed-off-by:

Re: [Mesa-dev] [PATCH v2] i965: Increase BRW_MAX_UBO to 14.

Reviewed-by: Jordan Justen On 2015-11-30 17:37:38, Kenneth Graunke wrote: > The NVIDIA binary driver and Intel's closed source driver both expose > 14 here, rather than the GL minimum of 12. Let's follow suit. > > Without this, Shadow of Mordor fails to render correctly and triggers > OpenGL er

[Mesa-dev] [PATCH 1/2] r600: do SQ flush ES ring rolling workaround

From: Dave Airlie Need to insert a SQ_NON_EVENT when ever geometry shaders are enabled. Signed-off-by: Dave Airlie --- src/gallium/drivers/r600/r600_pipe.h | 2 +- src/gallium/drivers/r600/r600_state_common.c | 6 ++ src/gallium/drivers/r600/r600d.h | 1 + 3 files chang

[Mesa-dev] [PATCH 2/2] r600: SMX returns CONTEXT_DONE early workaround

From: Dave Airlie streamout, gs rings bug on certain r600s, requires a wait idle before each surface sync. Signed-off-by: Dave Airlie --- src/gallium/drivers/r600/r600_pipe.h | 2 +- src/gallium/drivers/r600/r600_state_common.c | 12 2 files changed, 13 insertions(+), 1 d

Re: [Mesa-dev] [PATCH v2] i965: Increase BRW_MAX_UBO to 14.

On Mon, Nov 30, 2015 at 8:37 PM, Kenneth Graunke wrote: > The NVIDIA binary driver and Intel's closed source driver both expose > 14 here, rather than the GL minimum of 12. Let's follow suit. > > Without this, Shadow of Mordor fails to render correctly and triggers > OpenGL errors: > > Mesa: User

Re: [Mesa-dev] [PATCH v2] i965: Increase BRW_MAX_UBO to 14.

On 12/01/2015 03:37 AM, Kenneth Graunke wrote: The NVIDIA binary driver and Intel's closed source driver both expose 14 here, rather than the GL minimum of 12. Let's follow suit. Without this, Shadow of Mordor fails to render correctly and triggers OpenGL errors: Mesa: User error: GL_INVALID_V

[Mesa-dev] [Bug 83382] /usr/include/string.h:82:1: error: unknown type name '__extern_always_inline'

https://bugs.freedesktop.org/show_bug.cgi?id=83382 Vinson Lee changed: What|Removed |Added Status|NEEDINFO|RESOLVED Resolution|---

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