Re: [Mesa-dev] [PATCH 4/4] radeonsi: add workarounds for CP DMA to stay on the fast path

On 04.11.2015 08:46, Marek Olšák wrote: > > @@ -209,11 +211,48 @@ static void si_clear_buffer(struct pipe_context *ctx, > struct pipe_resource *dst, > r600_resource(dst)->TC_L2_dirty = true; > } > > +/** > + * Realign the CP DMA engine. This must be done after a copy with an > u

Re: [Mesa-dev] [PATCH 2/4] radeonsi: unify CP DMA code determining various flags

On 04.11.2015 08:46, Marek Olšák wrote: > > @@ -115,7 +130,7 @@ static void si_clear_buffer(struct pipe_context *ctx, > struct pipe_resource *dst, > bool is_framebuffer) > { > struct si_context *sctx = (struct si_context*)ctx; > - unsigned flush_flags, tc_l2_f

Re: [Mesa-dev] [PATCH] gallium/hud: document GALLIUM_HUD_PERIOD in envvars.html.

Reviewed-by: Samuel Pitoiset On 11/04/2015 06:24 AM, Jimmy Berry wrote: --- docs/envvars.html | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/envvars.html b/docs/envvars.html index bdfe999..173c941 100644 --- a/docs/envvars.html +++ b/docs/envvars.html @@ -179,6 +179,8 @@ Mesa EG

Re: [Mesa-dev] [PATCH 4/4] nir/glsl: switch to using the builder

On Saturday, October 31, 2015 06:32:31 PM Connor Abbott wrote: > Signed-off-by: Connor Abbott > --- > src/glsl/nir/glsl_to_nir.cpp | 700 > --- > 1 file changed, 259 insertions(+), 441 deletions(-) > > diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/

Re: [Mesa-dev] [PATCH 4/4] radeonsi: add workarounds for CP DMA to stay on the fast path

On Nov 4, 2015 9:31 AM, "Michel Dänzer" wrote: > > On 04.11.2015 08:46, Marek Olšák wrote: > > > > @@ -209,11 +211,48 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst, > > r600_resource(dst)->TC_L2_dirty = true; > > } > > > > +/** > > + * Realign th

Re: [Mesa-dev] [PATCH v2] gallium/hud: control visibility at startup and runtime.

Hi Jimmy, Some comments below. On 11/04/2015 06:17 AM, Jimmy Berry wrote: - env GALLIUM_HUD_VISIBLE: control default visibility - env GALLIUM_HUD_SIGNAL_TOGGLE: toggle visibility via signal --- Thanks for the feedback. I believe all the suggested changes have been implemented. One note, all t

[Mesa-dev] [PATCH] winsys/radeon: Use CPU page size instead of hardcoding 4096 bytes

From: Michel Dänzer Fixes GPUVM conflicts with non-4K page size. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92738 Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Michel Dänzer --- src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 29 ++- 1 file changed,

[Mesa-dev] [PATCH] glsl: Relax requirement on Centroid matching between shader stages

From: Marta Lofstedt In OpenGL 4.4, section 4.5, the requirement for interpolation qualifiers to match over shader stages was removed. In OpenGL ES 3.1, section 9.2.1 there is a table showing that centroid does not have to match between shader stages. Also see bug 92743 for more discussions. Si

Re: [Mesa-dev] [PATCH 4/4] radeonsi: add workarounds for CP DMA to stay on the fast path

On 04.11.2015 17:47, Marek Olšák wrote: > On Nov 4, 2015 9:31 AM, "Michel Dänzer" > wrote: >> >> On 04.11.2015 08:46, Marek Olšák wrote: >> > >> > @@ -209,11 +211,48 @@ static void si_clear_buffer(struct > pipe_context *ctx, struct pipe_resource *dst, >> >

Re: [Mesa-dev] [PATCH] winsys/radeon: Use CPU page size instead of hardcoding 4096 bytes

On 04.11.2015 09:54, Michel Dänzer wrote: From: Michel Dänzer Fixes GPUVM conflicts with non-4K page size. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92738 Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Michel Dänzer --- src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 29

Re: [Mesa-dev] [PATCH] radeonsi: add basic glClearBufferSubData acceleration

On Nov 4, 2015 4:02 AM, "Alex Deucher" wrote: > > On Tue, Nov 3, 2015 at 6:47 PM, Marek Olšák wrote: > > From: Marek Olšák > > > > --- > > src/gallium/drivers/radeonsi/si_blit.c | 55 ++ > > 1 file changed, 55 insertions(+) > > > > diff --git a/src/gallium/driver

Re: [Mesa-dev] [PATCH] winsys/radeon: Use CPU page size instead of hardcoding 4096 bytes

On 04.11.2015 18:06, Christian König wrote: > On 04.11.2015 09:54, Michel Dänzer wrote: >> @@ -188,8 +191,11 @@ static uint64_t radeon_bomgr_find_va(struct >> radeon_bomgr *mgr, uint64_t size, ui >> struct radeon_bo_va_hole *hole, *n; >> uint64_t offset = 0, waste = 0; >> +/* Star

Re: [Mesa-dev] [PATCH v4 1/6] gallium: expose a debug message callback settable by context owner

Reviewed-by: Marek Olšák On Nov 4, 2015 6:49 AM, "Ilia Mirkin" wrote: > This will allow gallium drivers to send messages to KHR_debug endpoints > > Signed-off-by: Ilia Mirkin > --- > src/gallium/auxiliary/util/u_debug.c | 14 ++ > src/gallium/auxiliary/util/u_debug.h | 20 +

Re: [Mesa-dev] [PATCH] winsys/radeon: Use CPU page size instead of hardcoding 4096 bytes

On 04.11.2015 10:10, Michel Dänzer wrote: On 04.11.2015 18:06, Christian König wrote: On 04.11.2015 09:54, Michel Dänzer wrote: @@ -188,8 +191,11 @@ static uint64_t radeon_bomgr_find_va(struct radeon_bomgr *mgr, uint64_t size, ui struct radeon_bo_va_hole *hole, *n; uint64_t offset

[Mesa-dev] [PATCH] winsys/radeon: Use CPU page size instead of hardcoding 4096 bytes v2

From: Michel Dänzer Fixes GPUVM conflicts with non-4K page size. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92738 v2: Replace sanitization of VM base address alignment with comment why that's not necessary. Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Michel Dänzer Rev

Re: [Mesa-dev] [PATCH] i965: check inst->predicate when clearing flag_live at dead code eliminate

Gentle ping. FWIW, this patch is a really small one. PS: I already pinged Matt about this, but probably Friday evening is not the best time for reminders ;) On 22/10/15 22:25, Alejandro Piñeiro wrote: > Detected by Matt Turner while reviewing commit > a59359ecd22154cc2b3f88bb8c599f21af8a3934 > --

Re: [Mesa-dev] [PATCH] i965/vec4: select predicate based on writemask for sel emissions

Gentle ping. PS: I also pinged Matt about this, but (again) probably Friday evening is not the best time for reminders ;) On 23/10/15 16:17, Alejandro Piñeiro wrote: > Equivalent to commit 4eebeb but with sel operations. In this case > we select the PredCtrl based on the writemask. > > This chang

Re: [Mesa-dev] [PATCH v4 2/6] st/mesa: set debug callback for debug contexts

On Wed, Nov 4, 2015 at 6:49 AM, Ilia Mirkin wrote: > Signed-off-by: Ilia Mirkin > --- > src/mesa/state_tracker/st_manager.c | 56 > + > 1 file changed, 56 insertions(+) > > diff --git a/src/mesa/state_tracker/st_manager.c > b/src/mesa/state_tracker/st_manage

[Mesa-dev] [PATCH 1/2] i965: Don't include missing components in the fast clear color

It seems that if you have a surface format with less than 4 components then the sampler still reports the fast color clear value for the components that are missing. So for example if you clear a GL_RED surface to 1,1,1,1 then the sampling instructions will return 1,1,1,1 instead of 1,0,0,1. Normal

[Mesa-dev] [PATCH 2/2] mesa/blit: Don't require the same format for mulitisample blits

Previously the GL spec required that whenever glBlitFramebuffer is used with either buffer being multisampled, the internal formats must match. However the GL 4.4 spec was later changed to remove this restriction. In the section entitled “Changes in the released Specification of July 22, 2013” it s

Re: [Mesa-dev] [Intel-gfx] [PATCH v6 2/2] drm/i915: Add soft-pinning API for execbuffer

> -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of > Yang, Rong R > Sent: Wednesday, November 4, 2015 10:32 AM > To: Chris Wilson; Winiarski, Michal > Cc: intel-...@lists.freedesktop.org; Kristian H?gsberg; dri- > de...@lists.freedesktop.org

Re: [Mesa-dev] [Intel-gfx] [PATCH v6 2/2] drm/i915: Add soft-pinning API for execbuffer

> -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Chris Wilson > Sent: Wednesday, September 9, 2015 22:25 > To: Winiarski, Michal > Cc: intel-...@lists.freedesktop.org; Kristian Høgsberg; dri- > de...@lists.freedesktop.org; Goel, Akash;

[Mesa-dev] [Bug 92706] glBlitFramebuffer refuses to blit RGBA to RGB with MSAA

https://bugs.freedesktop.org/show_bug.cgi?id=92706 --- Comment #4 from Neil Roberts --- It looks like there is only one test in Piglit that attempts this. I've made a patch to make it expect the new behaviour here: http://patchwork.freedesktop.org/patch/63670/ I also made a patch to completely

Re: [Mesa-dev] [PATCH v4 1/6] gallium: expose a debug message callback settable by context owner

On 11/03/2015 10:49 PM, Ilia Mirkin wrote: This will allow gallium drivers to send messages to KHR_debug endpoints Signed-off-by: Ilia Mirkin --- src/gallium/auxiliary/util/u_debug.c | 14 ++ src/gallium/auxiliary/util/u_debug.h | 20 src/gallium/docs/source

[Mesa-dev] [RFC 2/2] Revert "Revert "mesa: enable KHR_debug for ES contexts""

This reverts commit bbf728f11b45121bf2d03b61bc0ffc69e0ff0836. Signed-off-by: Boyan Ding --- I wonder if there are still things left, but I think it is worth trying since GL_KHR_debug doesn't seem to be essentially different on GL and GLES. docs/relnotes/11.1.0.html | 1 + src/mesa/main/extensi

[Mesa-dev] [PATCH 1/2] main: Don't restrict several KHR_debug enum to desktop GL

In preparation for supporting GL_KHR_debug in OpenGL ES Signed-off-by: Boyan Ding --- src/mesa/main/enable.c| 5 + src/mesa/main/getstring.c | 5 + 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/src/mesa/main/enable.c b/src/mesa/main/enable.c index 42f6799..33000fd 10

Re: [Mesa-dev] [PATCH 20/24] Revert "i965: Have brw_imm_vf4() take the vector components as integer values."

Matt Turner writes: > On Tue, Nov 3, 2015 at 5:16 AM, Francisco Jerez wrote: >> Matt Turner writes: >> >>> This reverts commit bbf8239f92ecd79431dfa41402e1c85318e7267f. >>> >>> I didn't like that commit to begin with -- computing things at compile >>> time is fine -- but for purposes of verifyi

Re: [Mesa-dev] [PATCH 1/3] glsl: Add new barrier functions for compute shaders

Jordan Justen writes: > When these functions are called in GLSL code, we create an intrinsic > function call: > > * groupMemoryBarrier => __intrinsic_group_memory_barrier > * memoryBarrierAtomicCounter => __intrinsic_memory_barrier_atomic_counter > * memoryBarrierBuffer => __intrinsic_memory_b

Re: [Mesa-dev] [PATCH 2/3] nir: Add new barrier functions for compute shaders

Jordan Justen writes: > When these functions are called in glsl-ir, we create a corresponding > nir intrinsic function call. > > Signed-off-by: Jordan Justen Reviewed-by: Francisco Jerez > --- > src/glsl/nir/glsl_to_nir.cpp | 15 +++ > src/glsl/nir/nir_intrinsics.h | 11

Re: [Mesa-dev] [PATCH v2] gallium/hud: control visibility at startup and runtime.

Hi On Wed, 4 Nov 2015, 8:53 a.m. Samuel Pitoiset wrote: Hi Jimmy, Some comments below. On 11/04/2015 06:17 AM, Jimmy Berry wrote: > - env GALLIUM_HUD_VISIBLE: control default visibility > - env GALLIUM_HUD_SIGNAL_TOGGLE: toggle visibility via signal > --- > Thanks for the feedback. > > I belie

Re: [Mesa-dev] [PATCH v4 1/6] gallium: expose a debug message callback settable by context owner

On Wed, Nov 4, 2015 at 10:12 AM, Brian Paul wrote: > On 11/03/2015 10:49 PM, Ilia Mirkin wrote: >> >> This will allow gallium drivers to send messages to KHR_debug endpoints >> >> Signed-off-by: Ilia Mirkin >> --- >> src/gallium/auxiliary/util/u_debug.c | 14 ++ >> src/gallium/auxi

Re: [Mesa-dev] [PATCH 1/2] i965: Don't include missing components in the fast clear color

Neil Roberts writes: > Normally this doesn't matter because fast color clears are only > available on Gen7+ and for that hardware we also always set the > texture swizzle to force the missing components to zero or one. Looking at it a bit more I think this part is wrong and it doesn't actually s

Re: [Mesa-dev] [PATCH] i965: check inst->predicate when clearing flag_live at dead code eliminate

Thanks Alejandro! Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965/vec4: select predicate based on writemask for sel emissions

On Fri, Oct 23, 2015 at 7:17 AM, Alejandro Piñeiro wrote: > Equivalent to commit 4eebeb but with sel operations. In this case That commit sha doesn't exist. I suspect you meant commit 8ac3b525c. > we select the PredCtrl based on the writemask. > > This change allows cmod propagation to optimize

Re: [Mesa-dev] [PATCH] vbo: fix another GL_LINE_LOOP bug

I concur with Sinclair and Roland that the vbo code is quite tricky. I do have a question, so when the line loop spans multiple vertex buffers, where is 0th vertex stored exactly? In vbo_exec_End, you are changing src = exec->vtx.buffer_map + last_prim->start * exec->vtx.vertex_size; If the 0t

Re: [Mesa-dev] [PATCH] radeonsi: add register definitions for Stoney

On Tue, Nov 3, 2015 at 6:46 PM, Marek Olšák wrote: > From: Marek Olšák > > There are a few non-stoney changes too. Reviewed-by: Alex Deucher > --- > src/gallium/drivers/radeonsi/sid.h | 322 > + > 1 file changed, 322 insertions(+) > > diff --git a/src/gall

Re: [Mesa-dev] [PATCH] radeonsi: add basic glClearBufferSubData acceleration

On Wed, Nov 4, 2015 at 4:08 AM, Marek Olšák wrote: > On Nov 4, 2015 4:02 AM, "Alex Deucher" wrote: >> >> On Tue, Nov 3, 2015 at 6:47 PM, Marek Olšák wrote: >> > From: Marek Olšák >> > >> > --- >> > src/gallium/drivers/radeonsi/si_blit.c | 55 >> > ++ >> > 1 file

Re: [Mesa-dev] [PATCH] vbo: fix another GL_LINE_LOOP bug

On 11/04/2015 12:40 PM, Charmaine Lee wrote: I concur with Sinclair and Roland that the vbo code is quite tricky. I do have a question, so when the line loop spans multiple vertex buffers, where is 0th vertex stored exactly? It depends. If the line loop started in a new/empty VB, the 0th vert

Re: [Mesa-dev] MSVC (2015) builds

-Oryginalna wiadomość- From: Emil Velikov Sent: Tuesday, November 3, 2015 5:15 PM To: Brian Paul Cc: Janusz Ganczarski ; ML mesa-dev Subject: Re: [Mesa-dev] MSVC (2015) builds On 3 November 2015 at 15:48, Brian Paul wrote: On 11/02/2015 08:42 PM, Janusz Ganczarski wrote: Hello, In

[Mesa-dev] [PATCH v2 1/3] glsl: Add new barrier functions for compute shaders

When these functions are called in GLSL code, we create an intrinsic function call: * groupMemoryBarrier => __intrinsic_group_memory_barrier * memoryBarrierAtomicCounter => __intrinsic_memory_barrier_atomic_counter * memoryBarrierBuffer => __intrinsic_memory_barrier_buffer * memoryBarrierImage

Re: [Mesa-dev] MSVC (2015) builds

Hi, Not planed support for WoA (Windows on ARM). J.G. From: Mohamed Mediouni Sent: Tuesday, November 3, 2015 9:18 AM To: 'Janusz Ganczarski' Cc: mesa-dev@lists.freedesktop.org Subject: RE: [Mesa-dev] MSVC (2015) builds Did you care about WoA support, or not ? (ARM target, added in VC2012), com

Re: [Mesa-dev] [PATCH] vbo: fix another GL_LINE_LOOP bug

> >From: Brian Paul >Sent: Wednesday, November 4, 2015 12:03 PM >To: Charmaine Lee; mesa-dev@lists.freedesktop.org >Subject: Re: [Mesa-dev] [PATCH] vbo: fix another GL_LINE_LOOP bug >On 11/04/2015 12:40 PM, Charmaine Lee wrote: >> >> I concur with Sinclair

Re: [Mesa-dev] [PATCH] i965/vec4: select predicate based on writemask for sel emissions

On 04/11/15 20:13, Matt Turner wrote: > On Fri, Oct 23, 2015 at 7:17 AM, Alejandro Piñeiro > wrote: >> Equivalent to commit 4eebeb but with sel operations. In this case > That commit sha doesn't exist. I suspect you meant commit 8ac3b525c. Yes, probably that sha was the one on my wip branches.

Re: [Mesa-dev] [PATCH 1/2] i965: Don't include missing components in the fast clear color

On Wed, Nov 04, 2015 at 06:11:09PM +0100, Neil Roberts wrote: > Neil Roberts writes: > > > Normally this doesn't matter because fast color clears are only > > available on Gen7+ and for that hardware we also always set the > > texture swizzle to force the missing components to zero or one. > > L

Re: [Mesa-dev] [PATCH v3 2/2] mesa/meta: Use interpolateAtOffset for 16x MSAA copy blit

On Thu, Oct 22, 2015 at 2:34 AM, Neil Roberts wrote: > Previously there was a problem in i965 where if 16x MSAA is used then > some of the sample positions are exactly on the 0 x or y axis. When > the MSAA copy blit shader interpolates the texture coordinates at > these sample positions it was pos

Re: [Mesa-dev] [PATCH] i965/vec4: select predicate based on writemask for sel emissions

On Wed, Nov 4, 2015 at 1:01 PM, Alejandro Piñeiro wrote: > On 04/11/15 20:13, Matt Turner wrote: >> On Fri, Oct 23, 2015 at 7:17 AM, Alejandro Piñeiro >> wrote: >>> Equivalent to commit 4eebeb but with sel operations. In this case >> That commit sha doesn't exist. I suspect you meant commit 8ac3

[Mesa-dev] Potential spec change request for EXT_buffer_storage

I'm hoping to potentially convince about lowering the minimum requirement of EXT_buffer_storage from ES 3.1 to ES 3.0. The only thing that causes it to require ES 3.1 is glMemoryBarrier, which shouldn't really be a hard requirement since the extension can be used without it. This is also a similar

[Mesa-dev] [PATCH 1/3] glsl: Drop exec_list argument to lower_ubo_reference

We always pass in shader->ir and we already pass in the shader, so just drop the exec_list. Most passes either take just a exec_list or a shader, so this seems more consistent. Signed-off-by: Kristian Høgsberg Kristensen --- src/glsl/ir_optimization.h | 2 +- src/glsl/lower_ubo_r

[Mesa-dev] [PATCH 2/3] glsl: Lower UBO and SSBO access in glsl linker

All GLSL IR consumers run this lowering pass so we can move it to the linker. This moves the pass up quite a bit, but that's the point: it needs to run before we throw away information about per-component vector access. Signed-off-by: Kristian Høgsberg Kristensen --- src/glsl/linker.cpp

[Mesa-dev] [PATCH 0/3] Fix racy full-vector writes for v[i].x

This little series fixes a problem where we lower v[i] = s to v = vector_insert(v, s, i) turning a component write into a full vector write. This used to be ok, since none of this was visible to other threads. Now with SSBOs (and compute shader SLM and tesselation outputs) this rewrite is

[Mesa-dev] [PATCH 3/3] glsl: Use array deref for access to vector components

We've assumed that we could lower per-component vector access from vec[i] = scalar to vec = ir_triop_vector_insert(vec, scalar, i) but with SSBOs (and compute shader SLM and tesselation outputs) this is no longer valid. If a vector is "externally visible", multiple threads can write indepen

Re: [Mesa-dev] [PATCH] vbo: fix another GL_LINE_LOOP bug

On 11/04/2015 01:56 PM, Charmaine Lee wrote: From: Brian Paul Sent: Wednesday, November 4, 2015 12:03 PM To: Charmaine Lee; mesa-dev@lists.freedesktop.org Subject: Re: [Mesa-dev] [PATCH] vbo: fix another GL_LINE_LOOP bug On 11/04/2015 12:40 PM, Charm

Re: [Mesa-dev] [PATCH 0/3] Fix racy full-vector writes for v[i].x

Here's some shader-db numbers: total instructions in shared programs: 6236146 -> 6255385 (0.31%) instructions in affected programs: 203629 -> 222868 (9.45%) helped:118 HURT: 1989 GAINED:18 LOST:

[Mesa-dev] [PATCH 2/7] i965: Add a variant of lower_mesa_image_format that takes native formats

Eventually, we'll switch over to this new function and delete the old one completely. However, duplicating it both makes the transition smoother and allows us to assert that they are the same. While we're at it, we start a new file for collecting the various bits of the image_load_store workaroun

[Mesa-dev] [PATCH 0/7] i965: Use native formats in fs_surface_builder

This little patch series converts fs_surface_builder to use native formats for doing all of its image_load_store workaround tricks. If you're willing to take as an axiom that we want to not link the backend compiler against core mesa, this leaves us with three options: 1) Pull mesa_format.h and

[Mesa-dev] [PATCH 4/7] i965/fs: Use image_format_info for doing image_load_store workarounds

--- .../drivers/dri/i965/brw_fs_surface_builder.cpp| 157 ++--- 1 file changed, 106 insertions(+), 51 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp b/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp index 31ecb5b..d841ffe 100644 --- a/src/

[Mesa-dev] [PATCH 3/7] i965: Add an image format metadata array

This little data structure and associated array contains all of the image format metadata needed for doing image_load_store work-arounds. This way we can pull metadata from within the i965 driver without having to go out to core mesa for it. It is a bit of duplication with what we have in core me

[Mesa-dev] [PATCH 5/7] i965/image_load_store: Add a brw_image_format_for_gl_format helper

--- src/mesa/drivers/dri/i965/brw_image_load_store.c | 49 src/mesa/drivers/dri/i965/brw_image_load_store.h | 2 + 2 files changed, 51 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_image_load_store.c b/src/mesa/drivers/dri/i965/brw_image_load_store.c index b7

[Mesa-dev] [PATCH 7/7] i965: Remove brw_lower_mesa_image_format

Now that the compiler is all switched over to brw_lower_image_format and state-setup doesn't need it, we can get rid of the old helper. --- src/mesa/drivers/dri/i965/brw_context.h | 2 - src/mesa/drivers/dri/i965/brw_surface_formats.c | 109 --- src/mesa/drivers/dri

[Mesa-dev] [PATCH 6/7] i965/fs_surface_builder: Work in terms of native formats

--- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 7 --- src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp | 14 ++ src/mesa/drivers/dri/i965/brw_fs_surface_builder.h | 4 ++-- 3 files changed, 12 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/dri/i96

[Mesa-dev] [PATCH 1/7] i965/fs_surface_builder: Explicitly handle FORMAT_NONE in num_image_coordinates

Previously, we were relying on has_matching_typed_format returning true for MESA_FORMAT_NONE which, in turn, relied on _mesa_get_format_bytes returning 1 for MESA_FORMAT_NONE. All of this is extremely non-obvious. Instead, this commit makes us handle it explicitly. --- src/mesa/drivers/dri/i965/

Re: [Mesa-dev] [PATCH 5/7] i965/image_load_store: Add a brw_image_format_for_gl_format helper

On Wed, Nov 4, 2015 at 8:03 PM, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/brw_image_load_store.c | 49 > > src/mesa/drivers/dri/i965/brw_image_load_store.h | 2 + > 2 files changed, 51 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_image_load

[Mesa-dev] [PATCH] gbm: Add a flag to enable creation of rotated scanout buffers (v2)

For certain platforms that support rotated scanout buffers, currently, there is no way to create them with the GBM DRI interface. This flag will instruct the DRI driver to create the buffer by setting additional requirements such as tiling mode. v2: Reserve a bit per angle. (Ville and Michel) Cc:

Re: [Mesa-dev] [PATCH 5/7] i965/image_load_store: Add a brw_image_format_for_gl_format helper

On Wed, Nov 4, 2015 at 5:10 PM, Ilia Mirkin wrote: > On Wed, Nov 4, 2015 at 8:03 PM, Jason Ekstrand wrote: >> --- >> src/mesa/drivers/dri/i965/brw_image_load_store.c | 49 >> >> src/mesa/drivers/dri/i965/brw_image_load_store.h | 2 + >> 2 files changed, 51 insertions(+

Re: [Mesa-dev] [PATCH 5/7] i965/image_load_store: Add a brw_image_format_for_gl_format helper

On Wed, Nov 4, 2015 at 9:47 PM, Jason Ekstrand wrote: > On Wed, Nov 4, 2015 at 5:10 PM, Ilia Mirkin wrote: >> On Wed, Nov 4, 2015 at 8:03 PM, Jason Ekstrand wrote: >>> --- >>> src/mesa/drivers/dri/i965/brw_image_load_store.c | 49 >>> >>> src/mesa/drivers/dri/i965/brw_

Re: [Mesa-dev] RFC: parallel shader compiles in mesa

On Sun, Nov 1, 2015 at 4:27 PM, Connor Abbott wrote: > There was already some work done for this (with i965) a while back: > > http://lists.freedesktop.org/archives/mesa-dev/2014-July/063008.html > > IIRC the reason it didn't get merged was that Chia never actually made > sure that the compiler wa

[Mesa-dev] [PATCH] st/mesa: account for texture views when doing CopyImageSubData

Signed-off-by: Ilia Mirkin --- src/mesa/state_tracker/st_cb_copyimage.c | 8 1 file changed, 8 insertions(+) diff --git a/src/mesa/state_tracker/st_cb_copyimage.c b/src/mesa/state_tracker/st_cb_copyimage.c index 75114cd..03a7294 100644 --- a/src/mesa/state_tracker/st_cb_copyimage.c +++

Re: [Mesa-dev] [PATCH v2] gallium/hud: control visibility at startup and runtime.

Hi, Changes are straightforward and make sense. I had a followup on one. On Wed, Nov 4, 2015 at 10:14 AM, Mike Lothian wrote: > Hi > > On Wed, 4 Nov 2015, 8:53 a.m. Samuel Pitoiset > wrote: > > Hi Jimmy, > > Some comments below. > > On 11/04/2015 06:17 AM, Jimmy Berry wrote: >> - env GALLIUM_H

Re: [Mesa-dev] RFC: parallel shader compiles in mesa

On Wed, Nov 4, 2015 at 8:43 PM, Matt Turner wrote: > On Sun, Nov 1, 2015 at 4:27 PM, Connor Abbott wrote: >> There was already some work done for this (with i965) a while back: >> >> http://lists.freedesktop.org/archives/mesa-dev/2014-July/063008.html >> >> IIRC the reason it didn't get merged wa

Re: [Mesa-dev] [PATCH] gbm: Add a flag to enable creation of rotated scanout buffers (v2)

On 05.11.2015 11:32, Vivek Kasireddy wrote: > For certain platforms that support rotated scanout buffers, currently, > there is no way to create them with the GBM DRI interface. This flag > will instruct the DRI driver to create the buffer by setting > additional requirements such as tiling mode. >

Re: [Mesa-dev] [PATCH] gbm: Add a flag to enable creation of rotated scanout buffers (v2)

On Thu, Nov 5, 2015 at 1:34 AM, Michel Dänzer wrote: > On 05.11.2015 11:32, Vivek Kasireddy wrote: >> For certain platforms that support rotated scanout buffers, currently, >> there is no way to create them with the GBM DRI interface. This flag >> will instruct the DRI driver to create the buffer