These should never happen. Plus, NIR passes really shouldn't be
reporting linker errors - this is past link time.
Signed-off-by: Kenneth Graunke
---
src/glsl/nir/nir_lower_samplers.cpp | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/src/glsl/nir/nir_lower_samplers.c
prog_to_nir should not modify the incoming Mesa IR program - just
translate it.
Signed-off-by: Kenneth Graunke
---
src/mesa/program/prog_to_nir.c | 4 ++--
src/mesa/program/prog_to_nir.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/program/prog_to_nir.c b/src/m
Now that we store a copy of the NIR shader, and don't immediately free
it, we can use it in annotations as well.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 4
src/mesa/drivers/dri/i965/intel_asm_annotation.c | 5 -
2 files changed, 8 insertions
Nothing actually wanted brw_shader fields - we just had to type
shader->base all over the place for no reason.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 63
1 file changed, 31 insertions(+), 32 deletions(-)
diff --git a/src/me
Now that we're not generating linker errors, we don't actually modify
this.
Signed-off-by: Kenneth Graunke
---
src/glsl/nir/nir.h | 2 +-
src/glsl/nir/nir_lower_samplers.cpp | 10 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/glsl/nir/nir.h b/src
Storing this here is pretty sketchy - I don't know if any driver other
than i965 will want to use it. But this will make it a lot easier to
generate NIR code at link time. We'll probably rework it anyway.
Signed-off-by: Kenneth Graunke
---
src/glsl/nir/nir.h | 3 +++
src/
This function was getting a bit large and unwieldy.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 192 ---
1 file changed, 99 insertions(+), 93 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/
This header was originally going to be called pipeline.h, but it got
renamed at the last minute. Make the include guards match.
Signed-off-by: Kenneth Graunke
---
src/glsl/shader_enums.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/glsl/shader_enums.h b/src/glsl
I want to use this in some code that doesn't currently include mtypes.h.
It seems like a better place for it anyway.
Signed-off-by: Kenneth Graunke
---
src/glsl/nir/nir.h | 1 +
src/glsl/shader_enums.h | 17 +
src/mesa/main/mtypes.h | 19 ---
3 files change
Previously, we translated into NIR and did all the optimizations and
lowering as part of running fs_visitor. This meant that we did all of
that work twice for fragment shaders - once for SIMD8, and again for
SIMD16. We also had to redo it every time we hit a state based
recompile.
We now generat
This makes it so emit_nir_code() doesn't modify the GLSL IR.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 -
src/mesa/drivers/dri/i965/brw_shader.cpp | 3 +++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
Hello,
This series makes i965 generate NIR at link time (or ProgramStringNotify
time for ARB programs), rather than on each FS/VS compile. This means
we only do it once, rather than for SIMD8 and again for SIMD16 programs.
It also means we can avoid it when doing state based recompiles.
It speed
We don't actually need a gl_program struct. We only used it to
translate prog->Target (i.e. GL_VERTEX_PROGRAM) to the gl_shader_stage
(i.e. MESA_SHADER_VERTEX). We may as well just pass that.
Signed-off-by: Kenneth Graunke
---
src/glsl/nir/nir.h | 2 +-
src/glsl/nir/nir_
On 07.04.2015 21:54, Chad Versace wrote:
On Thu 02 Apr 2015, Axel Davy wrote:
Hi,
you may be interesting look at this related bug report:
https://bugs.freedesktop.org/show_bug.cgi?id=87452#c5
Yours,
Axel Davy
On 02/04/2015 11:58, Volker Vogelhuber wrote :
We currently want to stream OpenGL o
On 08/04/15 10:06, Kenneth Graunke wrote:
Previously, we translated into NIR and did all the optimizations and
lowering as part of running fs_visitor. This meant that we did all of
that work twice for fragment shaders - once for SIMD8, and again for
SIMD16. We also had to redo it every time we
Fixes assert triggered by
ext_transform_feedback-intervening-read output use_gs
piglit test.
Signed-off-by: Glenn Kennard
---
src/gallium/drivers/r600/sb/sb_sched.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/r600/sb/sb_sched.cpp
b/src/gallium/drivers/r600/sb/sb
On 04/08/2015 01:36 AM, Ian Romanick wrote:
On 04/07/2015 03:22 AM, Francisco Jerez wrote:
Tapani Pälli writes:
From: Kalyan Kondapally
Dynamic indexing of sampler arrays is prohibited by GLSL ES 3.00.
Earlier versions allow 'constant-index-expression' indexing, where
index can contain a
Hi,
(sorry for possible double-posting, i sent this earlier but before
subscribing to mesa-dev list)
I have an issue where st_TexSubImage causes very high CPU load in
__memcpy_sse2_unaligned (Mesa 10.1.3, Xorg 1.15.1, radeon driver, HD 7870).
Any obvious causes / tips for this? e.g. align textur
Hi,
On 8 April 2015 at 10:57, Vasilis Liaskovitis wrote:
> I have an issue where st_TexSubImage causes very high CPU load in
> __memcpy_sse2_unaligned (Mesa 10.1.3, Xorg 1.15.1, radeon driver, HD 7870).
>
> Any obvious causes / tips for this? e.g. align textures or use different
> format/type? I
It seems a bit strange that this has stopped working for you. If you
specify a mode in the .dir-locals.el file then it's supposed to set the
variable for any files with that mode or any modes inherited from that
mode. The C and C++ modes both inherit from prog-mode, as well as a
bunch of other ones
From: Rob Clark
Only needs to be a vec1, and this helps out the later opt stages. From
the shader (after opt) for fs-temp-array-mat3-index-col-row-wr goes,
before:
vec1 ssa_408 = imul ssa_155, ssa_1
vec4 ssa_413 = vec4 ssa_408, ssa_412.y, ssa_412.z, ssa_412.w
vec4 ssa_16
On Wed 08 Apr 2015, Volker Vogelhuber wrote:
On 07.04.2015 21:54, Chad Versace wrote:
On Thu 02 Apr 2015, Axel Davy wrote:
Hi,
you may be interesting look at this related bug report:
https://bugs.freedesktop.org/show_bug.cgi?id=87452#c5
Yours,
Axel Davy
On 02/04/2015 11:58, Volker Vogelhube
Rob Clark writes:
> From: Rob Clark
>
> Since the rest of NIR really would rather have these as variables rather
> than registers, create a nir_variable per array. But rather than
> completely re-arrange ttn to be variable based rather than register
> based, keep the registers. In the cases wh
On Wed, Apr 08 2015, Neil Roberts wrote:
> It seems a bit strange that this has stopped working for you.
Yes. I don't understand exactly what's going on.
> mode. The C and C++ modes both inherit from prog-mode, as well as a
> bunch of other ones such as Python and lisp files.
That's what I guess
On Tue, Apr 7, 2015 at 4:52 PM, Connor Abbott wrote:
> Hi Thomas,
>
> Thanks for submitting a proposal! Some comments/answers below.
>
> On Tue, Apr 7, 2015 at 3:34 PM, Thomas Helland
> wrote:
>> Hi,
>>
>> For those that don't know I've submitted a proposal for this years GSoC.
>> I've proposed t
Hi Olivier
Thanks for the patch !
Adding Jose to the Cc list as I believe he'll have some input on the topic.
On 3 April 2015 at 15:06, wrote:
> From: Olivier Pena
>
> ---
> src/gallium/SConscript | 5
> src/gallium/state_trackers/osmesa/SConscript | 25 ++
As mentioned by Michel Dänzer for LLVM >= 3.6 we create the
LLVMTargetMachine (with triple amdgcn--), as we setup the radeonsi
context. For older LLVM or hardware (r600) the triple is always r600--
and is created at a later stage - radeon_llvm_compile()
Cc: Michel Dänzer
Signed-off-by: Emil Velik
Hi Tom,
Just a friendly reminder that this patch hasn't landed in master yet.
Just making sure it doesn't fall through the cracks :-)
Cheers
Emil
On 24 March 2015 at 19:44, Tom Stellard wrote:
> Cc: 10.5 10.4
> ---
> src/gallium/state_trackers/clover/api/program.cpp | 4
> 1 file changed
Hi all,
Can we get a pair of eyes on this patch please ?
Boyan
For the future can you please include the CC mesa-stable line in the
commit message. It will make things a bit more obvious as I'm pursing
through the list :-)
Thanks
Emil
On 25 March 2015 at 11:36, Boyan Ding wrote:
> Some applica
On Wed, Apr 8, 2015 at 2:25 AM, Martin Peres
wrote:
> On 08/04/15 10:06, Kenneth Graunke wrote:
>>
>> Previously, we translated into NIR and did all the optimizations and
>> lowering as part of running fs_visitor. This meant that we did all of
>> that work twice for fragment shaders - once for SI
On Wed, Apr 8, 2015 at 12:06 AM, Kenneth Graunke wrote:
> Storing this here is pretty sketchy - I don't know if any driver other
> than i965 will want to use it. But this will make it a lot easier to
> generate NIR code at link time. We'll probably rework it anyway.
Yeah, it's sketchy but, hone
Series is
Reviewed-by: Jason Ekstrand
On Wed, Apr 8, 2015 at 12:06 AM, Kenneth Graunke wrote:
> Hello,
>
> This series makes i965 generate NIR at link time (or ProgramStringNotify
> time for ARB programs), rather than on each FS/VS compile. This means
> we only do it once, rather than for SIMD
Hi Tom,
Ping for patch#2 for clover. Do let me know if either one is no longer
applicable.
Thanks
Emil
On 25 March 2015 at 17:43, Tom Stellard wrote:
> Cc: 10.5 10.4
> ---
> src/gallium/state_trackers/clover/core/event.cpp | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On Wed, Apr 08, 2015 at 07:41:55PM +0100, Emil Velikov wrote:
> Hi Tom,
>
> Ping for patch#2 for clover. Do let me know if either one is no longer
> applicable.
>
This patch was rejected, it's no longer applicable.
-Tom
> Thanks
> Emil
>
> On 25 March 2015 at 17:43, Tom Stellard wrote:
> > C
Series looks good to me.
Just a few suggestions inline.
On 04/04/15 15:50, srol...@vmware.com wrote:
From: Roland Scheidegger
llvm goes crazy when doing that, using way more memory and time, though there's
probably more to it - this points to a very much similar issue as fixed in
8a9f5ecdb11
On Wed, Apr 8, 2015 at 11:14 AM, Eric Anholt wrote:
> Rob Clark writes:
>
>> From: Rob Clark
>>
>> Since the rest of NIR really would rather have these as variables rather
>> than registers, create a nir_variable per array. But rather than
>> completely re-arrange ttn to be variable based rathe
On 04/08/2015 12:06 AM, Kenneth Graunke wrote:
> Storing this here is pretty sketchy - I don't know if any driver other
> than i965 will want to use it. But this will make it a lot easier to
> generate NIR code at link time. We'll probably rework it anyway.
>
> Signed-off-by: Kenneth Graunke
>
On 04/08/2015 02:25 AM, Martin Peres wrote:
> On 08/04/15 10:06, Kenneth Graunke wrote:
>> Previously, we translated into NIR and did all the optimizations and
>> lowering as part of running fs_visitor. This meant that we did all of
>> that work twice for fragment shaders - once for SIMD8, and aga
Patches 1 through 9 and 12 are
Reviewed-by: Ian Romanick
The other 3 have some comments / discussion.
On 04/08/2015 12:06 AM, Kenneth Graunke wrote:
> Hello,
>
> This series makes i965 generate NIR at link time (or ProgramStringNotify
> time for ARB programs), rather than on each FS/VS compile
Besides the issue Emil mentioned, one minor request: lets call the
target just "osmesa". As we don't plan to have any other "osmesa" target.
Jose
On 08/04/15 18:18, Emil Velikov wrote:
Hi Olivier
Thanks for the patch !
Adding Jose to the Cc list as I believe he'll have some input on the to
https://bugs.freedesktop.org/show_bug.cgi?id=89823
Dan Sebald changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On 04/08/2015 01:46 PM, Jason Ekstrand wrote:
> On Wed, Apr 8, 2015 at 12:53 PM, Ian Romanick wrote:
>> On 04/08/2015 02:25 AM, Martin Peres wrote:
>>> On 08/04/15 10:06, Kenneth Graunke wrote:
Previously, we translated into NIR and did all the optimizations and
lowering as part of runni
https://bugs.freedesktop.org/show_bug.cgi?id=89963
Bug ID: 89963
Summary: lp_bld_debug.cpp:100:31: error: no matching function
for call to ‘llvm::raw_ostream::raw_ostream()’
Product: Mesa
Version: git
Hardware: x86-64 (AMD6
From: Rob Clark
Extract tgsi_dst->Index into a local.. split out from 'gallium/ttn: add
support for temp arrays' for noise reduction..
Signed-off-by: Rob Clark
---
src/gallium/auxiliary/nir/tgsi_to_nir.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/galliu
From: Ian Romanick
This method is similar to the existing ::equals method. Instead of
testing that two src_regs are equal to each other, it tests that one is
the negation of the other.
Signed-off-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_ir_vec4.h | 1 +
src/mesa/drivers/dri/i965/br
From: Matt Turner
Shader-db results:
GM45:
total instructions in shared programs: 4060151 -> 4059575 (-0.01%)
instructions in affected programs: 81478 -> 80902 (-0.71%)
helped:441
HURT: 4
GM45 NIR:
total instructions in shared
From: Ian Romanick
ir_rvalue_visitor visits each rvalue on exit. When visiting a large
expression, the leaf expressions will be visited and eliminated first.
Once one leaf expression was replaced, it would no longer match a
potentially much larger tree. This means that code like:
x = a + (
From: Ian Romanick
This is similar to commit (47c4b38: i965/fs: Allow CSE to handle MULs
with negated arguments.), but it uses a slightly different approach.
Shader-db results:
GM45:
total instructions in shared programs: 4060813 -> 4060151 (-0.02%)
instructions in affected programs: 13448
Am 08.04.2015 um 21:13 schrieb Jose Fonseca:
> Series looks good to me.
>
> Just a few suggestions inline.
>
>
> On 04/04/15 15:50, srol...@vmware.com wrote:
>> From: Roland Scheidegger
>>
>> llvm goes crazy when doing that, using way more memory and time,
>> though there's
>> probably more to
https://bugs.freedesktop.org/show_bug.cgi?id=89960
Bug ID: 89960
Summary: [softpipe] piglit copy-pixels regreession
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Keywords:
On Wed, Apr 8, 2015 at 6:34 PM, Rob Clark wrote:
> From: Rob Clark
>
> Since the rest of NIR really would rather have these as variables rather
> than registers, create a nir_variable per array. But rather than
> completely re-arrange ttn to be variable based rather than register
> based, keep t
Please consider i915 as well.
Should it be add to .../dri/i915/intel_screen.c?
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c
b/src/mesa/drivers/dri/i915/intel_screen.c
index 34efb29..5cd2a9b 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.
https://bugs.freedesktop.org/show_bug.cgi?id=89963
Vinson Lee changed:
What|Removed |Added
Keywords||bisected
--- Comment #1 from Vinson Lee --
On Wed, Apr 8, 2015 at 12:53 PM, Ian Romanick wrote:
> On 04/08/2015 02:25 AM, Martin Peres wrote:
>> On 08/04/15 10:06, Kenneth Graunke wrote:
>>> Previously, we translated into NIR and did all the optimizations and
>>> lowering as part of running fs_visitor. This meant that we did all of
>>> th
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89963
Signed-off-by: Vinson Lee
---
src/gallium/auxiliary/gallivm/lp_bld_debug.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp
b/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp
index
From: Rob Clark
Only needs to be a vec1, and this helps out the later opt stages. From
the shader (after opt) for fs-temp-array-mat3-index-col-row-wr goes,
before:
vec1 ssa_408 = imul ssa_155, ssa_1
vec4 ssa_413 = vec4 ssa_408, ssa_412.y, ssa_412.z, ssa_412.w
vec4 ssa_16
From: Rob Clark
Since the rest of NIR really would rather have these as variables rather
than registers, create a nir_variable per array. But rather than
completely re-arrange ttn to be variable based rather than register
based, keep the registers. In the cases where there is a matching var
for
Reviewed-by: Ian Romanick
On 04/07/2015 09:33 AM, Brian Paul wrote:
> Ping.
>
> On 04/01/2015 02:38 PM, Brian Paul wrote:
>> This is a follow-on fix from the earlier "glsl: allow ForceGLSLVersion
>> to override #version directives" change. Since we're not changing
>> the language_version field,
Hi,
I'm trying to build mesa on windows (MSVC) with gles support and with llvm.
Here are the keys I'm using:
scons.py gles=yes llvm=yes platform=windows libgl-gd
I'm getting a bunch of errors like this:
LLVMCore.lib(ValueSymbolTable.obj) : error LNK2038: mismatch detected for
'RuntimeLibrary'
This series is a blending of some work that I have done and some work
that Matt did. This series and some patches that didn't pan out (at
least not after some other recent chages) are available on the cse-neg
branch of my fdo tree.
The overall results for the series are:
GM45:
total instructions
From: Matt Turner
We propagate negations to the right-most leaves of the multiplication
expression trees:
- mul(neg(x), neg(y)) -> mul(x, y)
- mul(neg(x), y) -> neg(mul(x, y))
- mul(x, neg(y)) -> neg(mul(x, y))
Sandy Bridge w/o NIR and Broadwell w/o NIR are the only platforms hurt
by this ch
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