From: Rob Clark <robcl...@freedesktop.org>
Only needs to be a vec1, and this helps out the later opt stages. From
the shader (after opt) for fs-temp-array-mat3-index-col-row-wr goes,
before:
vec1 ssa_408 = imul ssa_155, ssa_1
vec4 ssa_413 = vec4 ssa_408, ssa_412.y, ssa_412.z, ssa_412.w
vec4 ssa_166 = intrinsic load_uniform () () (0, 1)
vec4 ssa_772 = vec4 ssa_166, ssa_166.y, ssa_166.z, ssa_166.z
intrinsic store_var (ssa_772) (arr_5[ssa_413]) ()
vec4 ssa_416 = vec4 ssa_408, ssa_412.y, ssa_412.z, ssa_412.w
vec4 ssa_178 = intrinsic load_uniform () () (1, 1)
vec4 ssa_787 = vec4 ssa_178, ssa_178.y, ssa_178.z, ssa_178.z
intrinsic store_var (ssa_787) (arr_5[1 + ssa_416]) ()
vec4 ssa_190 = intrinsic load_uniform () () (2, 1)
vec4 ssa_802 = vec4 ssa_190, ssa_190.y, ssa_190.z, ssa_190.z
intrinsic store_var (ssa_802) (arr_5[2 + ssa_416]) ()
after:
vec1 ssa_408 = imul ssa_155, ssa_1
vec4 ssa_166 = intrinsic load_uniform () () (0, 1)
vec4 ssa_763 = vec4 ssa_166, ssa_166.y, ssa_166.z, ssa_166.z
intrinsic store_var (ssa_763) (arr_5[ssa_408]) ()
vec4 ssa_178 = intrinsic load_uniform () () (1, 1)
vec4 ssa_778 = vec4 ssa_178, ssa_178.y, ssa_178.z, ssa_178.z
intrinsic store_var (ssa_778) (arr_5[1 + ssa_408]) ()
vec4 ssa_190 = intrinsic load_uniform () () (2, 1)
vec4 ssa_793 = vec4 ssa_190, ssa_190.y, ssa_190.z, ssa_190.z
intrinsic store_var (ssa_793) (arr_5[2 + ssa_408]) ()
ie. it realizes the indirect is the same for all three store_var's
which avoids my backend generating duplicate (mov (shl (cov)))
instruction chains.
Signed-off-by: Rob Clark <robcl...@freedesktop.org>
---
src/gallium/auxiliary/nir/tgsi_to_nir.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index f4c0bad..5bd8ca0 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -148,7 +148,7 @@ ttn_emit_declaration(struct ttn_compile *c)
}
} else if (file == TGSI_FILE_ADDRESS) {
c->addr_reg = nir_local_reg_create(b->impl);
- c->addr_reg->num_components = 4;
+ c->addr_reg->num_components = 1;
} else if (file == TGSI_FILE_SAMPLER) {
/* Nothing to record for samplers. */
} else {
--
2.1.0
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