On Wed, Sep 22, 2010 at 6:15 AM, Dave Airlie wrote:
> On Wed, Sep 22, 2010 at 7:50 PM, Keith Whitwell
> wrote:
>> On Wed, Sep 22, 2010 at 10:30 AM, Dave Airlie wrote:
>>> So Evergreen hardware appears to have only completely separate depth
>>> and stencil buffers and doesn't natively support a c
On 22.09.2010 23:03, Ian Romanick wrote:
> Dave Airlie wrote:
>> So Evergreen hardware appears to have only completely separate depth
>> and stencil buffers and doesn't natively support a combnined DS buffer
>> from what I can see. I'm awaiting clarification from AMD.
>
>> Now gallium and st/mesa
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Dave Airlie wrote:
> So Evergreen hardware appears to have only completely separate depth
> and stencil buffers and doesn't natively support a combnined DS buffer
> from what I can see. I'm awaiting clarification from AMD.
>
> Now gallium and st/mesa
On Wed, Sep 22, 2010 at 8:20 PM, Keith Whitwell
wrote:
> On Wed, Sep 22, 2010 at 11:15 AM, Dave Airlie wrote:
>
I'm mainly posting just wondering if anyone else has considered this
or any other hardware this might be useful for exists, or if anyone
can speak to the pitfalls I'll fa
On Wed, Sep 22, 2010 at 11:15 AM, Dave Airlie wrote:
>>> I'm mainly posting just wondering if anyone else has considered this
>>> or any other hardware this might be useful for exists, or if anyone
>>> can speak to the pitfalls I'll face.
>>>
>>> I've got some initial done in 30 mins hacks
>>> ht
On Wed, Sep 22, 2010 at 7:50 PM, Keith Whitwell
wrote:
> On Wed, Sep 22, 2010 at 10:30 AM, Dave Airlie wrote:
>> So Evergreen hardware appears to have only completely separate depth
>> and stencil buffers and doesn't natively support a combnined DS buffer
>> from what I can see. I'm awaiting clar
On Wed, Sep 22, 2010 at 10:30 AM, Dave Airlie wrote:
> So Evergreen hardware appears to have only completely separate depth
> and stencil buffers and doesn't natively support a combnined DS buffer
> from what I can see. I'm awaiting clarification from AMD.
>
> Now gallium and st/mesa seem to be qu