On Fri, Aug 5, 2016 at 9:51 AM, Nanley Chery wrote:
> On Thu, Aug 04, 2016 at 08:07:08PM -0700, Jason Ekstrand wrote:
> > Drp... There's more work to do here to get the behavior 100% correct on
> > gen7 but this fixes a bug and is a step in the right direction.
> >
>
> You're right. To be more ac
On Thu, Aug 04, 2016 at 08:07:08PM -0700, Jason Ekstrand wrote:
> Drp... There's more work to do here to get the behavior 100% correct on
> gen7 but this fixes a bug and is a step in the right direction.
>
You're right. To be more accurate, I'll rename the commit title to:
"anv/gen7_pipeline: Set
Drp... There's more work to do here to get the behavior 100% correct on
gen7 but this fixes a bug and is a step in the right direction.
Reviewed-by: Jason Ekstrand
Unfortunately, gen7 is a bit crazy so the simple solution doesn't cover all
the cases. For the full fix take a look at
https://cgi
According to the IVB PRM Vol2 P1, this bit must be set if a pixel shader
contains a discard instruction.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97207
Cc: "12.0"
Signed-off-by: Nanley Chery
---
src/intel/vulkan/gen7_pipeline.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/s
