On Thu, 2020-03-19 at 21:57 +0100, Mark Menzynski wrote:
> From: Karol Herbst
>
> Split out the output relevant fields from the nv50_ir_prog_info struct
> in order to have a cleaner separation between the input and output of
> the compilation.
>
Please, submit the series through GitLab (
https
On Thu, 2020-03-19 at 21:20 +0100, Mark Menzynski wrote:
> This separation will be needed for shader disk caching. The reason for it
> is that when loading shaders from cache, data in info structure already gets
> loaded. That means varying bits for info is needed only when compiling
> shaders and
On Fri, 2019-12-13 at 13:35 -0800, Eric Anholt wrote:
> I finally got back around to experimenting with the gitlab merge bot,
> and it turns out that the day I spent a few weeks back I had actually
> given up 5 minutes before the finish line.
>
> Marge is now enabled for mesa/mesa, piglit, and par
set no context as current.
Jason Ekstrand (2):
nir/repair_ssa: Replace the unreachable check with the phi builder
intel/fs: Fix fs_inst::flags_read for ANY/ALL predicates
Juan A. Suarez Romero (12):
docs: add sha256 checksums for 19.1.7
cherry-ignore: add explicit 19.2 only
xt as current.
Jason Ekstrand (2):
nir/repair_ssa: Replace the unreachable check with the phi builder
intel/fs: Fix fs_inst::flags_read for ANY/ALL predicates
Juan A. Suarez Romero (2):
Revert "Revert "intel/fs: Move the scalar-region conversion to the
generator.&qu
On Wed, 2019-09-18 at 12:08 -0700, Mark Janes wrote:
> Adding the release managers to the CC to make sure they see the thread...
>
> Dylan Baker writes:
>
> > Hi everyone,
> >
> > Since we're migrating to gitlab issues, it seems like a good time to review
> > how
> > we track stable releases,
initely recurse in lower_ssa_defs_to_regs_block
nir: Add a block_is_unreachable helper
nir/repair_ssa: Repair dominance for unreachable blocks
nir/repair_ssa: Insert deref casts when needed
nir/dead_cf: Repair SSA if the pass makes progress
Juan A. Suarez Romero (4):
d
Hello list,
The candidate for the Mesa 19.1.7 is now available. Currently we have:
- 30 queued
- 0 nominated (outstanding)
- and 0 rejected patch
The current queue consist as usual on fixes for different parts.
Take a look at section "Mesa stable queue" for more information
Testing reports
size when allocating
Juan A. Suarez Romero (7):
docs: add sha256 checksums for 19.1.5
cherry-ignore: add explicit 19.2 only nominations
cherry-ignore: iris: Replace devinfo->gen with GEN_GEN
cherry-ignore: iris: Update fast clear colors on Gen9 with direct
immediat
Hello list,
The candidate for the Mesa 19.1.6 is now available. Currently we have:
- 17 queued
- 0 nominated (outstanding)
- and 3 rejected patch
The current queue consist as usual on fixes for different parts, but nothing
outstanding.
Take a look at section "Mesa stable queue" for more inf
On Sat, 2019-08-17 at 12:17 -0400, Ilia Mirkin wrote:
> The compute paths in vl are a bit AMD-specific. For example, they (on
> nouveau), try to use a BGRX8 image format, which is not supported.
> Fixing all this is probably possible, but since the compute paths aren't
> in any way better, it's dif
Linux-specific include
intel/perf: use MAJOR_IN_SYSMACROS/MAJOR_IN_MKDEV
Jason Ekstrand (1):
anv: Emit a dummy MEDIA_VFE_STATE before switching from GPGPU to 3D
Juan A. Suarez Romero (4):
docs: add sha256 checksums for 19.1.4
cherry-ignore: panfrost: Make ctx->job use
Hello list,
The candidate for the Mesa 19.1.5 is now available. Currently we have:
- 15 queued
- 1 nominated (outstanding)
- and 1 rejected patch
The current queue is not as big as in previous releases, and it is as usual
mostly fixes.
Take a look at section "Mesa stable queue" for more in
include the fix also in the stable branch. I think it makes sense to fix
something that is already in stable.
But if you think this fix is not worth to be on stable, that's fine. I'll keep
it ignored.
Thanks!
> > On Thu, Aug 08, 2019 at 11:46:43AM +0200, Juan A. Suarez Romero wrot
On Fri, 2019-08-02 at 19:18 +0200, Boris Brezillon wrote:
> ctx->job is supposed to serve as a cache to avoid an hash table lookup
> everytime we access the job attached to the currently bound FB, except
> it was never assigned to anything but NULL.
>
> Fix that by adding the missing assignment in
intel/fs: Use ALIGN16 instructions for all derivatives on gen <= 7
intel/fs: Implement quad_swap_horizontal with a swizzle on gen7
Juan A. Suarez Romero (3):
docs: add sha256 checksums for 19.1.3
Update version to 19.1.4
docs: add release notes for 19.1.4
Kenneth Gr
Hello list,
The candidate for the Mesa 19.1.4 is now available. Currently we have:
- 49 queued
- 2 nominated (outstanding)
- and 0 rejected patch
The current queue consist mostly, as usual, in fixes for different drivers (anv,
radv, radeon, nv50, nvc0) as well as in backend parts (egl, spirv,
On Fri, 2019-07-26 at 10:41 -0400, Ilia Mirkin wrote:
> On Wed, Jul 24, 2019 at 9:34 AM Juan A. Suarez Romero
> wrote:
> > On Wed, 2019-07-24 at 14:27 +0200, Karol Herbst wrote:
> > > it's only fixing a crash in a build with asserts enabled, but if
> > > some
On Wed, 2019-06-19 at 17:04 -0400, boyuan.zh...@amd.com wrote:
> From: Boyuan Zhang
>
> Set cu_qp_delta_enable_flag on when rate control is enabled, and set it
> off when rate control is disabled (e.g. constant qp).
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
> Cc: mesa-sta
On Wed, 2019-07-24 at 14:27 +0200, Karol Herbst wrote:
> it's only fixing a crash in a build with asserts enabled, but if
> somebody wants to apply those to stable, then go ahead.
>
OK; in that case I will keep it out.
Thanks!
J.A.
> On Wed, Jul 24, 2019 at 12:48
On Fri, 2019-07-19 at 13:56 +0200, Mark Menzynski wrote:
> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=111007
> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=67
> Signed-off-by: Mark Menzynski
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +-
> 1 file
On Mon, 2019-07-22 at 10:12 +0200, Samuel Pitoiset wrote:
> depth_stencil_attachment and/or ds_resolve attachment can be NULL.
>
> This fixes crashes with
> dEQP-VK.renderpass.suballocation.unused_clear_attachments.*
>
> Cc: 19.1
> Signed-off-by: Samuel Pitoiset
> ---
This does not apply clea
for dynamic stencil write disables in the PMA fix
nir/regs_to_ssa: Handle regs in phi sources properly
nir/loop_analyze: Refactor detection of limit vars
nir: Add some helpers for chasing SSA values properly
nir/loop_analyze: Properly handle swizzles in loop conditions
Jua
Hello list,
The candidate for the Mesa 19.1.3 is now available. Currently we have:
- 42 queued
- 0 nominated (outstanding)
- and 0 rejected patch
The current queue consist mostly in fixes for ANV and RADV
drivers, as well as NIR backend fixes.
Several of those patches fixe actually crashes w
On Mon, 2019-05-06 at 16:01 +0200, Iago Toral Quiroga wrote:
> From: Samuel Iglesias Gonsálvez
>
> There are tests in CTS for alpha to coverage without a color attachment
> that are failing. This happens because we remove the shader color
> outputs when we don't have a valid color attachment for
On Tue, 2019-07-16 at 08:37 +0200, Samuel Pitoiset wrote:
> For NGG, the driver relies on the VS outinfo struct.
>
> This fixes
> dEQP-VK.clipping.user_defined.clip_*_vert_tess_geom_*
>
Should this be included in 19.1 stable branch?
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/rad
ge view
iris: Use a uint16_t for key sizes
Jory Pratt (2):
util: Heap-allocate 256K zlib buffer
meson: Search for execinfo.h
Juan A. Suarez Romero (4):
docs: add sha256 checksums for 19.1.1
intel: fix wrong format usage
Update version to 19.1.2
docs:
il: Heap-allocate 256K zlib buffer
meson: Search for execinfo.h
Juan A. Suarez Romero (1):
intel: fix wrong format usage
Kenneth Graunke (2):
iris: Enable PIPE_CAP_SURFACE_REINTERPRET_BLOCKS
gallium: Make util_copy_image_view handle shader_access
Lionel Landwerlin (2):
Gert Wollny (1):
virgl: Assume sRGB write control for older guest kernels or virglrenderer
hosts
Haihao Xiang (1):
i965: support UYVY for external import only
Jason Ekstrand (1):
anv: Set STATE_BASE_ADDRESS upper bounds on gen7
Juan A. Suarez Romero (3):
docs: Add
Hello list,
The candidate for the Mesa 19.1.1 is now available. Currently we have:
- 27 queued
- 0 nominated (outstanding)
- and 0 rejected patch
The current queue consists mostly in fixes for different drivers (RADV, ANV,
Nouveau, Virgl, V3D, R300g, ...)
The queue also contains different fi
On Tue, 2019-06-18 at 18:58 +0200, Samuel Pitoiset wrote:
> This fixes new CTS dEQP-VK.pipeline.depth_range_unrestricted.*.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_pipeline.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
could this patch be a candidate for
On Tue, 2019-06-18 at 12:12 +0200, Samuel Pitoiset wrote:
> On 6/18/19 12:05 PM, Juan A. Suarez Romero wrote:
> > On Thu, 2019-06-13 at 12:44 +0200, Samuel Pitoiset wrote:
> > > This fixes a segfault when forcing DCC decompressions on compute
> > > because internal m
On Thu, 2019-06-13 at 12:44 +0200, Samuel Pitoiset wrote:
> This fixes a segfault when forcing DCC decompressions on compute
> because internal meta objects are not created since the on-demand
> stuff.
>
Does it make sense to nominate this to stable?
J.A.
> Signed-off-by: Samuel Pitoise
On Fri, 2019-06-14 at 19:00 -0400, Marek Olšák wrote:
> From: Nicolai Hähnle
>
> This fixes piglit spec@glsl-1.50@gs-max-output.
> ---
Does it make sense to nominate this for stable?
J.A.
> src/gallium/drivers/radeonsi/si_get.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(
On Tue, 2019-06-11 at 20:28 +0300, Thomas Backlund wrote:
> Den 11.6.2019 kl. 19:00, skrev Juan A. Suarez Romero:
> > Mesa 19.1.0 is now available.
> >
> > Emil Velikov (3):
> >mapi: add static_date offset to MaxShaderCompilerThreadsKHR
> >mapi:
the error read() gave us
Jason Ekstrand (1):
nir/propagate_invariant: Don't add NULL vars to the hash table
Juan A. Suarez Romero (2):
Update version to 19.1.0
docs: Add release notes for 19.1.0
Kenneth Graunke (1):
egl/x11: calloc dri2_surf so it's prope
ructions aren't dead
Jonathan Marek (1):
freedreno/ir3: fix input ncomp for vertex shaders
Juan A. Suarez Romero (1):
Update version to 19.1.0-rc5
Lionel Landwerlin (1):
nir/lower_non_uniform: safely iterate over blocks
Marek Olšák (2):
u_blitter: don't fail mi
On Tue, 2019-06-04 at 16:52 +0200, Connor Abbott wrote:
> On Tue, Jun 4, 2019 at 4:24 PM Juan A. Suarez Romero
> wrote:
> > On Fri, 2019-05-31 at 14:55 +0200, Connor Abbott wrote:
> > > Bindless handles in GL are 64-bit. This fixes an assert failure in LLVM.
> >
On Fri, 2019-05-31 at 14:55 +0200, Connor Abbott wrote:
> Bindless handles in GL are 64-bit. This fixes an assert failure in LLVM.
Does it make sense to nominate this for stable release?
J.A.
> ---
>
> With this patch, we now have Piglit parity in debug mode.
>
> src/gallium/drivers/r
On Thu, 2019-05-30 at 21:48 +, Vinson Lee wrote:
> ../src/freedreno/vulkan/tu_device.c:900:4: error: initializer element is not
> constant
> .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 },
> ^
>
Shouldn't this be nominated to stable?
J.A.
> Suggested-by: Kristian
On Mon, 2019-04-15 at 16:15 +0200, Juan A. Suarez Romero wrote:
> Hi all,
>
> Here is the tentative release plan for 19.1.0.
>
> As many of you are well aware, it's time to the next branch point.
> The calendar is already updated, so these are the tentative dates:
>
wizzle for INPUT_ATTACHMENT, STORAGE_IMAGE
Dave Airlie (1):
Revert "mesa: unreference current winsys buffers when unbinding winsys
buffers"
Greg V (1):
gallium: enable dmabuf on BSD as well
Juan A. Suarez Romero (1):
Update version to 19.1.0-rc4
Lionel Landwerlin (3):
On Tue, 2019-05-28 at 02:08 +0200, Roland Scheidegger wrote:
> Am 27.05.19 um 11:39 schrieb Juan A. Suarez Romero:
> > On Fri, 2019-05-24 at 03:08 +0200, srol...@vmware.com wrote:
> > > From: Roland Scheidegger
> > >
> > > The default null_output really need
On Fri, 2019-05-24 at 03:08 +0200, srol...@vmware.com wrote:
> From: Roland Scheidegger
>
> The default null_output really needs to be static, otherwise the values
> we'll eventually get later are doubly random (they are not initialized,
> and even if they were it's a pointer to a local stack var
othian wrote:
> > Can someone with access revert from master until this is fixed? It's
> >
> > been broken for 3 days now
> >
> >
> >
> > On Tue, 21 May 2019 at 09:01, Juan A. Suarez Romero
> > wrote:
> >
>
urces that exist
intel/fs/ra: Stop adding RA interference to too many SENDS nodes
anv: Emulate texture swizzle in the shader when needed
anv: Stop forcing bindless for images
anv: Only consider minSampleShading when sampleShadingEnable is set
Juan A. Suarez Romero (2):
On Tue, 2019-05-21 at 09:36 +0200, Gert Wollny wrote:
> Hi Marek,
>
> it seems that this patch is causing a few issues [1], any idea what is
> going on? Maybe it is best to revert the patch for now?
>
> Best,
> Gert
>
As this is commit is causing issues, I'm withdrawing it out of 19.1 bran
systemsettings5
> pid 839 thread systemsett:cs0 pid 842)
> May 18 15:31:44 quark kernel: amdgpu :08:00.0: in page starting
> at address 0x80010105 from 27
> May 18 15:31:44 quark kernel: amdgpu :08:00.0:
> VM_L2_PROTECTION_FAULT_STATUS:0x00501031
> May 18 15:3
On Fri, 2019-05-10 at 01:19 -0400, Marek Olšák wrote:
> From: Marek Olšák
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108824
>
> Cc: 19.1
Hi, Marek,
This patch didn't apply cleanly on 19.1 branch, so I've fixed the conflicts.
You can find the solved patch in
https://gitlab.fr
_dri.so to two of the kmsro drivers.
Dylan Baker (1):
meson: Force the use of config-tool for llvm
Eric Engestrom (1):
travis: fix syntax, and drop unused stuff
Gert Wollny (1):
softpipe/buffer: load only as many components as the the buffer resource
type provides
Juan A. Sua
12 James Zhu
2 Jan Vesely
202 Jason Ekstrand
1 Jian-Hong Pan
1 Jiang, Sonny
3 John Stultz
1 Jon Turney
21 Jonathan Marek
22 Jordan Justen
4 Jose Maria Casanova Crespo
1 José Fonseca
16 Juan A. Suarez Romero
5 Julien Isorce
2
Fixes scons/mingw building:
src/util/os_file.c: In function ‘os_read_file’:
src/util/os_file.c:126:11: error: ‘NULL’ undeclared (first use in this
function); did you mean ‘_DLL’?
return NULL;
^~~~
_DLL
src/util/os_file.c:126:11: note: each undeclared identifier is report
This reverts commit 40b3abb4d16af4cef0307e1b4904c2ec0924299e.
It is not clear that this commit was entirely correct, and unfortunately
it was pushed by error.
CC: Jason Ekstrand
---
Jason, we agreed on leaving this out of the VK_KHR_shader_float16_int8
patchset, but due a mistake I've pushed it
g to work towards fixing that
> right now.
>
>
Did you have time to check this?
J.A.
> --Jason
>
>
> On Wed, Mar 6, 2019 at 5:25 AM Juan A. Suarez Romero
> wrote:
> > This fixes the case when the SPIR-V code has two nested
On Wed, 2019-04-17 at 13:17 -0700, Francisco Jerez wrote:
> "Juan A. Suarez Romero" writes:
>
> > From: Iago Toral Quiroga
> >
> > v2:
> > - Adapted unit tests to make them consistent with the changes done
> >to the validation of half-float
From: Iago Toral Quiroga
v2:
- Adapted unit tests to make them consistent with the changes done
to the validation of half-float conversions.
v3 (Curro):
- Check all the accummulators
- Constify declarations
- Do not check src1 type in single-source instructions.
- Check for all instructions
On Mon, 2019-04-15 at 18:57 +0300, Eero Tamminen wrote:
> Hi,
>
> On 15.4.2019 17.15, Juan A. Suarez Romero wrote:
> > Here is the tentative release plan for 19.1.0.
> >
> > As many of you are well aware, it's time to the next branch point.
> > The calenda
Hi all,
Here is the tentative release plan for 19.1.0.
As many of you are well aware, it's time to the next branch point.
The calendar is already updated, so these are the tentative dates:
Apr 30 2019 - Feature freeze/Release candidate 1
May 07 2019 - Release candidate 2
May 14 2019 - Release
On Wed, 2019-04-10 at 17:13 -0700, Francisco Jerez wrote:
> "Juan A. Suarez Romero" writes:
>
> > From: Iago Toral Quiroga
> >
> > v2:
> > - Adapted unit tests to make them consistent with the changes done
> >to the validation of half-float
On Wed, 2019-04-10 at 17:13 -0700, Francisco Jerez wrote:
> "Juan A. Suarez Romero" writes:
>
> > From: Iago Toral Quiroga
> >
> > v2:
> > - Adapted unit tests to make them consistent with the changes done
> >to the validation of half-float
From: Iago Toral Quiroga
v2:
- Adapted unit tests to make them consistent with the changes done
to the validation of half-float conversions.
v3 (Curro):
- Check all the accummulators
- Constify declarations
- Do not check src1 type in single-source instructions.
- Check for all instructions
From: Iago Toral Quiroga
v2:
- Consider implicit conversions in 2-src instructions too (Curro)
- For restrictions that involve destination stride requirements
only validate them for Align1, since Align16 always requires
packed data.
- Skip general rule for the dst/execution type size rat
From: Iago Toral Quiroga
v2: f32to16/f16to32 can use a :W destination (Curro)
---
src/intel/compiler/brw_fs.cpp | 71 +++
1 file changed, 71 insertions(+)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index d4803c63b93..48b5cc6c403 10
On Wed, 2019-03-27 at 19:37 -0700, Francisco Jerez wrote:
> "Juan A. Suarez Romero" writes:
>
> > From: Iago Toral Quiroga
> >
> > v2:
> > - Adapted unit tests to make them consistent with the changes done
> >to the validation of half-floa
On Fri, 2019-03-22 at 17:53 +0100, Iago Toral wrote:
> Yes, I think those should be fine to land now, they are very few
> actually. Jason, any objections?
>
Pushed:
- [PATCH v4 10/40] compiler/nir: add lowering option for 16-bit fmod
- [PATCH v4 11/40] compiler/nir: add lowering for 16-bit flrp
-
From: Iago Toral Quiroga
v2:
- Adapted unit tests to make them consistent with the changes done
to the validation of half-float conversions.
---
src/intel/compiler/brw_eu_validate.c| 256 ++
src/intel/compiler/test_eu_validate.cpp | 620
2 files changed,
From: Iago Toral Quiroga
v2:
- Consider implicit conversions in 2-src instructions too (Curro)
- For restrictions that involve destination stride requirements
only validate them for Align1, since Align16 always requires
packed data.
- Skip general rule for the dst/execution type size rat
CCing Iago and Curro.
On Fri, 2019-03-22 at 10:08 +0100, Juan A. Suarez Romero wrote:
> From: Iago Toral Quiroga
>
> The section 'Execution Data Types' of 3D Media GPGPU volume, which
> describes execution types, is exactly the same in BDW and SKL+.
>
> Also, this
CCing Iago and Curro.
On Fri, 2019-03-22 at 10:07 +0100, Juan A. Suarez Romero wrote:
> From: Iago Toral Quiroga
>
> ---
> src/intel/compiler/brw_fs.cpp | 65 +++
> 1 file changed, 65 insertions(+)
>
> diff --git a/src/intel/compiler/b
From: Iago Toral Quiroga
The section 'Execution Data Types' of 3D Media GPGPU volume, which
describes execution types, is exactly the same in BDW and SKL+.
Also, this section states that there is a single execution type, so it
makes sense that this is the wider of the two floating point types
in
From: Iago Toral Quiroga
---
src/intel/compiler/brw_fs.cpp | 65 +++
1 file changed, 65 insertions(+)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 2fc7793709b..3616a7afc31 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/in
On Fri, 2019-03-08 at 13:29 -0600, Jason Ekstrand wrote:
> On Fri, Mar 8, 2019 at 9:30 AM Juan A. Suarez Romero
> wrote:
> > On Thu, 2019-03-07 at 07:15 -0600, Jason Ekstrand wrote:
> >
> > > Woah, is this legal SPIR-V? I think a second OpSelectionMerge is required.
As stated in Vulkan spec:
"Resetting a descriptor pool recycles all of the resources from all
of the descriptor sets allocated from the descriptor pool back to
the descriptor pool, and the descriptor sets are implicitly freed."
This fixes dEQP-VK.api.descriptor_pool.*
Fixes: 14f6275c92
the rules, as both conditionals branches to the construct's merge
block.
J.A.
>
> --Jason
>
>
> On March 6, 2019 05:25:26 "Juan A. Suarez Romero" wrote:
>
> > This fixes the case when the SPIR-V code has two nested conditional
> > bra
This fixes the case when the SPIR-V code has two nested conditional
branches, but only one selection merge:
[...]
%1 = OpLabel
OpSelectionMerge %2 None
OpBranchConditional %3 %4 %2
%4 = OpLabel
OpBranchConditional %3 %5 %2
%5 = OpLabel
OpBranch %2
%2 = OpLabel
[...]
In the sec
When emitting a branch in a block, it does not make sense to continue
processing further instructions, as they will not be reachable.
This fixes a nasty case with a loop with a branch that both then-part
and else-part exits the loop:
%1 = OpLabel
OpLoopMerge %2 %3 None
OpBranchCondition
On Fri, 2019-02-22 at 10:04 -0600, Jason Ekstrand wrote:
> On Fri, Feb 22, 2019 at 9:58 AM Jason Ekstrand wrote:
> > On Fri, Feb 22, 2019 at 9:57 AM Lionel Landwerlin
> > wrote:
> > > On 22/02/2019 15:51, Juan A. Suarez Romero wrote:
> > >
> > &g
Fill out "Vertex Sub Pixel Precision Select" possible values.
Signed-off-by: Juan A. Suarez Romero
---
src/intel/genxml/gen10.xml | 5 -
src/intel/genxml/gen11.xml | 5 -
src/intel/genxml/gen7.xml | 5 -
src/intel/genxml/gen75.xml | 5 -
src/intel/genxml/gen
::VertexSubPixelPrecisionSelect (Jason)
v3: use _8Bit definition as value (Jason)
CC: Jason Ekstrand
CC: Kenneth Graunke
Signed-off-by: Juan A. Suarez Romero
---
src/intel/vulkan/anv_device.c| 2 +-
src/intel/vulkan/genX_pipeline.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/intel
On one side, when emitting 3DSTATE_SF, VertexSubPixelPrecisionSelect is
used to select between 8 bit subpixel precision (value 0) or 4 bit
subpixel precision (value 1). As this value is not set, means it is
taking the value 0, so 8 bit are used.
On the other side, in the Vulkan CTS tests, if the r
On one side, when emitting 3DSTATE_SF, VertexSubPixelPrecisionSelect is
used to select between 8 bit subpixel precision (value 0) or 4 bit
subpixel precision (value 1). As this value is not set, means it is
taking the value 0, so 8 bit are used.
On the other side, in the Vulkan CTS tests, if the r
On Wed, 2019-02-13 at 11:53 -0800, Ian Romanick wrote:
> On 2/13/19 9:59 AM, Juan A. Suarez Romero wrote:
> > On Wed, 2019-02-13 at 09:16 -0800, Ian Romanick wrote:
> > > On 2/13/19 7:53 AM, Juan A. Suarez Romero wrote:
> > > > On Tue, 2019-02-12 at 16:22 -0800, Ian
On Wed, 2019-02-13 at 09:16 -0800, Ian Romanick wrote:
> On 2/13/19 7:53 AM, Juan A. Suarez Romero wrote:
> > On Tue, 2019-02-12 at 16:22 -0800, Ian Romanick wrote:
> > > On 2/12/19 12:58 AM, Juan A. Suarez Romero wrote:
> > > > opt_split_alu_of_phi moves ALU inst
On Tue, 2019-02-12 at 16:22 -0800, Ian Romanick wrote:
> On 2/12/19 12:58 AM, Juan A. Suarez Romero wrote:
> > opt_split_alu_of_phi moves ALU instruction to the end of continue block.
> >
> > But if the continue block ends with a jump instruction (an explicit
> > "
On Tue, 2019-02-12 at 09:38 -0800, Caio Marcelo de Oliveira Filho wrote:
> Hi Juan,
>
> On Tue, Feb 12, 2019 at 04:37:23PM +0100, Juan A. Suarez Romero wrote:
> > On Fri, 2019-02-08 at 15:39 -0600, Jason Ekstrand wrote:
> > > I had a chat with Caio about this and I'm
On Tue, 2019-02-12 at 11:31 -0600, Jason Ekstrand wrote:
> On Tue, Feb 12, 2019 at 10:48 AM Juan A. Suarez Romero
> wrote:
> > This can happen when we record a VkCmdDraw in a secondary buffer that
> >
> > was created inheriting from the primary buffer, but with the fra
This can happen when we record a VkCmdDraw in a secondary buffer that
was created inheriting from the primary buffer, but with the framebuffer
set to NULL in the VkCommandBufferInheritanceInfo.
Vulkan 1.1.81 spec says that "the application must ensure (using scissor
if neccesary) that all renderin
In opt_peel_initial_if optimization, when moving the continue list to
end of the continue block, before the jump, could happen that the
continue list itself also ends with a jump.
This would mean that we would have two jump instructions in a row: the
first one from the continue list and the second
this situation and just get rid
of the jump instruction in the continue block, before the stitching. After all,
after the merge it won't never be called.
I'm sending a new patch for this.
J.A.
> --Jason
>
>
> On Fri, Jan 25, 2019 at 11:37 AM Juan A. Suarez Romer
opt_split_alu_of_phi moves ALU instruction to the end of continue block.
But if the continue block ends with a jump instruction (an explicit
"continue" instruction) then the ALU must be inserted before the jump,
as it is illegal to add instructions after the jump.
CC: Ian Romanick
Fixes: 0881e90
moved to a
different place.
J.A.
> --Jason
>
>
> On Fri, Jan 25, 2019 at 11:37 AM Juan A. Suarez Romero
> wrote:
> > When stitching two blocks A and B, where A's last instruction is a jump,
> >
> > it is not required that B is empty; it can
This can happen when we record a VkCmdDraw in a secondary buffer that
was created inheriting from the primary buffer, but with the framebuffer
set to NULL in the VkCommandBufferInheritanceInfo.
Vulkan 1.1.81 spec says that "the application must ensure (using scissor
if neccesary) that all renderin
On Fri, 2019-02-08 at 15:47 -0600, Jason Ekstrand wrote:
> On Fri, Feb 8, 2019 at 7:15 AM Juan A. Suarez Romero
> wrote:
> > This can happen when we record a VkCmdDraw in a secondary buffer that
> >
> > was created inheriting from the primary buffer, but with the fra
On Fri, 2019-02-08 at 10:29 -0800, Ian Romanick wrote:
> On 2/8/19 5:21 AM, Juan A. Suarez Romero wrote:
> > On Sat, 2019-01-26 at 08:37 -0800, Jason Ekstrand wrote:
> > > This makes me a bit nervous. I'll have to look at it in more detail.
> > >
> >
> &
On Sat, 2019-01-26 at 08:37 -0800, Jason Ekstrand wrote:
> This makes me a bit nervous. I'll have to look at it in more detail.
>
Did you have time to take a look at this?
J.A.
> On January 25, 2019 09:37:52 "Juan A. Suarez Romero"
> wrote:
>
> &g
This can happen when we record a VkCmdDraw in a secondary buffer that
was created inheriting from the primary buffer, but with the framebuffer
set to NULL in the VkCommandBufferInheritanceInfo.
Vulkan 1.1.81 spec says that "the application must ensure (using scissor
if neccesary) that all renderin
On Mon, 2019-02-04 at 10:01 -0600, Jason Ekstrand wrote:
> On Mon, Feb 4, 2019 at 3:02 AM Juan A. Suarez Romero
> wrote:
> > On Fri, 2019-02-01 at 15:33 -0600, Jason Ekstrand wrote:
> >
> > > On Fri, Feb 1, 2019 at 10:14 AM Juan A. Suarez Romero
> > > wrot
On Fri, 2019-02-01 at 15:33 -0600, Jason Ekstrand wrote:
> On Fri, Feb 1, 2019 at 10:14 AM Juan A. Suarez Romero
> wrote:
> > This can happen when we record a VkCmdDraw in a secondary buffer that
> > was created inheriting from the primary buffer, but with the framebuffer
>
This can happen when we record a VkCmdDraw in a secondary buffer that
was created inheriting from the primary buffer, but with the framebuffer
set to NULL in the VkCommandBufferInheritanceInfo.
CC: Jason Ekstrand
---
src/intel/vulkan/gen7_cmd_buffer.c | 13 +++--
1 file changed, 11 inser
On Fri, 2019-01-25 at 13:26 -0800, Eric Anholt wrote:
> Rob Clark writes:
>
> > I guess as discovered with
> > https://gitlab.freedesktop.org/mesa/mesa/merge_requests/47 maybe we
> > should wait to turn on merging MRs via web until we have at least some
> > basic build-test CI wired up.. the down
1 - 100 of 900 matches
Mail list logo
