Re: [Mesa-dev] [RFC PATCH] mesa/st/cb_clear: in st_Clear also validate the render state (needed by virgl)

On Tue, May 8, 2018 at 2:09 AM, Gert Wollny wrote: > Am Montag, den 07.05.2018, 22:55 -0400 schrieb Marek Olšák: > > > > tl;dr. Is the problem that Clear in virgl obeys rasterizer_discard? > > Well then you have a bigger problem, because rasterizer_discard > > should have no effect on Clear like

Re: [Mesa-dev] [PATCH v3] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

On 07/05/18 14:45, Eero Tamminen wrote: > Hi, > > On 04.05.2018 22:06, Eleni Maria Stea wrote: >> On Fri, 4 May 2018 18:29:55 +0300 >> Eero Tamminen wrote: >> >>> You mean returning CAVEAT_SUPPORT in params for compressed formats >>> which are transparently converted to uncompressed data? >> >>

Re: [Mesa-dev] [PATCH 1/8] i965: Re-emit depth/stencil/hiz on BRW_NEW_AUX_STATE

On Monday, May 7, 2018 12:49:32 PM PDT Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/gen7_misc_state.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c > b/src/mesa/drivers/dri/i965/gen7_misc_state.c > index 1ce7658.

Re: [Mesa-dev] [PATCH] anv: ignore pColorBlendState if all color attachments of the subpass are unused

On 07/05/18 16:46, Jason Ekstrand wrote: > Reviewed-by: Jason Ekstrand > > Thanks. > Have you audited to ensure that we don't actually use it in this case? I checked its usage in the driver. There is no problem except in one call to has_color_buffer_write_enable() t

Re: [Mesa-dev] [PATCH] virgl: clear render state before submitting clear command

On 8 May 2018 at 16:26, Gert Wollny wrote: > Am Montag, den 07.05.2018, 18:25 -0700 schrieb Gurchetan Singh: >> In vrend_clear, we already save and restore colormasks and stencils: >> >> https://cgit.freedesktop.org/virglrenderer/commit/?id=b75e0a1dabdfbda >> 44c310a69026a9dbd7d980294 >> https://c

Re: [Mesa-dev] A question about nir_lower_wpos_ytransform

On 07/05/18 20:36, Jason Ekstrand wrote: > On Mon, May 7, 2018 at 9:37 AM, Kenneth Graunke > wrote: > > On Monday, May 7, 2018 8:53:34 AM PDT Jason Ekstrand wrote: > > On Mon, May 7, 2018 at 8:02 AM, Alejandro Piñeiro > mailto:apinhe...@igalia.com>> >

Re: [Mesa-dev] A question about nir_lower_wpos_ytransform

On 07/05/18 21:21, Rob Clark wrote: > On Mon, May 7, 2018 at 2:36 PM, Jason Ekstrand wrote: >> On Mon, May 7, 2018 at 11:02 AM, Rob Clark wrote: >>> On Mon, May 7, 2018 at 11:53 AM, Jason Ekstrand >>> wrote: On Mon, May 7, 2018 at 8:02 AM, Alejandro Piñeiro wrote: > Hi Jason, >>

Re: [Mesa-dev] [PATCH] virgl: clear render state before submitting clear command

Am Montag, den 07.05.2018, 18:25 -0700 schrieb Gurchetan Singh: > In vrend_clear, we already save and restore colormasks and stencils: > > https://cgit.freedesktop.org/virglrenderer/commit/?id=b75e0a1dabdfbda > 44c310a69026a9dbd7d980294 > https://cgit.freedesktop.org/virglrenderer/commit/?id=252b0

[Mesa-dev] [Bug 106246] radv: VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT and bringing down initial pipeline compile times

https://bugs.freedesktop.org/show_bug.cgi?id=106246 --- Comment #9 from Timothy Arceri --- Here is an initial patch that turns down the level of NIR optimisations: https://patchwork.freedesktop.org/patch/221407/ The speed-ups are not huge but its a start. -- You are receiving this mail becaus

Re: [Mesa-dev] [PATCH 13/17] i965: Update the indirect buffer in set_clear_color

On Thu, May 03, 2018 at 12:04:00PM -0700, Nanley Chery wrote: > Although BLORP currently does the update when performing a fast clear, > it's simpler to do it ourselves. Remove the dependency on BLORP. Should we note in the commit message that until patch 17 this now gets done twice in a row in th

Re: [Mesa-dev] [PATCH 11/17] i965: Use set_clear_color for depth miptrees

On Thu, May 03, 2018 at 12:03:58PM -0700, Nanley Chery wrote: > Reduce code duplication now and prevent it in the following commits. > --- > src/mesa/drivers/dri/i965/brw_clear.c | 3 ++- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 13 - > src/mesa/drivers/dri/i965/intel

Re: [Mesa-dev] [RFC PATCH] mesa/st/cb_clear: in st_Clear also validate the render state (needed by virgl)

Am Montag, den 07.05.2018, 22:55 -0400 schrieb Marek Olšák: > > tl;dr. Is the problem that Clear in virgl obeys rasterizer_discard? > Well then you have a bigger problem, because rasterizer_discard > should have no effect on Clear like in this example where glClear > should be executed normally: >

[Mesa-dev] [RFC PATCH V2] radv: add initial support for VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT

When VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT is set we skip NIR linking optimisations and only run over the NIR optimisation loop once similar to the GLSLOptimizeConservatively constant used by some GL drivers. We need to run over the opts at least once to avoid errors in LLVM (e.g. dead vars

[Mesa-dev] [PATCH 1/1] pipe-lader: Free driver_name in error path

CC: Signed-off-by: Jan Vesely --- src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c b/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c index b6be1b4f12..3b959e5398 100644 --- a/src/galli

Re: [Mesa-dev] [PATCH 06/17] i965/miptree: Drop the alloc_flags param from alloc_aux_buffer

On Mon, May 07, 2018 at 11:04:20AM -0700, Nanley Chery wrote: > On Mon, May 07, 2018 at 03:06:29PM +0300, Pohjolainen, Topi wrote: > > On Thu, May 03, 2018 at 12:03:53PM -0700, Nanley Chery wrote: > > > We have enough information to determine the optimal flags internally. > > > --- > > > src/mesa/

Re: [Mesa-dev] [PATCH 2/2] eg/compute: Drop reference to kernel_param bo in destructor

For the series: Reviewed-by: Marek Olšák Marek On Mon, May 7, 2018 at 11:05 PM, Jan Vesely wrote: > CC: > Signed-off-by: Jan Vesely > --- > src/gallium/drivers/r600/evergreen_compute.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/src/gallium/drivers/r600/evergreen_compute.c > b

Re: [Mesa-dev] [PATCH 04/17] i965/miptree: Initialize the indirect clear color to zero

On Mon, May 07, 2018 at 10:11:39AM -0700, Nanley Chery wrote: > On Mon, May 07, 2018 at 11:30:15AM +0300, Pohjolainen, Topi wrote: > > On Thu, May 03, 2018 at 12:03:51PM -0700, Nanley Chery wrote: > > > The indirect clear color isn't correctly tracked in > > > intel_miptree::fast_clear_color. The i

Re: [Mesa-dev] [PATCH 09/17] i965/miptree: Unify aux buffer allocation

On Mon, May 07, 2018 at 11:30:12AM -0700, Nanley Chery wrote: > On Mon, May 07, 2018 at 04:12:24PM +0300, Pohjolainen, Topi wrote: > > On Thu, May 03, 2018 at 12:03:56PM -0700, Nanley Chery wrote: > > > There isn't much that changes between the aux allocation functions. > > > Remove the duplicated

Re: [Mesa-dev] [PATCH 08/17] i965: Prepare to delete intel_miptree_alloc_ccs()

On Mon, May 07, 2018 at 11:38:38AM -0700, Nanley Chery wrote: > On Mon, May 07, 2018 at 11:12:26AM -0700, Nanley Chery wrote: > > On Mon, May 07, 2018 at 03:36:54PM +0300, Pohjolainen, Topi wrote: > > > On Thu, May 03, 2018 at 12:03:55PM -0700, Nanley Chery wrote: > > > > We're going to delete inte

Re: [Mesa-dev] [PATCH 03/17] i965/miptree: Move init_mcs into alloc_aux_buffer

On Mon, May 07, 2018 at 11:35:39AM -0700, Nanley Chery wrote: > On Mon, May 07, 2018 at 10:10:16AM -0700, Nanley Chery wrote: > > On Mon, May 07, 2018 at 11:51:50AM +0300, Pohjolainen, Topi wrote: > > > On Fri, May 04, 2018 at 11:04:40AM -0700, Nanley Chery wrote: > > > > On Fri, May 04, 2018 at 10

[Mesa-dev] [RFC PATCH] radv: add initial support for VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT

When VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT is set we skip NIR linking optimisations and only run over the NIR optimisation loop once similar to the GLSLOptimizeConservatively constant used by some GL drivers. We need to run over the opts at least once to avoid errors in LLVM (e.g. dead vars

Re: [Mesa-dev] gcc bug / crash in ast_type_qualifier::validate_in_qualifier()?

On Mon, May 7, 2018 at 8:02 PM, Brian Paul wrote: > > I don't know when this started happening (I'll try bisecting tomorrow) but > we're seeing a crash in ast_type_qualifier::validate_in_qualifier() in -O3 > builds with gcc 5.4.0 on Ubuntu 16.04. > > Specifically, at ast_type.cpp:654: > >if ((

Re: [Mesa-dev] Ryzen 2500U lockup, HP Envy 360

Mesa 18.0.1 can hang on Raven. It's fixed in Mesa 18.0.2. Marek On Thu, May 3, 2018 at 10:29 PM, Jerry DeLisle wrote: > Hi folks, > > I search a thread earlier that identified that someone could reproduce > this problem. > > I don't have skills or tools to debug this, though I would not mind >

[Mesa-dev] [PATCH 2/2] eg/compute: Drop reference to kernel_param bo in destructor

CC: Signed-off-by: Jan Vesely --- src/gallium/drivers/r600/evergreen_compute.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c index 027930b586..5070243914 100644 --- a/src/gallium/drivers/r600/everg

Re: [Mesa-dev] [PATCH] mesa/formatquery: remove online compression check on is_resource_supported

Reviewed-by: Marek Olšák Marek On Sun, May 6, 2018 at 5:40 AM, Alejandro Piñeiro wrote: > is_resource_supported returns if the combination of > target/internalformat is supported in at least one operation. Online > compression is only mandatory for glTexImage2D. Some formats doesn't > support

[Mesa-dev] [PATCH 1/2] r600: Cleanup constant buffers on context destruction

CC: Signed-off-by: Jan Vesely --- src/gallium/drivers/r600/r600_pipe.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index 102e75035f..1a293ea698 100644 --- a/src/gallium/drivers/r600/r600_pip

[Mesa-dev] gcc bug / crash in ast_type_qualifier::validate_in_qualifier()?

I don't know when this started happening (I'll try bisecting tomorrow) but we're seeing a crash in ast_type_qualifier::validate_in_qualifier() in -O3 builds with gcc 5.4.0 on Ubuntu 16.04. Specifically, at ast_type.cpp:654: if ((this->flags.i & ~valid_in_mask.flags.i) != 0) { It seems to

Re: [Mesa-dev] [RFC PATCH] mesa/st/cb_clear: in st_Clear also validate the render state (needed by virgl)

On Thu, May 3, 2018 at 12:29 PM, Gert Wollny wrote: > Am Donnerstag, den 03.05.2018, 11:43 -0400 schrieb Ilia Mirkin: > > You're supposed to keep track of the bound state (usually in the > > context). After your clear() implementation is done, you have to undo > > all the state you've messed up o

Re: [Mesa-dev] [PATCH] virgl: clear render state before submitting clear command

In vrend_clear, we already save and restore colormasks and stencils: https://cgit.freedesktop.org/virglrenderer/commit/?id=b75e0a1dabdfbda44c310a69026a9dbd7d980294 https://cgit.freedesktop.org/virglrenderer/commit/?id=252b00d77c30ce39608c1a9de18523cbdcaca623 It would be nice if we can put everyth

Re: [Mesa-dev] [PATCH 3/4] mesa: add GLSLVersionCompat constant

On 08/05/18 10:49, Timothy Arceri wrote: This allows drivers to define what version of GLSL they support in compat. This will be needed in order to support comapat 3.2 without breaking driver that wont support it. This also fixes MESA_GLSL_VERSION_OVERRIDE for compat. Sorry no it doesn't fix

[Mesa-dev] [PATCH 4/4] mesa: remove hard-coded OpenGL 3.2 compat limit

Just let validate_context_version() do it instead. This fixes MESA_GL_VERSION_OVERRIDE for compat, it will also allow us to enable new compat versions on a per driver bases in future. --- src/mesa/drivers/dri/common/dri_util.c | 8 1 file changed, 8 deletions(-) diff --git a/src/mesa/dri

[Mesa-dev] [PATCH 3/4] mesa: add GLSLVersionCompat constant

This allows drivers to define what version of GLSL they support in compat. This will be needed in order to support comapat 3.2 without breaking driver that wont support it. This also fixes MESA_GLSL_VERSION_OVERRIDE for compat. --- src/mesa/drivers/dri/i915/intel_extensions.c | 1 + src/mesa/driv

[Mesa-dev] [PATCH 1/4] mesa: dont set GLSLVersion in _mesa_init_constants()

Just leave it as 0 and let the drivers set it (as they already do) to avoid redundantly initialising it. --- src/mesa/main/context.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c index 9a4bf8d3942..9bd4661bd86 100644 --- a/src/mesa/main/contex

[Mesa-dev] [PATCH 2/4] mesa: dont call _mesa_override_glsl_version() in _mesa_init_constants()

All drivers that support GLSL will later set their default GLSL versions overriding this override call. They currently all call _mesa_override_glsl_version() again later in order to support overrides. --- src/mesa/main/context.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mesa/main/

[Mesa-dev] [PATCH 1/8] util: Add a virtual memory allocator

From: Jason Ekstrand This is simple linear-walk first-fit allocator roughly based on the allocator in the radeon winsys code. This allocator has two primary functional differences: 1) It cleanly returns 0 on allocation failure 2) It allocates addresses top-down instead of bottom-up. The sec

[Mesa-dev] [PATCH v2 4/8] anv: Add vma_heap allocators in anv_device

These will be used to assign virtual addresses to soft pinned buffers in a later patch. Two allocators are added for separate 'low' and 'high' virtual memory areas. Another alternative would have been to add a double-sided allocator, which wasn't done here just because it didn't appear to give any

[Mesa-dev] [PATCH v2 5/8] anv: soft pin state pools

The state_pools reserve virtual address space of the full BLOCK_POOL_MEMFD_SIZE, but maintain the current behavior of growing from the middle. v2: - rename block_pool::offset to block_pool::start_address (Jason) - assign state pool start_address statically (Jason) --- src/intel/vulkan/anv_all

[Mesa-dev] [PATCH 8/8] anv: soft pin the remaining bos

--- src/intel/vulkan/anv_allocator.c | 16 +++- src/intel/vulkan/anv_batch_chain.c | 27 +-- src/intel/vulkan/anv_device.c | 32 src/intel/vulkan/anv_private.h | 16 src/intel/vulkan/anv_queue.c

[Mesa-dev] [PATCH v2 7/8] anv: elide relocations to pinned target bos

References to pinned bos won't need relocated, so just write the final value of the reference into the bo. Add a `set` to the relocation lists for tracking dependencies that were previously tracked by relocations. v2: - visit bos from the dependency set in a deterministic order (Jason) --- src/in

[Mesa-dev] [PATCH v2 6/8] anv: use a separate pool for binding tables when soft pinning

Soft pinning lets us satisfy the binding table address requirements without using both sides of a growing state_pool. If you do use both sides of a state pool, then you need to read the state pool's center_bo_offset (with the device mutex held) to know the final offset of relocations that target t

[Mesa-dev] [PATCH v2 2/8] util: Add a randomized test for the virtual memory allocator

The test pseudo-randomly makes allocations and deallocations with the virtual memory allocator and checks that the results are consistent. Specifically, we test that: * no result from the allocator overlaps an already allocated range * allocated memory fulfills the stated alignment requirement

[Mesa-dev] [PATCH v2 0/8] anv: softpin

Round two of anv softpin. The only notable feedback not incorporated in the series is Chris's suggestion about embedding the vma's allocation node in struct anv_bo; I'm leaving the allocator bit to Jason. Jason Ekstrand (1): util: Add a virtual memory allocator Scott D Phillips (7): util: Add

[Mesa-dev] [PATCH 3/8] anv: move canonical_address calculation into a separate function

A later patch will make use of this in other places. Also, remove dependency on undefined behavior of left-shifting a signed value. --- src/intel/vulkan/anv_batch_chain.c | 12 +--- src/intel/vulkan/anv_private.h | 15 +++ 2 files changed, 16 insertions(+), 11 deletions(-)

Re: [Mesa-dev] [PATCH 8/9] anv: elide relocations to pinned target bos

On Mon, May 7, 2018 at 4:05 PM, Scott D Phillips wrote: > Jason Ekstrand writes: > > > If I'm honest, I don't really like the way this patch worked out. It has > > the virtue of being fairly simple and a nice incremental change. > However, > > it seems to me like we should be able to do better.

[Mesa-dev] [PATCH] llvmpipe: Fix random number generation for unit tests

From: Roland Scheidegger We were never producing negative numbers for signed types. Also fix only producing half the valid range for uint32, and properly clamp signed values. Because this now also properly tests snorm with actually negative values, need to increase eps for such conversions. I be

Re: [Mesa-dev] [PATCH 8/9] anv: elide relocations to pinned target bos

Jason Ekstrand writes: > If I'm honest, I don't really like the way this patch worked out. It has > the virtue of being fairly simple and a nice incremental change. However, > it seems to me like we should be able to do better. That said, I don't > really know how off-hand and this looks corre

Re: [Mesa-dev] [PATCH 09/10] i965: Softpin all buffers and never use relocations.

On Thursday, May 3, 2018 11:51:52 PM PDT Chris Wilson wrote: > Quoting Kenneth Graunke (2018-05-04 02:12:39) > > --- > > src/mesa/drivers/dri/i965/brw_bufmgr.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > This enables it for Broadwell (with a 64-bit kernel) and Skylake+ (with

Re: [Mesa-dev] [PATCH 06/10] i965: Add virtual memory allocator infrastructure to brw_bufmgr.

On Saturday, May 5, 2018 12:25:20 AM PDT Chris Wilson wrote: > Quoting Kenneth Graunke (2018-05-04 02:12:36) [snip] > > +static uint64_t > > +bucket_vma_alloc(struct brw_bufmgr *bufmgr, > > + struct bo_cache_bucket *bucket, > > + enum brw_memory_zone memzone) > > +{

Re: [Mesa-dev] [PATCH] mesa: fix error handling in get_framebuffer_parameteriv

On 05/04/2018 03:27 PM, Rhys Perry wrote: > CC: > Signed-off-by: Rhys Perry > --- > src/mesa/main/fbobject.c | 72 > +++- > 1 file changed, 41 insertions(+), 31 deletions(-) > > diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c > index

[Mesa-dev] [PATCH 1/2] intel/isl: Several UNORM formats support typed writes on gen11+

--- src/intel/isl/isl_format.c | 26 +- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c index a5bbdbc..a5fdf43 100644 --- a/src/intel/isl/isl_format.c +++ b/src/intel/isl/isl_format.c @@ -108,8 +108,8 @

[Mesa-dev] [PATCH 2/2] intel/isl/storage: Don't lower most UNORM formats on gen11+

--- src/intel/isl/isl_storage_image.c | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/src/intel/isl/isl_storage_image.c b/src/intel/isl/isl_storage_image.c index 20f6fd5..ed1c600 100644 --- a/src/intel/isl/isl_storage_image.c +++ b/src/intel/isl/isl_storage_i

Re: [Mesa-dev] [PATCH] configure.ac: rework -latomic check

Hello, On Mon, 7 May 2018 14:07:05 -0700, Matt Turner wrote: > On Mon, May 7, 2018 at 4:34 AM, Thomas Petazzoni > wrote: > > The configure.ac logic added in commit > > 2ef7f23820a67e958c2252bd81eb0458903ebf33 ("configure: check if > > -latomic is needed for __atomic_*") makes the assumption that

Re: [Mesa-dev] [PATCH 1/3] intel/genxml: Make assert in gen_pack_header print a message.

Reviewed-by: Jason Ekstrand On Mon, May 7, 2018 at 1:51 PM, Caio Marcelo de Oliveira Filho < caio.olive...@intel.com> wrote: > Series is > > Reviewed-by: Caio Marcelo de Oliveira Filho > > > On Mon, May 07, 2018 at 01:40:44PM -0700, Kenneth Graunke wrote: > > Python's assert can take both a con

Re: [Mesa-dev] [PATCH 3/3] intel/genxml: Assert that genxml field start and ends are sane.

Acked-by: Jason Ekstrand On Mon, May 7, 2018 at 1:40 PM, Kenneth Graunke wrote: > Chris recently fixed a bunch of genxml end < start bugs, as well as > booleans that are wider than a bit. These are way too easy to write, so > asserting that the fields are sane is a good plan. > --- > src/inte

Re: [Mesa-dev] [PATCH 2/3] intel/genxml: Fix some more fake booleans in genxml.

Reviewed-by: Jason Ekstrand At one point, I wrote a script for finding these On Mon, May 7, 2018 at 1:40 PM, Kenneth Graunke wrote: > None of these are actually booleans. Tile Parameter is a tiling mode > enum. Display pipes take plane numbers. Predicate Enable has some > operations (an

Re: [Mesa-dev] [PATCH] configure.ac: rework -latomic check

On Mon, May 7, 2018 at 4:34 AM, Thomas Petazzoni wrote: > The configure.ac logic added in commit > 2ef7f23820a67e958c2252bd81eb0458903ebf33 ("configure: check if > -latomic is needed for __atomic_*") makes the assumption that if a > 64-bit atomic intrinsic test program fails to link without -latom

Re: [Mesa-dev] [PATCH 1/3] intel/genxml: Make assert in gen_pack_header print a message.

Series is Reviewed-by: Caio Marcelo de Oliveira Filho On Mon, May 07, 2018 at 01:40:44PM -0700, Kenneth Graunke wrote: > Python's assert can take both a condition and a string, which will cause > it to print the string if the assertion trips. (You can't use parens as > that creates a tuple.)

[Mesa-dev] [PATCH 3/3] intel/genxml: Assert that genxml field start and ends are sane.

Chris recently fixed a bunch of genxml end < start bugs, as well as booleans that are wider than a bit. These are way too easy to write, so asserting that the fields are sane is a good plan. --- src/intel/genxml/gen_pack_header.py | 7 +++ 1 file changed, 7 insertions(+) diff --git a/src/int

[Mesa-dev] [PATCH 2/3] intel/genxml: Fix some more fake booleans in genxml.

None of these are actually booleans. Tile Parameter is a tiling mode enum. Display pipes take plane numbers. Predicate Enable has some operations (and the default value of 6 was particular bogus). --- src/intel/genxml/gen10.xml | 4 ++-- src/intel/genxml/gen11.xml | 10 +- src/intel/ge

[Mesa-dev] [PATCH 1/3] intel/genxml: Make assert in gen_pack_header print a message.

Python's assert can take both a condition and a string, which will cause it to print the string if the assertion trips. (You can't use parens as that creates a tuple.) Doing "condition and string" works in C, but doesn't have the desired effect in Python. --- src/intel/genxml/gen_pack_header.py

[Mesa-dev] [PATCH 7/8] i965: Simplify brw_emit_depthbuffer and brw_emit_depth_stencil_hiz

Now that we're using ISL, a good chunk of brw_emit_depthstencil is pointless checks which ISL will do for us anyway. Since we only have one manual depth buffer emit function, move the useful bits into it. --- src/mesa/drivers/dri/i965/brw_misc_state.c | 107 +++-- 1 file c

[Mesa-dev] [PATCH 6/8] i965: Move brw_emit_depth_stencil_hiz higher up in the file

--- src/mesa/drivers/dri/i965/brw_misc_state.c | 90 +- 1 file changed, 40 insertions(+), 50 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index e44baf2..03535f6 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 4/8] i965: Use the brw_depthbuffer atom on all gens

The only reason why we had two atoms was that the one we used for gen7+ depended on _NEW_DEPTH and _NEW_STENCIL as well as _NEW_BUFFERS. Since this is no longer true, we can combine them into one atom. We do add a dependence on BRW_NEW_AUX_STATE but that should never get set on gen4-5 so adding i

[Mesa-dev] [PATCH 8/8] i965/miptree: Remove redundant fields from intel_miptree_aux_buffer

--- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 19 +++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 25 - 2 files changed, 7 insertions(+), 37 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel

[Mesa-dev] [PATCH 5/8] i965: Use ISL for emitting depth/stencil/hiz state on gen6+

We leave gen4-5 alone because the ISL code hasn't really been well- tested on gen4-5 or with combined depth-stencil because we don't use BLORP for depth operations on gen4-5. Also, the gen4-5 code has to deal with intratile offsets for LOD hacks and ISL doesn't handle those yet. We could make ISL

[Mesa-dev] [PATCH 2/8] i965: Re-order depth/stencil/hiz/clear packets to match ISL

--- src/mesa/drivers/dri/i965/gen6_depth_state.c | 34 ++-- src/mesa/drivers/dri/i965/gen7_misc_state.c | 32 +- src/mesa/drivers/dri/i965/gen8_depth_state.c | 28 +++ 3 files changed, 47 insertions(+), 47 deletions(-) diff --gi

[Mesa-dev] [PATCH 1/8] i965: Re-emit depth/stencil/hiz on BRW_NEW_AUX_STATE

--- src/mesa/drivers/dri/i965/gen7_misc_state.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c index 1ce7658..1508473 100644 --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c +++ b/src

[Mesa-dev] [PATCH 3/8] i965: Always set depth/stencil write enables on gen7+

The hardware will AND these fields with the corresponding fields in DEPTH_STENCIL_STATE so there's no real reason to toggle them on and off based on state bits. This removes our reliance on the _NEW_DEPTH and _NEW_STENCIL state bits and better matches what ISL does. Cc: Kenneth Graunke --- src/

Re: [Mesa-dev] A question about nir_lower_wpos_ytransform

On Mon, May 7, 2018 at 2:36 PM, Jason Ekstrand wrote: > On Mon, May 7, 2018 at 11:02 AM, Rob Clark wrote: >> >> On Mon, May 7, 2018 at 11:53 AM, Jason Ekstrand >> wrote: >> > On Mon, May 7, 2018 at 8:02 AM, Alejandro Piñeiro >> > wrote: >> >> >> >> Hi Jason, >> >> >> >> as part of the ARB_gl_sp

Re: [Mesa-dev] [PATCH 4/4] i965/drm: Purge the bucket when its cached buffer is evicted

On Sat, 5 May 2018 08:55:24 +0100 Chris Wilson wrote: > Quoting James Xiong (2018-05-05 01:56:05) > > From: "Xiong, James" > > > > When one of cached buffers is found to be evicted by kernel, > > most likely the buffers freed earlier than this buffer are > > gone too, go through the cached list

Re: [Mesa-dev] [PATCH 1/2] eg/compute: Use reference counting to handle compute memory pool.

On Mon, 2018-05-07 at 15:10 +0200, Nicolai Hähnle wrote: > On 04.05.2018 08:34, Jan Vesely wrote: > > The original bug/corruption was by util_unreference_framebuffer_state, > > trying to drop reference on cbuf[0] (global AS for OCL). > > Adding reference counting to set_rat uncovered problems with

[Mesa-dev] [Bug 106180] [bisected] radv vulkan smoke test black screen (Add support for DRI3 v1.2)

https://bugs.freedesktop.org/show_bug.cgi?id=106180 --- Comment #17 from mercuriete --- The patch implemented by Bas https://patchwork.freedesktop.org/patch/220792/ has been Tested-by: Abel Garcia Dorta on top of master and on top of mesa-18.1.0_rc2 provided by gentoo. Thank you for fixing

Re: [Mesa-dev] [PATCH 5/9] anv: Add vma_heap allocators in anv_device

On Mon, May 7, 2018 at 9:24 AM, Scott D Phillips wrote: > Jason Ekstrand writes: > > > On Wed, May 2, 2018 at 9:01 AM, Scott D Phillips < > scott.d.phill...@intel.com > >> wrote: > > > >> These will be used to assign virtual addresses to soft pinned > >> buffers in a later patch. > >> --- > >>

Re: [Mesa-dev] [PATCH 3/9] radeonsi: improve quality of 16 sample locations

On Mon, May 7, 2018 at 7:53 AM, Nicolai Hähnle wrote: > On 02.05.2018 06:13, Marek Olšák wrote: > >> From: Marek Olšák >> >> This results in better 16x and 8x quality when using these locations. >> Verified with the piglit MSAA accuracy test. >> > > How did you come up with those? :) > I drew t

Re: [Mesa-dev] [PATCH 08/17] i965: Prepare to delete intel_miptree_alloc_ccs()

On Mon, May 07, 2018 at 11:12:26AM -0700, Nanley Chery wrote: > On Mon, May 07, 2018 at 03:36:54PM +0300, Pohjolainen, Topi wrote: > > On Thu, May 03, 2018 at 12:03:55PM -0700, Nanley Chery wrote: > > > We're going to delete intel_miptree_alloc_ccs() in the next commit. With > > > that in mind, rep

Re: [Mesa-dev] A question about nir_lower_wpos_ytransform

On Mon, May 7, 2018 at 9:37 AM, Kenneth Graunke wrote: > On Monday, May 7, 2018 8:53:34 AM PDT Jason Ekstrand wrote: > > On Mon, May 7, 2018 at 8:02 AM, Alejandro Piñeiro > > wrote: > > > > > Hi Jason, > > > > > > as part of the ARB_gl_spirv work, we are doing the linking based on the > > > nir

Re: [Mesa-dev] A question about nir_lower_wpos_ytransform

On Mon, May 7, 2018 at 11:02 AM, Rob Clark wrote: > On Mon, May 7, 2018 at 11:53 AM, Jason Ekstrand > wrote: > > On Mon, May 7, 2018 at 8:02 AM, Alejandro Piñeiro > > wrote: > >> > >> Hi Jason, > >> > >> as part of the ARB_gl_spirv work, we are doing the linking based on the > >> nir shader tha

Re: [Mesa-dev] [PATCH 03/17] i965/miptree: Move init_mcs into alloc_aux_buffer

On Mon, May 07, 2018 at 10:10:16AM -0700, Nanley Chery wrote: > On Mon, May 07, 2018 at 11:51:50AM +0300, Pohjolainen, Topi wrote: > > On Fri, May 04, 2018 at 11:04:40AM -0700, Nanley Chery wrote: > > > On Fri, May 04, 2018 at 10:00:32AM -0700, Nanley Chery wrote: > > > > On Fri, May 04, 2018 at 09

Re: [Mesa-dev] [PATCH 2/9] radeonsi: use better sample locations for 4x MSAA

On Mon, May 7, 2018 at 7:52 AM, Nicolai Hähnle wrote: > On 02.05.2018 06:13, Marek Olšák wrote: > >> From: Marek Olšák >> >> Discovered by luck. Verified with the piglit MSAA accuracy test. >> It also shows that the worst case EQAA 16s4f results in very good 4x MSAA >> in the worst case. >> >> N

Re: [Mesa-dev] [PATCH 1/9] radeonsi: reorder sample locations as required by EQAA

On Mon, May 7, 2018 at 7:49 AM, Nicolai Hähnle wrote: > On 02.05.2018 06:13, Marek Olšák wrote: > >> From: Marek Olšák >> >> --- >> src/gallium/drivers/radeonsi/si_state.c | 3 - >> src/gallium/drivers/radeonsi/si_state_msaa.c | 154 --- >> 2 files changed, 98 insertio

Re: [Mesa-dev] [PATCH 09/17] i965/miptree: Unify aux buffer allocation

On Mon, May 07, 2018 at 04:12:24PM +0300, Pohjolainen, Topi wrote: > On Thu, May 03, 2018 at 12:03:56PM -0700, Nanley Chery wrote: > > There isn't much that changes between the aux allocation functions. > > Remove the duplicated code. > > --- > > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 227

Re: [Mesa-dev] [PATCH 08/17] i965: Prepare to delete intel_miptree_alloc_ccs()

On Mon, May 07, 2018 at 03:36:54PM +0300, Pohjolainen, Topi wrote: > On Thu, May 03, 2018 at 12:03:55PM -0700, Nanley Chery wrote: > > We're going to delete intel_miptree_alloc_ccs() in the next commit. With > > that in mind, replace the use of this function in > > do_single_blorp_clear() with inte

Re: [Mesa-dev] [PATCH 06/17] i965/miptree: Drop the alloc_flags param from alloc_aux_buffer

On Mon, May 07, 2018 at 03:06:29PM +0300, Pohjolainen, Topi wrote: > On Thu, May 03, 2018 at 12:03:53PM -0700, Nanley Chery wrote: > > We have enough information to determine the optimal flags internally. > > --- > > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 29 > > +

Re: [Mesa-dev] A question about nir_lower_wpos_ytransform

On Mon, May 7, 2018 at 11:53 AM, Jason Ekstrand wrote: > On Mon, May 7, 2018 at 8:02 AM, Alejandro Piñeiro > wrote: >> >> Hi Jason, >> >> as part of the ARB_gl_spirv work, we are doing the linking based on the >> nir shader that comes from spirv_to_nir. On some cases, >> nir_lower_wpos_ytransform

Re: [Mesa-dev] [PATCH 9/9] radeonsi: add an environment variable that forces EQAA for MSAA allocations

On Mon, May 7, 2018 at 8:16 AM, Nicolai Hähnle wrote: > Very nice. We should probably think about exposing this as a more > generally available performance knob if you're confident enough that it > works. > I'm absolutely confident that it works. I've run a lot of image quality tests on Polaris1

Re: [Mesa-dev] [RFC PATCH] gallium: add interface for EQAA

On Mon, May 7, 2018 at 8:17 AM, Nicolai Hähnle wrote: > On 01.05.2018 22:48, Marek Olšák wrote: > >> +**nr_color_samples**: This is the number of color samples for >> EQAA, while >> +``nr_samples`` is the number of coverage samples. If the format >> is Z/S, >>

Re: [Mesa-dev] [PATCH, v3] configure.ac/meson.build: Fix -latomic test

Thanks. Reviewed-by: Matt Turner and pushed. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 04/17] i965/miptree: Initialize the indirect clear color to zero

On Mon, May 07, 2018 at 11:30:15AM +0300, Pohjolainen, Topi wrote: > On Thu, May 03, 2018 at 12:03:51PM -0700, Nanley Chery wrote: > > The indirect clear color isn't correctly tracked in > > intel_miptree::fast_clear_color. The initial value of ::fast_clear_color > > is zero, while that of the indi

Re: [Mesa-dev] [PATCH 03/17] i965/miptree: Move init_mcs into alloc_aux_buffer

On Mon, May 07, 2018 at 11:51:50AM +0300, Pohjolainen, Topi wrote: > On Fri, May 04, 2018 at 11:04:40AM -0700, Nanley Chery wrote: > > On Fri, May 04, 2018 at 10:00:32AM -0700, Nanley Chery wrote: > > > On Fri, May 04, 2018 at 09:42:34AM -0700, Nanley Chery wrote: > > > > On Thu, May 03, 2018 at 12

[Mesa-dev] [PATCH] meson: Fix build for egl platform_x11 with dri3

From: Ville Syrjälä platform_x11 with dri3 needs inc_loader. In file included from ../src/egl/drivers/dri2/platform_x11_dri3.c:35:0: ../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory In file included from ../src/egl/drivers/dri2/platform_x11.

Re: [Mesa-dev] [PATCH 0/4] improve buffer cache and reuse

On Sat, 5 May 2018 09:11:28 +0100 Chris Wilson wrote: > Quoting James Xiong (2018-05-05 01:56:01) > > This series align the buffer size up to page instead of a bucket > > size to improve memory allocation efficiency. > > It doesn't though. It still retrieves up to the bucket size, so with a >

Re: [Mesa-dev] [PATCH 01/17] i965/miptree: Fix handling of uninitialized MCS buffers

On Mon, May 07, 2018 at 09:49:01AM +0300, Tapani Pälli wrote: > > On 05/04/2018 05:59 PM, Nanley Chery wrote: > > On Fri, May 04, 2018 at 09:03:32AM +0300, Tapani Pälli wrote: > > > Hi Nanley; > > > > > > > Hey Tapani, > > > > > On 05/03/2018 10:03 PM, Nanley Chery wrote: > > > > Before this pa

Re: [Mesa-dev] A question about nir_lower_wpos_ytransform

On Monday, May 7, 2018 8:53:34 AM PDT Jason Ekstrand wrote: > On Mon, May 7, 2018 at 8:02 AM, Alejandro Piñeiro > wrote: > > > Hi Jason, > > > > as part of the ARB_gl_spirv work, we are doing the linking based on the > > nir shader that comes from spirv_to_nir. On some cases, > > nir_lower_wpos_y

Re: [Mesa-dev] [PATCH] i965: Don't leak blorp on Gen4-5.

Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] i965: Don't leak blorp on Gen4-5.

We used to only initialize BLORP on Gen6+. When we added it on Gen4-5, we forgot to destroy it unconditionally. Fixes: 752d7af77a52898cebf5597def4fdd38b1d6303e (i965: Add blorp support for gen4-5) --- src/mesa/drivers/dri/i965/brw_context.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-

Re: [Mesa-dev] [PATCH v3 08/13] mesa/st/tests: Add tests for array merge helper classes.

Quoting Gert Wollny (2018-04-28 12:30:08) > v2: Define tests also in the meson.build file. > Signed-off-by: Gert Wollny > --- > src/mesa/state_tracker/tests/Makefile.am | 20 +- > src/mesa/state_tracker/tests/meson.build | 14 + > src/mesa/state_tracker/tests/st_tests_common

Re: [Mesa-dev] [PATCH 5/9] anv: Add vma_heap allocators in anv_device

Jason Ekstrand writes: > On Wed, May 2, 2018 at 9:01 AM, Scott D Phillips > wrote: > >> These will be used to assign virtual addresses to soft pinned >> buffers in a later patch. >> --- >> src/intel/vulkan/anv_device.c | 75 ++ >> >> src/intel/vulkan/anv

Re: [Mesa-dev] [PATCH 1/2] mesa: add R10G10B10{A, X}2 to MESA <-> DRI format translations

Quoting Dylan Baker (2018-05-06 12:38:54) > > > On May 4, 2018 5:44:25 PM PDT, Chad Versace wrote: > > > >The BUG line should be converted to any of the following trailer lines: > > > >Bug: https://crbug.com/776903 > >(This is my favorite). > >Fixes: https://crbug.com/776903 > >

Re: [Mesa-dev] [PATCH 06/10] i965: Add virtual memory allocator infrastructure to brw_bufmgr.

On Saturday, May 5, 2018 12:49:18 AM PDT Chris Wilson wrote: > Quoting Chris Wilson (2018-05-04 22:27:27) > > Quoting Kenneth Graunke (2018-05-04 02:12:36) > > > + if (brw_using_softpin(bufmgr) && bo->gtt_offset == 0ull) { > > > + bo->gtt_offset = vma_alloc(bufmgr, memzone, bo->size, 1); > >

Re: [Mesa-dev] [PATCH 06/10] i965: Add virtual memory allocator infrastructure to brw_bufmgr.

On Friday, May 4, 2018 2:27:27 PM PDT Chris Wilson wrote: > Quoting Kenneth Graunke (2018-05-04 02:12:36) > > + if (brw_using_softpin(bufmgr) && bo->gtt_offset == 0ull) { > > + bo->gtt_offset = vma_alloc(bufmgr, memzone, bo->size, 1); > > + > > + if (bo->gtt_offset == 0ull) > > +

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