Although from SPIR-V point of view, rounding modes are attached to the
operation/destination, on i965 it is a status, so we don't need to
explicitly set the rounding mode if the one we want is already set.
v2: Use a single SHADER_OPCODE_RND_MODE opcode taking an immediate
with the rounding mod
By default we don't set the rounding mode. We only set
round-to-near-even or round-to-zero mode if explicitly set from nir.
v2: Use a single SHADER_OPCODE_RND_MODE opcode taking an immediate
with the rounding mode (Curro)
Signed-off-by: Jose Maria Casanova Crespo
Signed-off-by: Alejandro Piñ
Although it is possible to emit them directly as AND/OR on brw_fs_nir,
having a specific opcode makes it easier to remove duplicate settings
later.
v2: (Curro)
- Set thread control to 'switch' when using the control register
- Use a single SHADER_OPCODE_RND_MODE opcode taking an immediate
https://bugs.freedesktop.org/show_bug.cgi?id=98691
Vinson Lee changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On 08/30/2017 06:50 AM, Tapani Pälli wrote:
On 08/29/2017 12:51 PM, Michael Olbrich wrote:
dri2_display_destroy may be called by dri2_initialize_wayland_drm() if
initialization fails. In this case, these objects may not be initialized.
Same thing can happen with dri2_initialize_wayland_swra
On 08/29/2017 12:51 PM, Michael Olbrich wrote:
dri2_display_destroy may be called by dri2_initialize_wayland_drm() if
initialization fails. In this case, these objects may not be initialized.
Same thing can happen with dri2_initialize_wayland_swrast, would be good
to fix both at one go.
Si
https://bugs.freedesktop.org/show_bug.cgi?id=101709
Brian Paul changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
On 08/29/2017 06:17 PM, Roland Scheidegger wrote:
Looks good to me, thanks.
Reviewed-by: Roland Scheidegger
Albeit I'm not quite sure why it is never set here?
This particular test sets a 0 x 0 scissor region. All the
pipe_scissor_state members are zero and when the state tracker does a
m
On Tue, Aug 29, 2017 at 1:13 PM, Roland Scheidegger wrote:
> That said, I already reviewed this:
> https://lists.freedesktop.org/archives/mesa-dev/2017-August/167515.html
Since I don't think Ben has commit access, it seems that you should be
the one to commit it as well.
_
For the series:
Reviewed-by: Marek Olšák
Marek
On Fri, Aug 25, 2017 at 4:40 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> The data is read when the render_cond_atom is emitted, so we must
> delay emitting the atom until after the flush.
>
> Fixes: 0fe0320dc074 ("radeonsi: use optimal p
dri2_display_destroy may be called by dri2_initialize_wayland_drm() if
initialization fails. In this case, these objects may not be initialized.
Signed-off-by: Michael Olbrich
---
src/egl/drivers/dri2/egl_dri2.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/egl
I have to conclude that I don't see a way to use LOAD with CONSTBUF
and keep the same performance as before. It looks like there are some
deficiencies in our compiler stack that are unfixable in Mesa alone.
Marek
On Wed, Aug 30, 2017 at 2:11 AM, Marek Olšák wrote:
> Related IRC discussion:
>
> 0
Looks good to me, thanks.
Reviewed-by: Roland Scheidegger
Albeit I'm not quite sure why it is never set here?
This bug looks similar in nature to the uninitialized fb (see
8bfe451ed30918244618608871423b2a72cf9767) and I thought that was
impossible to hit with gl state tracker...
Roland
Am 28.0
Related IRC discussion:
00:01 < mareko> arsenm: what are the chances I can convince you to
allow me to set mayLoad = 0 on s_buffer_load_dword? :) the instruction
always reads from read-only memory with Mesa
00:02 < mareko> apparently, readnone doesn't get through
00:02 < arsenm> mareko: you should
Interesting. It may be that glsl_to_tgsi uses copy propagation to fold
those CONST loads into operands, which puts them next to their uses in LLVM.
I guess LLVM doesn't understand that s_buffer_load_dword loads from
immutable dereferenceable memory. It would benefit from mayLoad = 0 in
this case I
On 30/08/17 09:39, Marek Olšák wrote:
Did you check shader-db for differences in code generation?
Yes, for more details and discussion please see the cover letter.
Thanks,
Tim
Marek
On Tue, Aug 22, 2017 at 2:14 PM, Timothy Arceri wrote:
v2: always set can_speculate and allow_smem to true
On Tue, Aug 22, 2017 at 2:14 PM, Timothy Arceri wrote:
> Before this change we were defaulting to STD140 which is slightly
> less efficient at packing arrays.
> ---
> src/gallium/drivers/radeonsi/si_pipe.c | 2 +-
> src/mesa/state_tracker/st_context.c| 3 +++
> 2 files changed, 4 insertions(+
Did you check shader-db for differences in code generation?
Marek
On Tue, Aug 22, 2017 at 2:14 PM, Timothy Arceri wrote:
> v2: always set can_speculate and allow_smem to true
> ---
> src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 31
> +++
> 1 file changed, 21 insertio
On 30/08/17 05:56, Thomas Helland wrote:
Length of the token was already calculated by flex and stored in yyleng,
no need to implicitly call strlen() via linear_strdup().
---
src/compiler/glsl/glcpp/glcpp-lex.l | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/compiler/
On August 29, 2017 3:00:51 PM Kenneth Graunke wrote:
On Tuesday, August 1, 2017 3:48:29 PM PDT Jason Ekstrand wrote:
This little series changes things around so that, instead of passing MOCS
values into ISL, ISL knows how to set them itself. This allows us to
centralize some of the decisions
The current DCC init routine doesn't account for initializing a
single layer or level. Multilayer seems hard for small textures on
pre-GFX9 as tre metadata for the layers can be interleaved. For
GFX9 multilevel textures are a problem for similar reasons.
So just disable this for now, until we hand
On August 29, 2017 2:29:25 PM Kenneth Graunke wrote:
Improves performance of GFXBench4 tests at 1024x768 on a Kabylake GT2:
- Manhattan 3.1 by 1.32134% +/- 0.322734% (n=8).
- Car Chase by 1.25607% +/- 0.291262% (n=5).
Woohoo! That's not bad. Apart from my little niggle on patch 1,
everythi
On August 29, 2017 3:14:08 PM Chris Wilson wrote:
Quoting Kenneth Graunke (2017-08-29 22:28:38)
Anvil already had code to copy between two buffer objects in the most
efficient way possible, using large bpp copies, then smaller bpp copies.
This patch moves that logic into BLORP as blorp_buffer
On August 29, 2017 2:29:26 PM Kenneth Graunke wrote:
Anvil already had code to copy between two buffer objects in the most
efficient way possible, using large bpp copies, then smaller bpp copies.
This patch moves that logic into BLORP as blorp_buffer_copy(), so we
can reuse it in i965 as well.
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_state.c | 4
src/gallium/drivers/radeonsi/si_state.h | 1 +
src/gallium/drivers/radeonsi/si_state_shaders.c | 1 +
3 files changed, 6 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/driv
From: Marek Olšák
---
src/gallium/drivers/r600/r600_pipe.c | 2 +-
src/gallium/drivers/radeon/r600_pipe_common.c | 20 ++--
src/gallium/drivers/radeon/r600_pipe_common.h | 25 -
src/gallium/drivers/radeonsi/si_pipe.c| 5 ++---
4 files ch
I'd like CONSTBUF to stay. I think CONST is already too overloaded.
If we start treating CONST[0] and CONST[0][0] differently, things are
just going to get more ugly. If the second dimension is unspecified,
it's implied to be 0. TGSI doesn't allow specifying the second
dimension index and omit the
Quoting Kenneth Graunke (2017-08-29 22:28:38)
> Anvil already had code to copy between two buffer objects in the most
> efficient way possible, using large bpp copies, then smaller bpp copies.
>
> This patch moves that logic into BLORP as blorp_buffer_copy(), so we
> can reuse it in i965 as well.
On Tuesday, August 1, 2017 3:48:30 PM PDT Jason Ekstrand wrote:
> This makes ISL now ignore the MOCS data provided by the caller and just
> set it based on surface usage.
> ---
> src/intel/isl/isl_emit_depth_stencil.c | 12
> src/intel/isl/isl_genX_mocs.h | 53
>
On Tuesday, August 1, 2017 3:48:29 PM PDT Jason Ekstrand wrote:
> This little series changes things around so that, instead of passing MOCS
> values into ISL, ISL knows how to set them itself. This allows us to
> centralize some of the decisions about how MOCS gets set for surfaces and
> hopefully
Anvil already had code to copy between two buffer objects in the most
efficient way possible, using large bpp copies, then smaller bpp copies.
This patch moves that logic into BLORP as blorp_buffer_copy(), so we
can reuse it in i965 as well.
---
src/intel/blorp/blorp.h | 6 ++
src/intel/bl
Although we're phasing out brw_emit_mi_flush(), we still use it in some
places in order to "flush everything". In a number of those places, we
write data to a buffer that we may then bind as an image surface, SSBO,
or atomic buffer. Those usages require us to flush the data cache.
---
src/mesa/d
When we blit data into a buffer object, we may need to invalidate any
caches that might contain stale data, so the new data becomes visible.
For example, if the buffer object is bound as a vertex buffer, we need
to invalidate the vertex fetch cache.
While this flushing was missing, it usually hap
Gen4-6 can only handle surfaces up to 8192. Only Gen7+ can do 16384.
---
src/intel/blorp/blorp_blit.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 998fd9b6d39..d3b51a18161 100644
--- a/sr
Improves performance of GFXBench4 tests at 1024x768 on a Kabylake GT2:
- Manhattan 3.1 by 1.32134% +/- 0.322734% (n=8).
- Car Chase by 1.25607% +/- 0.291262% (n=5).
---
src/mesa/drivers/dri/i965/intel_buffer_objects.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
This exposes the new blorp_copy_buffer() functionality to i965.
It should be a drop-in replacement for intel_emit_linear_blit()
(other than the arguments being backwards, for consistency with BLORP).
---
src/mesa/drivers/dri/i965/brw_blorp.c | 18 ++
src/mesa/drivers/dri/i965/brw_b
Reviewed-by: Bas Nieuwenhuizen
On Sun, Aug 27, 2017, at 23:44, Grazvydas Ignotas wrote:
> Currently if table_size is 0, it's falling through to:
>
> unreachable("hash table should never be full");
>
> But table_size can be 0 when RADV_DEBUG=nocache is set, or when the
> table allocation fails (
Reviewed-by: Marek Olšák
Marek
On Tue, Aug 29, 2017 at 4:24 PM, Samuel Pitoiset
wrote:
> Only useful when that debug option is enabled.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 20
> src/gallium/winsys/amdgpu/drm/amdgpu_cs
On Tue, Aug 29, 2017 at 4:47 PM, Christian König
wrote:
> From: Christian König
>
> When the kernel supports it set the local flag and
> stop adding those BOs to the BO list.
>
> Can probably be optimized much more.
>
> Signed-off-by: Christian König
> ---
> src/gallium/winsys/amdgpu/drm/amdgpu
Reviewed-by: Marek Olšák
Marek
On Tue, Aug 29, 2017 at 5:37 PM, Samuel Pitoiset
wrote:
> This fixes a rendering issue with Hitman when bindless textures
> are enabled.
>
> Fixes: 2263610827 ("radeonsi: flush DB caches only when transitioning from DB
> to texturing")
> Signed-off-by: Samuel Pit
Am 29.08.2017 um 18:51 schrieb Emil Velikov:
> On 23 August 2017 at 21:32, Ben Crocker wrote:
>> From: Ray Strode
>>
>> lp_build_fetch_rgba_soa fetches a texel from a texture.
>> Part of that process involves first gathering the element
>> together from memory into a packed format, and then break
On 29/08/17 21:18, Francisco Jerez wrote:
> Chema Casanova writes:
>
>> El 25/08/17 a las 20:09, Francisco Jerez escribió:
>>> Alejandro Piñeiro writes:
>>>
Although it is possible to emit them directly as AND/OR on brw_fs_nir,
having specific opcodes makes it easier to remove duplic
---
src/util/tests/string_buffer/Makefile.am | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/src/util/tests/string_buffer/Makefile.am
b/src/util/tests/string_buffer/Makefile.am
index 60039a90d2..fdf285fc5d 100644
--- a/src/util/tests/string_buffer/Makefile.am
Migrate removal of line continuations to string_buffer. Before this
it used ralloc_strncat() to append strings, which internally
each time calculates strlen() of its argument. Its argument is
entire shader, so it multiple time scans the whole shader text.
Signed-off-by: Vladislav Egorov
V2: Adap
From: Vladislav Egorov
Absolute majority of identifiers in shaders are not macro references.
Many shaders don't use preprocessing macros at all. Almost all
queries to parser->defines hash-table will be unsuccessful. Note
that all predefined macros start either with "GL_" or with "__".
Moreover, e
More tests could probably be added, but this should cover
concatenation, resizing, clearing, formatted printing,
and checking the length, so it should be quite complete.
V2: Address review feedback from Timothy, plus fixes
- Use a large enough char array
- Actually test the formatted appendi
V2: Pointed out by Timothy
- Fix pp.c reralloc size issue and comment
V3 - Use vprintf instead of printf where we should
- Fixes failing make-check tests
---
src/compiler/glsl/glcpp/glcpp-parse.y | 195 ++
src/compiler/glsl/glcpp/glcpp.h | 8 +-
src/c
---
src/util/tests/string_buffer/append_and_print.c | 99 --
src/util/tests/string_buffer/append_and_print.cpp | 221 ++
2 files changed, 221 insertions(+), 99 deletions(-)
delete mode 100644 src/util/tests/string_buffer/append_and_print.c
create mode 100644 src/ut
Length of the token was already calculated by flex and stored in yyleng,
no need to implicitly call strlen() via linear_strdup().
---
src/compiler/glsl/glcpp/glcpp-lex.l | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/compiler/glsl/glcpp/glcpp-lex.l
b/src/compiler/glsl/g
This is a resend of the string buffer implementation and
related patches sent out back in May. I've done one more
change to the string buffer; using u_string.h for a compatible
vsnprintf version to reduce the code even more. I've not been
able to test this due to two build breakages (xmlpool and dr
Based on Vladislav Egorovs work on the preprocessor, but split
out to a util functionality that should be universal. Setup, teardown,
memory handling and general layout is modeled around the hash_table
and the set, to make it familiar for everyone.
A notable change is that this implementation is a
Francisco Jerez writes:
> Chema Casanova writes:
>
>> El 25/08/17 a las 20:09, Francisco Jerez escribió:
>>> Alejandro Piñeiro writes:
>>>
Although it is possible to emit them directly as AND/OR on brw_fs_nir,
having specific opcodes makes it easier to remove duplicate settings
l
Chema Casanova writes:
> El 25/08/17 a las 20:09, Francisco Jerez escribió:
>> Alejandro Piñeiro writes:
>>
>>> Although it is possible to emit them directly as AND/OR on brw_fs_nir,
>>> having specific opcodes makes it easier to remove duplicate settings
>>> later.
>>>
>>> Signed-off-by: Aleja
El 25/08/17 a las 20:09, Francisco Jerez escribió:
> Alejandro Piñeiro writes:
>
>> Although it is possible to emit them directly as AND/OR on brw_fs_nir,
>> having specific opcodes makes it easier to remove duplicate settings
>> later.
>>
>> Signed-off-by: Alejandro Piñeiro
>> Signed-off-by: J
https://bugs.freedesktop.org/show_bug.cgi?id=102454
--- Comment #1 from Emil Velikov ---
The patch in the bug report isn't quite right (aka remove the header and guards
all together).
Instead one should add a configure check - AC_LINK_IFELSE() ... which:
- includes xlocale.h reusing the HAVE_XL
On 29 August 2017 17:33:57 BST, Emil Velikov wrote:
> On 29 August 2017 at 15:40, Eric Engestrom
> wrote:
> > On Sunday, 2017-08-27 11:20:33 +0100, Emil Velikov wrote:
> >> From: Emil Velikov
> >>
> >> The dimensions are already set [to 0 or the value provided by the
> >> attributes list] by the
On 29 August 2017 18:11:45 BST, Matt Turner wrote:
> On Tue, Aug 29, 2017 at 3:11 AM, Eric Engestrom
> wrote:
> > On Monday, 2017-08-28 14:57:13 -0700, Matt Turner wrote:
> >> Avoids Clang's warning about the current code:
> >>
> >>warning: suggest braces around initialization of subobject
>
On 29 August 2017 at 18:10, Matt Turner wrote:
> On Tue, Aug 29, 2017 at 3:35 AM, Emil Velikov
> wrote:
>> On 29 August 2017 at 11:11, Eric Engestrom wrote:
>>> On Monday, 2017-08-28 14:57:13 -0700, Matt Turner wrote:
Avoids Clang's warning about the current code:
warning: sug
On Tue, Aug 29, 2017 at 3:11 AM, Eric Engestrom
wrote:
> On Monday, 2017-08-28 14:57:13 -0700, Matt Turner wrote:
>> Avoids Clang's warning about the current code:
>>
>>warning: suggest braces around initialization of subobject
>
> I'm not sure about this patch [1], but everything else in this
On Tue, Aug 29, 2017 at 3:35 AM, Emil Velikov wrote:
> On 29 August 2017 at 11:11, Eric Engestrom wrote:
>> On Monday, 2017-08-28 14:57:13 -0700, Matt Turner wrote:
>>> Avoids Clang's warning about the current code:
>>>
>>>warning: suggest braces around initialization of subobject
>>
>> I'm n
On 23 August 2017 at 21:32, Ben Crocker wrote:
> From: Ray Strode
>
> lp_build_fetch_rgba_soa fetches a texel from a texture.
> Part of that process involves first gathering the element
> together from memory into a packed format, and then breaking
> out the individual color channels into separat
On 29 August 2017 at 15:40, Eric Engestrom wrote:
> On Sunday, 2017-08-27 11:20:33 +0100, Emil Velikov wrote:
>> From: Emil Velikov
>>
>> The dimensions are already set [to 0 or the value provided by the
>> attributes list] by the _eglInitSurface() call further up.
>>
>> The values are updated, a
brw_draw_prims needs to be refactored prior to
ARB_indirect_parameters implementation.
Signed-off-by: Plamena Manolova
---
src/mesa/drivers/dri/i965/brw_draw.c | 343 +++
1 file changed, 189 insertions(+), 154 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/b
We can implement ARB_indirect_parameters for i965 by
taking advantage of the conditional rendering mechanism.
This works by issuing maxdrawcount draw calls and using
conditional rendering to predicate each of them with
"drawcount > gl_DrawID"
Signed-off-by: Plamena Manolova
---
src/mesa/drivers/
On Tue, Aug 29, 2017 at 6:15 AM, Emil Velikov wrote:
> On 28 August 2017 at 22:57, Matt Turner wrote:
>
>> -# Flags to help ensure that certain portions of the code -- and only
>> those
>> -# portions -- can be built with MSVC:
>> -# - src/util, src/gallium/auxiliary, rc/gallium/driv
Gentle bump. This fixes mesa master for Kitware's VTK testing.
> On Aug 25, 2017, at 2:59 PM, Cherniak, Bruce wrote:
>
> Accompanying patch "st/mesa: only try to create 1x msaa surfaces for
> 'fake' msaa" requires driver to report max_samples=1 to enable "fake"
> msaa. Previously, 0 and 1 were
Gentle bump. This fixes mesa master for Kitware's VTK testing.
> On Aug 25, 2017, at 2:59 PM, Bruce Cherniak wrote:
>
> From: Brian Paul
>
> For software drivers where we want "fake" msaa support for GL 3.x, we
> treat 1 sample as being msaa.
>
> For drivers with real msaa support, start for
This fixes a rendering issue with Hitman when bindless textures
are enabled.
Fixes: 2263610827 ("radeonsi: flush DB caches only when transitioning from DB
to texturing")
Signed-off-by: Samuel Pitoiset
---
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/gallium/drivers/radeonsi/si_compu
From: Christian König
When the kernel supports it set the local flag and
stop adding those BOs to the BO list.
Can probably be optimized much more.
Signed-off-by: Christian König
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 8
src/gallium/winsys/amdgpu/drm/amdgpu_bo.h | 2 ++
sr
From: Marek Olšák
For lower overhead in the CS ioctl.
Winsys allocators are not used with interprocess-sharable resources.
v2: It shouldn't crash anymore, but the kernel will reject the new flag.
v3 (christian): Rename the flag, avoid sending those buffers in the BO list.
v4 (christian): Remove
On Sunday, 2017-08-27 11:20:33 +0100, Emil Velikov wrote:
> From: Emil Velikov
>
> The dimensions are already set [to 0 or the value provided by the
> attributes list] by the _eglInitSurface() call further up.
>
> The values are updated, as the DRI driver calls the DRI2/IMAGE_LOADER'
> get_buffe
On 28 August 2017 at 21:20, Brian Paul wrote:
> If llvmpipe_set_scissor_states() is never called, we still need to be sure
> that derived scissor/clip state is updated. As of commit 743ad599a97d09b1
> that function might not be called.
>
> Fixes regressed Piglit gl-1.0-scissor-offscreen -fbo -aut
https://bugs.freedesktop.org/show_bug.cgi?id=101851
Emil Velikov changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
Only useful when that debug option is enabled.
Signed-off-by: Samuel Pitoiset
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 20
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 4 +---
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 3 +++
src/gallium/winsys/amdgpu/dr
On 29 August 2017 at 14:51, Lionel Landwerlin
wrote:
> On 29/08/17 14:39, Emil Velikov wrote:
>>
>> Hi Lionel,
>>
>> On 29 August 2017 at 14:05, Lionel Landwerlin
>> wrote:
>>>
>>> This allows us to deploy new configurations without touching the
>>> kernel.
>>>
>>> v2: Detect loadable configs wit
yeah, I already send out a "doing it in the driver" patch for this:
https://lists.freedesktop.org/archives/mesa-dev/2017-August/167798.html
On Mon, Aug 28, 2017 at 10:22 PM, Marek Olšák wrote:
> You can also call util_query_clear_result in the driver.
>
> Marek
>
> On Sat, Aug 26, 2017 at 1:15 AM
On 29/08/17 14:39, Emil Velikov wrote:
Hi Lionel,
On 29 August 2017 at 14:05, Lionel Landwerlin
wrote:
This allows us to deploy new configurations without touching the
kernel.
v2: Detect loadable configs without creating one (Chris)
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dr
On 29 August 2017 at 11:41, Mike Lothian wrote:
> Feel free to add my tested by for this
>
Great, thanks. Pushed to master.
Will scoop for 17.2 in a moment.
-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mai
Hi Lionel,
On 29 August 2017 at 14:05, Lionel Landwerlin
wrote:
> This allows us to deploy new configurations without touching the
> kernel.
>
> v2: Detect loadable configs without creating one (Chris)
>
> Signed-off-by: Lionel Landwerlin
> ---
> src/mesa/drivers/dri/i965/brw_performance_query.
On 28 August 2017 at 22:57, Matt Turner wrote:
> -# Flags to help ensure that certain portions of the code -- and only
> those
> -# portions -- can be built with MSVC:
> -# - src/util, src/gallium/auxiliary, rc/gallium/drivers/llvmpipe, and
> -# - non-Linux/Posix OpenGL portions
On Friday, 2017-08-25 16:47:35 +0100, Emil Velikov wrote:
> On 24 August 2017 at 15:22, Eric Engestrom wrote:
> > On Thursday, 2017-08-24 08:54:04 -0500, Rob Herring wrote:
> >> On Thu, Aug 24, 2017 at 7:49 AM, Eric Engestrom
> >> wrote:
> >> > Khronos: https://github.com/KhronosGroup/EGL-Registr
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_context.h | 15 ++
src/mesa/drivers/dri/i965/brw_oa.py | 51 +
2 files changed, 66 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_co
This provides a good way to verify we haven't broken using the perf
driver on older kernels (which don't have the oa config loading
mechanism).
Signed-off-by: Lionel Landwerlin
---
src/intel/common/gen_debug.c | 1 +
src/intel/common/gen_debug.h | 2 +-
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_oa.py | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_oa.py
b/src/mesa/drivers/dri/i965/brw_oa.py
index 91f7ecb5731..8c35923462f 100644
--- a/src/me
This allows us to deploy new configurations without touching the
kernel.
v2: Detect loadable configs without creating one (Chris)
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_performance_query.c | 98 ++-
1 file changed, 95 insertions(+), 3 deletions(-)
Hi again,
Improvement on detection of loadable configs as suggested by Chris.
Change is in patch 4.
Cheers,
Lionel Landwerlin (5):
i965: perf: make revision variable available
i965: perf: factorize code for availability
i965: perf: list registers to program for queries
i965: perf: add su
This will be used in the next commit to build up register programming.
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_oa.py | 1 +
src/mesa/drivers/dri/i965/brw_performance_query.c | 4 +++-
src/mesa/drive
On Sat, Aug 26, 2017 at 9:40 AM, Qiang Yu wrote:
> Hi guys,
>
> When working on lima gp compiler, I come across two problems about
> inserting extra uniform
> and instructions in nir for the driver and don't know where's the
> right place to do it. So I'd like
> to hear your opinion and if there's
https://bugs.freedesktop.org/show_bug.cgi?id=102466
--- Comment #3 from Emil Velikov ---
(In reply to dcb314 from comment #2)
> I think you missed the point. Any expression ANDed with 6 will be != 6.
>
How about when xgetbv() returns say 6 or 7 (amongst others)?
Also keep in mind that the file
https://bugs.freedesktop.org/show_bug.cgi?id=102466
--- Comment #2 from dcb...@hotmail.com ---
(In reply to Gert Wollny from comment #1)
> It would be helpful to add on which OS and with which compiler and for what
> architecture you were compiling mesa, because depending on the build
> environmen
On 29/08/17 12:15, Chris Wilson wrote:
Quoting Lionel Landwerlin (2017-08-29 11:58:57)
This allows us to deploy new configurations without touching the
kernel.
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_performance_query.c | 97 ++-
1 file changed
Quoting Lionel Landwerlin (2017-08-29 11:58:57)
> This allows us to deploy new configurations without touching the
> kernel.
>
> Signed-off-by: Lionel Landwerlin
> ---
> src/mesa/drivers/dri/i965/brw_performance_query.c | 97
> ++-
> 1 file changed, 96 insertions(+), 1 delet
[Dropping Neil's email, as it bounces]
On 29 August 2017 at 11:43, Daniel Stone wrote:
egl: allow RGB565 formats in eglCreateWaylandBufferFromImageWL
>>>
>>> I've been avoiding trying to expand use of this API, in all honesty.
>>>
>> Any particular reason?
>>
>> Quick search on the webs +
https://bugs.freedesktop.org/show_bug.cgi?id=102466
--- Comment #1 from Gert Wollny ---
It would be helpful to add on which OS and with which compiler and for what
architecture you were compiling mesa, because depending on the build
environment xgetbv() may simply return 0 as a fallback (see line
This provides a good way to verify we haven't broken using the perf
driver on older kernels (which don't have the oa config loading
mechanism).
Signed-off-by: Lionel Landwerlin
---
src/intel/common/gen_debug.c | 1 +
src/intel/common/gen_debug.h | 2 +-
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_context.h | 15 ++
src/mesa/drivers/dri/i965/brw_oa.py | 51 +
2 files changed, 66 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_co
This allows us to deploy new configurations without touching the
kernel.
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_performance_query.c | 97 ++-
1 file changed, 96 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_performance_qu
This will be used in the next commit to build up register programming.
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_oa.py | 1 +
src/mesa/drivers/dri/i965/brw_performance_query.c | 4 +++-
src/mesa/drive
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_oa.py | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_oa.py
b/src/mesa/drivers/dri/i965/brw_oa.py
index 91f7ecb5731..8c35923462f 100644
--- a/src/me
Hi,
Some recent work in the i915 kernel driver enables us to load OA
configs from userspace, so new configs can be deployed without having
to modify the kernel. This series makes use of this feature in i965 if
available.
Cheers,
Lionel Landwerlin (5):
i965: perf: make revision variable availab
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