https://bugs.freedesktop.org/show_bug.cgi?id=98243
--- Comment #2 from Samuel Iglesias ---
(In reply to Randy from comment #0)
> dEQP-GLES31.functional.shaders.linkage.uniform.block.differing_precision.qpa:
> expected shaders to compile and link properly, but
> failed to link.
I have sent a coup
Signed-off-by: Samuel Iglesias Gonsálvez
---
I did the move as interstage_member_mismatch() is the next function
after intrastage_match() but I don't mind to either keep this patch
or replace it with a change adding the interstage_member_mismatch()
function prototype before intrastage_match().
It is specific only to GLSL ES 3.1. From the spec, section 4.3.9
"Interface Blocks":
"Matched block names within a shader interface (as defined above) must
match in terms of having the same number of declarations with the same
sequence of types and the same sequence of member names, as well as
Hello,
The last patch of this series fixes one dEQP-GLES31 test [0] (bug [1]).
GLSL ES 3.1 spec allows mismatching of precision qualifiers for shader
interface block members (uniform blocks and shader storage blocks).
However, in the rest of GLSL ES specs (including GLSL ES 3.2!) this is
the oppo
With ARB_gpu_shader5, texture offsets can be any source, including TEMPs
and IN's. Make sure to process them as regular sources so that we pick
up masks, etc.
This should fix some CTS tests that feed offsets directly to
textureGatherOffset, and we were not picking up the input use, thus not
advert
rb
On Tue, Oct 18, 2016 at 8:36 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> I can't see this being used anywhere.
>
> Signed-off-by: Dave Airlie
> ---
> src/intel/vulkan/anv_private.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulka
Ilia Mirkin writes:
> Why does it care where those functions are defined? I thought it was
> all one big happy namespace, with the categories just there for
> general amusement. Could you shed some light on what the actual
> situation is?
>
Heh, I won't pretend to understand the dispatch generat
The state tracker tries to attach the info to the wrong shader. This is
easy enough to protect against.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/nv50/nv50_program.c | 3 +++
src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 7 +--
2 files changed, 8 insertions(+), 2 deletio
Why does it care where those functions are defined? I thought it was
all one big happy namespace, with the categories just there for
general amusement. Could you shed some light on what the actual
situation is?
On Tue, Oct 18, 2016 at 11:48 PM, Francisco Jerez wrote:
> These two GLES 3.2 entry po
https://bugs.freedesktop.org/show_bug.cgi?id=98172
--- Comment #28 from Suzuki, Shinji ---
Yes. I agree with you that we can do without per-sync-object if we
allow all waiters enter fence_finish() freely.
With that said, per-sync-object mutex has another benefit of
potentially reducing lock cont
This reverts commit 85e9bbc14d93fa7166c9ae075ee7ae29a8313e3f. The
previous commit should help with the scons build failure caused by the
original commit.
---
src/mapi/glapi/gen/static_data.py | 12
1 file changed, 12 insertions(+)
diff --git a/src/mapi/glapi/gen/static_data.py
b/sr
These two GLES 3.2 entry points were being defined in the category of
the ARB_ES3_2_compatibility and KHR_blend_equation_advanced extensions
respectively instead of in the ES3.2 category. Defining them in the
ES3.2 category makes sure that the gl_procs.py generator emits
declarations in the glproc
From: Dave Airlie
I can't see this being used anywhere.
Signed-off-by: Dave Airlie
---
src/intel/vulkan/anv_private.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 0e25827..3fe9d7d 100644
--- a/src/intel/vulkan/anv_pr
On Tue, 2016-10-18 at 12:07 -0700, Ian Romanick wrote:
> I'd like to see two tiny changes:
>
> 1. A comment for the IsPositionInvariant field that it can only be
> true
> for vertex programs.
I already had that this is only used for assembly style vertex
programs. I've reworded it to be only true
https://bugs.freedesktop.org/show_bug.cgi?id=98172
--- Comment #27 from Michel Dänzer ---
Note that if we allow concurrent fence_finish calls, I don't think we need a
per-sync-object mutex.
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the
https://bugs.freedesktop.org/show_bug.cgi?id=98172
--- Comment #26 from Michel Dänzer ---
(In reply to Marek Olšák from comment #24)
> Hm. Probably none.
Actually, I think there are: E.g. consider one thread calling glClientWaitSync
with a non-0 timeout, blocking for some time with the mutex loc
Hi Jan,
On 18.10.2016 00:07, Jan Ziak wrote:
This patch replaces the ir_variable_refcount_entry's linked-list
with an array-list.
The array-list has local storage which does not require ANY additional
allocations if the list has small number of elements. The size of this
storage is configurabl
On wtorek, 18 października 2016 00:07:18 CEST Jan Ziak wrote:
> This patch replaces the ir_variable_refcount_entry's linked-list
> with an array-list.
>
> The array-list has local storage which does not require ANY additional
> allocations if the list has small number of elements. The size of this
On Tuesday, October 18, 2016 5:12:27 PM PDT Ian Romanick wrote:
> On 10/11/2016 02:02 AM, Iago Toral Quiroga wrote:
> > ARB_gpu_shader_fp64 was the last piece missing. Notice that some
> > hardware and kernel combinations do not support pipelined register
> > writes, which are required for some Ope
https://bugs.freedesktop.org/show_bug.cgi?id=98271
--- Comment #20 from John ---
> Installing an older kernel, see if that works with 12.0 mesa.
> If yes we have narrowed it down to the kernel, if not we
> need to stick a bit more into mesa.
I've tried with a 3.18 kernel and still got the issue,
This patch is
Reviewed-by: Ian Romanick
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4
This patch is
Reviewed-by: Ian Romanick
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> Basically, ALIGN1 mode will ignore swizzles on the input vectors so we don't
> want the copy propagation pass to mess with them.
> ---
> .../drivers/dri/i965/brw_vec4_copy_propagation.cpp | 24
> +++
This patch is
Reviewed-by: Ian Romanick
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> These align1 opcodes do partial writes of 64-bit data. The problem is that we
> want to use them to write on the same register to implement packDouble2x32 and
> from the point of view of DCE, since both o
This patch is
Reviewed-by: Ian Romanick
We may be able to eliminate some of this after I do int64 support. It
might be cleaner to do unpackInt2x32(doubleBitsToInt64(x)) at a higher
level of the compiler instead.
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> These opcodes will pick the lo
This patch is
Reviewed-by: Ian Romanick
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> These opcodes will set the low/high 32-bit in each 64-bit data element
> using Align1 mode. We will use this to implement packDouble2x32.
>
> We use Align1 mode because in order to implement this in Alig
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> For 32-bit instructions we want to use <4,4,1> regions for VGRF
> sources so we should really set a width of 4 (we were setting 8).
>
> For 64-bit instructions we want to use a width of 2 because the
> hardware uses 32-bit swizzles, meaning that
On 10/18/2016 05:26 PM, Matt Turner wrote:
> On Tue, Oct 18, 2016 at 5:20 PM, Ian Romanick wrote:
>> On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
>>> ---
>>> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 22 ++
>>> 1 file changed, 18 insertions(+), 4 deletions(-)
>>>
>>> d
Reviewed-by: Ian Romanick
In the interest in reducing the number of patches in flight, I think
this could land ahead of the others.
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> ---
> src/mesa/drivers/dri/i965/brw_reg.h | 13 +
> 1 file changed, 5 insertions(+), 8 deletions(-)
On Tue, Oct 18, 2016 at 5:20 PM, Ian Romanick wrote:
> On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
>> ---
>> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 22 ++
>> 1 file changed, 18 insertions(+), 4 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.
Reviewed-by: Ian Romanick
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 24
> 1 file changed, 24 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_ni
Based on my (fairly weak) understanding of vstrides, this patch is
Reviewed-by: Ian Romanick
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> These need to be emitted as align1 MOV's, since they need to have a
> stride of 2 on the float register (whether src or dest) so that data
> from anoth
On 10/18/2016 05:50 PM, Kenneth Graunke wrote:
On Tuesday, October 18, 2016 4:38:17 PM PDT Brian Paul wrote:
Hi Ken,
I found that this patch causes a regression. There's a Windows medical
app which fails to link some shaders since this change.
Basically, when the gl_Position VS input is decla
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 22 ++
> 1 file changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> index
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> Reviewed-by: Francisco Jerez
> ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_
On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote:
> From: Connor Abbott
>
> v2 (Curro):
> - Do not special-case for a bit-size of 64, divide the bit_size by 32
> instead.
> - Use DIV_ROUND_UP so we can handle sub-32-bit types.
> ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 7 --
On 10/11/2016 02:02 AM, Iago Toral Quiroga wrote:
> ARB_gpu_shader_fp64 was the last piece missing. Notice that some
> hardware and kernel combinations do not support pipelined register
> writes, which are required for some OpenGL 4.0 features, in which
> case the driver won't expose 4.0.
> ---
>
On 19 October 2016 at 04:26, Emil Velikov wrote:
> Hi Dave,
>
> Thanks for doing this. It'll be great to get an Ack from the Intel
> devs, on the idea.
>
> Afaics with 22/22 in place you can drop the vk_alloc2/vk_free2
> functions since they are no longer used.
No they are still used in the anv/r
From: Dave Airlie
This copies the allocator callbacks, along with normal
callbacks and physical device into the wsi device.
I'm a bit 50/50 on whether this makes things cleaner so far
---
src/amd/vulkan/radv_wsi.c | 17 +
src/amd/vulkan/radv_wsi_x11.c | 2 --
sr
From: Dave Airlie
As Jason pointed out the app has to pass in the same thing,
so just destroy using the one we copied earlier.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_wsi.c | 2 +-
src/intel/vulkan/anv_wsi.c | 8 +---
src/vulkan/wsi/wsi_common.h | 4
Jason, these should address the comments you made, I'm not sure
these are a win over what was there, but I gave it a go.
If you like them I've no objections.
Dave.
___
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mesa-dev@lists.freedesktop.org
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On Tue, Oct 18, 2016 at 04:24:20PM +0100, Emil Velikov wrote:
> On 18 October 2016 at 00:58, Jonathan Gray wrote:
> > On Mon, Oct 17, 2016 at 05:34:02PM +0100, Emil Velikov wrote:
> >> On 17 October 2016 at 16:39, Eric Engestrom
> >> wrote:
> >> > On Monday, 2016-10-17 22:53:20 +1100, Jonathan G
Christian König wrote:
Am 18.10.2016 um 15:42 schrieb Andy Furniss:
Andy Furniss wrote:
Christian König wrote:
Am 18.10.2016 um 11:19 schrieb Andy Furniss:
boyuan.zh...@amd.com wrote:
From: Boyuan Zhang
cabac is only supported in the h264 main and higher
profiles
So shouldn't there be co
Cc: Samuel Pitoiset
Cc: Kenneth Graunke
---
src/mesa/main/mtypes.h| 5 -
src/mesa/main/shaderapi.c | 1 -
2 files changed, 6 deletions(-)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index ff20226..f4a9edd 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
On Tuesday, October 18, 2016 4:38:17 PM PDT Brian Paul wrote:
> Hi Ken,
>
> I found that this patch causes a regression. There's a Windows medical
> app which fails to link some shaders since this change.
>
> Basically, when the gl_Position VS input is declared as invariant the
> linker fails
On 19 October 2016 at 03:18, Emil Velikov wrote:
> Hi Dave,
>
> On 17 October 2016 at 03:07, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> This moves all the alloc/free in anv to the generic helpers.
>>
>> Signed-off-by: Dave Airlie
>> ---
>> src/intel/vulkan/anv_batch_chain.c| 40
Hi Ken,
I found that this patch causes a regression. There's a Windows medical
app which fails to link some shaders since this change.
Basically, when the gl_Position VS input is declared as invariant the
linker fails with:
error: declarations for uniform `gl_ModelViewProjectionMatrix' hav
On Wednesday, 2016-10-19 00:00:02 +0200, Marek Olšák wrote:
> From: Marek Olšák
Series is:
Reviewed-by: Eric Engestrom
>
> ---
> configure.ac | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/configure.ac b/configure.ac
> index 8e779d4..bc9b732 100644
> --- a/configure.ac
> +++ b
On 10/18/2016 10:12 AM, Jan Ziak wrote:
>> Regarding C++ templates, the compiler doesn't use them. If u_vector
>> (Dave Airlie?) provides the same functionality as your array, I
>> suggest we use u_vector instead.
>
> Let me repeat what you just wrote, because it is unbelievable: You are
> advisin
On 15/10/16 02:54, srol...@vmware.com wrote:
From: Roland Scheidegger
The per-element fetch has quite some calculations which are constant,
these can be moved outside both the per-element as well as the main
shader loop (llvm can figure out it's constant mostly on its own, however
this can have
On 17 October 2016 at 18:09, Nicolai Hähnle wrote:
> On 14.10.2016 05:16, Dave Airlie wrote:
>>
>> From: Dave Airlie
>>
>> This is ported from anv, both anv and radv can share this.
>>
>> Signed-off-by: Dave Airlie
>> ---
>> src/util/Makefile.sources | 4 +-
>> src/util/u_vector.c | 98
>
From: Marek Olšák
---
configure.ac | 37 +++--
1 file changed, 27 insertions(+), 10 deletions(-)
diff --git a/configure.ac b/configure.ac
index 12c8165..17dfafd 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2296,35 +2296,52 @@ dnl Gallium helper functions
dnl
From: Marek Olšák
---
configure.ac | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/configure.ac b/configure.ac
index bc9b732..3431a5d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -948,23 +948,30 @@ AC_ARG_ENABLE([egl],
[enable_egl="$enableval"],
From: Marek Olšák
---
configure.ac | 5 +
1 file changed, 5 insertions(+)
diff --git a/configure.ac b/configure.ac
index 8e779d4..bc9b732 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2860,20 +2860,25 @@ if test "$enable_egl" = yes; then
egl_drivers=""
if test "x$HAVE_EGL_DRIVE
From: Marek Olšák
since GBM is enabled by default, this is also enabled by default
the whitespace changes remove tabs
---
configure.ac | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/configure.ac b/configure.ac
index 3431a5d..12c8165 100644
--- a/configure.ac
+++ b/c
Thanks for the sandy bridge doc link. With all of the extra MBZ removed,
this patch is
Reviewed-by: Jason Ekstrand
On Mon, Oct 17, 2016 at 11:39 AM, Lionel Landwerlin
wrote:
> On Mon, 2016-10-17 at 10:56 -0700, Jason Ekstrand wrote:
> >
> >
> > On Mon, Oct 17, 2016 at 8:46 AM, Lionel Landwerl
On Tue, Oct 18, 2016 at 2:18 PM, Jason Ekstrand
wrote:
>
>
> On Tue, Oct 18, 2016 at 2:06 PM, Timothy Arceri <
> timothy.arc...@collabora.com> wrote:
>
>> On Tue, 2016-10-18 at 08:47 -0700, Jason Ekstrand wrote:
>> > On Mon, Oct 17, 2016 at 11:12 PM, Timothy Arceri > > abora.com> wrote:
>> > > An
On Tue, Oct 18, 2016 at 2:06 PM, Timothy Arceri <
timothy.arc...@collabora.com> wrote:
> On Tue, 2016-10-18 at 08:47 -0700, Jason Ekstrand wrote:
> > On Mon, Oct 17, 2016 at 11:12 PM, Timothy Arceri > abora.com> wrote:
> > > And pass in a pointer to the shader info in gl_program for ARB
> > > pro
Leak introduced by:
a83dce01284f220b1bf932774730e13fca6cdd20
The patch also moves the part to
release changed.vs_const_i and changed.vs_const_b
before the if (!cb.buffer_size) check,
to avoid reuploading every draw call if
integer or boolean constants are dirty, but the shaders
use no constants.
The datastructures to track dirty constants
weren't freed.
Signed-off-by: Axel Davy
---
src/gallium/state_trackers/nine/device9.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/gallium/state_trackers/nine/device9.c
b/src/gallium/state_trackers/nine/device9.c
index
On Tue, 2016-10-18 at 08:47 -0700, Jason Ekstrand wrote:
> On Mon, Oct 17, 2016 at 11:12 PM, Timothy Arceri abora.com> wrote:
> > And pass in a pointer to the shader info in gl_program for ARB
> > programs.
> > ---
> > src/amd/vulkan/radv_meta_blit.c | 12
> > src/amd/v
Quoting Ben Widawsky (2016-10-18 13:50:08)
> I have some OCD...
>
> Signed-off-by: Ben Widawsky
> ---
> include/pci_ids/i965_pci_ids.h | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
> in
On Tue, Oct 18, 2016 at 11:54 AM, Nicolai Hähnle wrote:
> Makes sense as a cleanup. At some point it would make sense to look into
> sharing some stuff with radv instead. There's probably not a huge amount
> because of the NIR/TGSI split, but still.
I'm always for code sharing, but I don't know w
On 19 October 2016 at 06:33, Jason Ekstrand wrote:
> NAKish... I specifically put them in that order to *cause* talos to break.
> If we're going to support both UNORM and sRGB, then applications need to
> look at the formats they're getting and pick one intelligently rather than
> just using the f
We got a couple for products that exist on ark.intel.com, so let's just
put them in now.
Signed-off-by: Ben Widawsky
---
include/pci_ids/i965_pci_ids.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
inde
I have some OCD...
Signed-off-by: Ben Widawsky
---
include/pci_ids/i965_pci_ids.h | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index a93228d..e482007 100644
--- a/include/pci_ids/i965_pci_id
I've dug through the whole thing now. I'm not a fan of patch 21 (re-order
UNORM and sRGB) and gave detailed comments on it. The rest are
Reviewed-by: Jason Ekstrand
My only other real comment is that I think I'd rather we put a bit more
stuff in wsi_device so we're not passing so much around.
NAKish... I specifically put them in that order to *cause* talos to break.
If we're going to support both UNORM and sRGB, then applications need to
look at the formats they're getting and pick one intelligently rather than
just using the first thing they find (which Talos does) especially if that
a
On 18.10.2016 19:23, Ian Romanick wrote:
On 09/29/2016 01:55 PM, Anutex wrote:
I tried to debug this issue with changing the condition to check only bad magic
and Error.
And the test passed.
Though i am not sure what is the correct behaviour if we are in this condition.
May be we should make s
On Sun, Oct 16, 2016 at 9:24 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> ---
> src/intel/vulkan/anv_wsi.c | 28 +++-
> src/intel/vulkan/anv_wsi.h | 3 ++-
> src/intel/vulkan/anv_wsi_wayland.c | 21 +++--
> src/intel/vulkan/anv_wsi_x11.
Feel free to shove an alloc in wsi_device. Might make some of this a bit
simpler. I guess we usually shove one in wsi_implementation so it's not a
big deal.
On Sun, Oct 16, 2016 at 9:24 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> ---
> src/intel/vulkan/anv_wsi.c | 6 +++---
> src/int
https://bugs.freedesktop.org/show_bug.cgi?id=98308
--- Comment #2 from Roland Scheidegger ---
I'd be interested to know though why it fails, I don't think LTO should cause
such failures? Seems like it might be related to the threads created by
llvmpipe but I don't really see how.
--
You are rec
https://bugs.freedesktop.org/show_bug.cgi?id=98308
Marc Dietrich changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
I'd like to see two tiny changes:
1. A comment for the IsPositionInvariant field that it can only be true
for vertex programs.
2. An assertion or two like
assert(p->Target == GL_VERTEX_PROGRAM_ARB ||
!p->IsPositionInvariant);
in reasonable places. I'm thinking:
- Where it
Reviewed-by: Marek Olšák
Marek
On Tue, Oct 18, 2016 at 6:06 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Fixes a regression introduced by commit 777dcf81b.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98307
> --
> Using std::sort here is quite a bit C++-ier than most part
Hi Dave,
Thanks for doing this. It'll be great to get an Ack from the Intel
devs, on the idea.
Afaics with 22/22 in place you can drop the vk_alloc2/vk_free2
functions since they are no longer used.
Just an extra (small) suggestion below:
On 17 October 2016 at 05:24, Dave Airlie wrote:
> del
We already talked on IRC about putting vk_alloc.h in src/util. Assuming
that's done, the series is
Acked-by: Jason Ekstrand
Please make sure you do a fairly complete (fedora config?) build test. I
don't want those MIN/MAX macros to cause problems.
--Jason
On Sun, Oct 16, 2016 at 7:07 PM, Dav
On Tue, Oct 18, 2016 at 8:04 PM, Marek Olšák wrote:
> On Tue, Oct 18, 2016 at 7:12 PM, Jan Ziak <0xe2.0x9a.0...@gmail.com>
> wrote:
> >> Regarding C++ templates, the compiler doesn't use them. If u_vector
> >> (Dave Airlie?) provides the same functionality as your array, I
> >> suggest we use u_v
THANK YOU! I've been wanting to see this happen for a long time.
On Sun, Oct 16, 2016 at 7:07 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> Although the vulkan drivers include mesa macros.h, for
> radv I'd like to move away from that.
>
> Signed-off-by: Dave Airlie
> ---
> src/mesa/main
Perf stat results for shader-db:
This is measured on an AMD Kaveri CPU.
gcc-6.2.0 -fno-omit-frame-pointer -g -O2
Unpatched:
$ cd shader-db
$ ../run-upstream perfstat-u --repeat=5 -- ./run -1 shaders >/dev/null
Performance counter stats for './run -1 shaders' (5 runs):
13689.962374
On 17 October 2016 at 05:24, Dave Airlie wrote:
> diff --git a/src/intel/vulkan/Makefile.sources
> b/src/intel/vulkan/Makefile.sources
> index 85df8a5..bd3afc0 100644
> --- a/src/intel/vulkan/Makefile.sources
> +++ b/src/intel/vulkan/Makefile.sources
> @@ -43,14 +43,17 @@ VULKAN_FILES := \
>
Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Tuesday, October 18, 2016 9:36 AM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee
Subject: [PATCH] svga: minor code improvements in
svga_validate_pipe_sampler_view()
Use the 'texture' local var in
On Tue, Oct 18, 2016 at 7:12 PM, Jan Ziak <0xe2.0x9a.0...@gmail.com> wrote:
>> Regarding C++ templates, the compiler doesn't use them. If u_vector
>> (Dave Airlie?) provides the same functionality as your array, I
>> suggest we use u_vector instead.
>
> Let me repeat what you just wrote, because it
Reviewed-by: Ilia Mirkin
This comes into play with Zcull, I think. But since we don't do Zcull
yet, wtvr. I had a patch to convert it into a
layout(early_fragment_tests) effectively if the various settings
matched, but ultimately it didn't seem worthwhile.
-ilia
On Tue, Oct 18, 2016 at 1:59
Hello Ian,
Since I am working on a direct SPIR-V to NV50 IR translator, ultimately to be
used for OpenCL kernels, I will still need the patch for that work. (I even
wrote that patch because I needed it when handling 64-bit addresses. :-) )
But thanks for the heads-up!
Pierre
On 02:07 pm - Oct 1
Found that information message while replaying a trace from
Metro 2033 Redux. Mark that property as useless for now.
Signed-off-by: Samuel Pitoiset
---
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/nouveau/codege
Reviewed-by: Brian Paul
On 10/18/2016 11:48 AM, Marek Olšák wrote:
From: Marek Olšák
v2: rebased
---
src/mesa/state_tracker/st_atom_blend.c | 3 ++-
src/mesa/state_tracker/st_atom_depth.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_a
From: Marek Olšák
v2: rebased
---
src/mesa/state_tracker/st_atom_blend.c | 3 ++-
src/mesa/state_tracker/st_atom_depth.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom_blend.c
b/src/mesa/state_tracker/st_atom_blend.c
index 76d6a644..b8d65b
On Tue, Oct 18, 2016 at 9:43 AM, Chad Versace wrote:
> Since commit 63c5d5c6c46c8472ee7a8241a0f80f13d79cb8cd, the surfaceless
> platform has allowed creation of pbuffer surfaces. But the vtable entry
> for eglSwapBuffers has remained NULL.
>
> Discovered by running a little pbuffer test.
>
> Cc: G
On Tuesday, October 18, 2016 8:28:02 AM PDT Jason Ekstrand wrote:
> On Tue, Oct 18, 2016 at 8:14 AM, Jason Ekstrand
> wrote:
>
> > I want to make a few comments on how this series is structured. This is
> > not the way I would have done it and I think the way you structured it
> > makes it subst
On 17 October 2016 at 05:24, Dave Airlie wrote:
> From: Dave Airlie
>
> This allows the API and the internals to be split, and the
> internals shared.
> ---
> src/intel/vulkan/anv_wsi_x11.c | 33 -
> 1 file changed, 24 insertions(+), 9 deletions(-)
>
> diff --git
On Tue, Oct 18, 2016 at 8:28 AM, Jason Ekstrand
wrote:
> On Tue, Oct 18, 2016 at 8:14 AM, Jason Ekstrand
> wrote:
>
>> I want to make a few comments on how this series is structured. This is
>> not the way I would have done it and I think the way you structured it
>> makes it substantially less
Typo in the summary - s/uneeded/unneeded/
-Emil
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On 17 October 2016 at 03:07, Dave Airlie wrote:
> From: Dave Airlie
>
> Signed-off-by: Dave Airlie
Seems like a typo from the development stage - anv_wsi_inter_a_face
10 and 11 are independent so feel free to land whenever possible.
Reviewed-by: Emil Velikov
-Emil
On 09/29/2016 01:55 PM, Anutex wrote:
> I tried to debug this issue with changing the condition to check only bad
> magic and Error.
> And the test passed.
>
> Though i am not sure what is the correct behaviour if we are in this
> condition.
> May be we should make some other condition if the H
Hi Dave,
On 17 October 2016 at 03:07, Dave Airlie wrote:
> From: Dave Airlie
>
> This moves all the alloc/free in anv to the generic helpers.
>
> Signed-off-by: Dave Airlie
> ---
> src/intel/vulkan/anv_batch_chain.c| 40 +++---
> src/intel/vulkan/anv_cmd_buffer.c
> Regarding C++ templates, the compiler doesn't use them. If u_vector
> (Dave Airlie?) provides the same functionality as your array, I
> suggest we use u_vector instead.
Let me repeat what you just wrote, because it is unbelievable: You are
advising the use of non-templated collection types in C+
For the series:
Reviewed-by: Marek Olšák
Marek
On Mon, Oct 17, 2016 at 7:25 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Use a full writemask in this case. This is relevant e.g. when a function
> has an inout argument which is an array of structs.
> ---
> src/mesa/state_tracker/st_gl
On 18.10.2016 18:01, Emil Velikov wrote:
On 18 October 2016 at 09:49, Nicolai Hähnle wrote:
On 14.10.2016 20:21, Emil Velikov wrote:
From: Emil Velikov
Currently not everyone has libudev and with follow-up patches we'll
completely remove the divergent codepaths.
Use the libdrm drm device A
Since commit 63c5d5c6c46c8472ee7a8241a0f80f13d79cb8cd, the surfaceless
platform has allowed creation of pbuffer surfaces. But the vtable entry
for eglSwapBuffers has remained NULL.
Discovered by running a little pbuffer test.
Cc: Gurchetan Singh
---
src/egl/drivers/dri2/platform_surfaceless.c |
Use the 'texture' local var in more places.
Rename 'pFormat' to 'viewFormat'.
---
src/gallium/drivers/svga/svga_state_sampler.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_state_sampler.c
b/src/gallium/drivers/svga/svga_state_
1 - 100 of 170 matches
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