[Mesa-dev] [Bug 97260] R9 290 low performance in Linux 4.7

https://bugs.freedesktop.org/show_bug.cgi?id=97260 --- Comment #62 from Michel Dänzer --- (In reply to alvarex from comment #60) > I tried bisecting mesa but I failed sometimes it won't compile sorry I'm not > good with git. Just run "git bisect skip" for commits which don't compile. > Anyway

Re: [Mesa-dev] [PATCH 01/12] isl/gen6: correctly check msaa layout samples count

Reviewed-by: Jason Ekstrand On Tue, Oct 11, 2016 at 10:26 AM, Emil Velikov wrote: > From: Emil Velikov > > Samples == 1 is a valid value, so returning false is plain wrong. > Seeming copy/paste typo introduced since day 1. > > Fixes: afdadec77f5 ("isl: Implement isl_surf_init() for gen4-gen9")

Re: [Mesa-dev] [PATCH] anv: Return correct result in EnumeratePhysicalDevices

Reviewed-by: Jason Ekstrand I'll push it. On Tue, Oct 11, 2016 at 6:08 PM, Nicolas Koch wrote: > It's been a few days. Is anybody willing to push this? > > On Thu, Oct 6, 2016 at 11:25 PM, Anuj Phogat > wrote: > > On Thu, Oct 6, 2016 at 12:21 PM, Nicolas Koch > wrote: > >> If pPhysicalDevice

Re: [Mesa-dev] [PATCH 12/12] aubinator: replace pragma once with ifndef guard

>-Original Message- >From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf Of >Emil Velikov >Sent: Tuesday, October 11, 2016 10:26 AM >To: mesa-dev@lists.freedesktop.org >Cc: emil.l.veli...@gmail.com >Subject: [Mesa-dev] [PATCH 12/12] aubinator: replace pragma once with i

[Mesa-dev] [Bug 97260] R9 290 low performance in Linux 4.7

https://bugs.freedesktop.org/show_bug.cgi?id=97260 --- Comment #61 from Tim Writer --- I'm out of the office, returning Tue Oct 18. I will be checking mail from time to time but responses will be delayed. Regards, Tim -- You are receiving this mail because: You are the assignee for the bug. Yo

[Mesa-dev] [Bug 97260] R9 290 low performance in Linux 4.7

https://bugs.freedesktop.org/show_bug.cgi?id=97260 --- Comment #60 from alvarex --- I ve been following this up on phoronix and with different builds of mesa. Recently it was fixed on mesa for amdgpu but not for radeon (there was an article on phoronix about that) but as from oct 11th is broken a

[Mesa-dev] [PATCH] draw: improve vertex fetch

From: Roland Scheidegger The per-element fetch has quite some calculations which are constant, these can be moved outside both the per-element as well as the main shader loop (llvm can figure out it's constant mostly on its own, however this can have a significant compile time cost). Similarly, i

Re: [Mesa-dev] [PATCH] draw: initialize shader inputs

Am 12.10.2016 um 02:21 schrieb Kenneth Graunke: > On Wednesday, October 12, 2016 12:04:34 AM PDT srol...@vmware.com wrote: >> From: Roland Scheidegger >> >> This should make the code more robust if a shader tries to use inputs which >> aren't defined by the vertex element layout (which usually sho

Re: [Mesa-dev] [PATCH] gallium: add missing zero-init for resource templates

Am 07.10.2016 um 19:08 schrieb Rob Clark: > so, btw, the question is whether to push this patch, or the one that > initializes ->next to NULL in the drivers, or possibly both for good > measure. Yes, why not do both. It makes it explicit that this magic next pointer isn't going to do anything with

[Mesa-dev] [PATCH 4/8] vbo: simplify some code in check_draw_elements_data()

Use the 'vao' local var in more places. --- src/mesa/vbo/vbo_exec_array.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c index 1425e0b..dc1ef76 100644 --- a/src/mesa/vbo/vbo_exec_array.c +++ b/src/mesa/vbo/

[Mesa-dev] [PATCH 7/8] mesa: add sanity check assertion in update_array_format

At most, one of the normalized, integer, doubles bools can be true. --- src/mesa/main/varray.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c index 9acd868..0fb 100644 --- a/src/mesa/main/varray.c +++ b/src/mesa/main/varray.c @@ -333,6 +3

[Mesa-dev] [PATCH 6/8] mesa: remove needless cast in update_array()

--- src/mesa/main/varray.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c index 6c41a5c..9acd868 100644 --- a/src/mesa/main/varray.c +++ b/src/mesa/main/varray.c @@ -527,7 +527,7 @@ update_array(struct gl_context *ctx, /* The

[Mesa-dev] [PATCH 8/8] mesa: fix indentation in vertex_attrib_binding()

--- src/mesa/main/varray.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c index 0fb..db821e3 100644 --- a/src/mesa/main/varray.c +++ b/src/mesa/main/varray.c @@ -136,9 +136,9 @@ vertex_attrib_binding(struct gl_context *ct

[Mesa-dev] [PATCH 2/8] mesa: rename gl_vertex_attrib_array::VertexBinding

Rename to gl_vertex_attrib_array::BufferBindingIndex because this field is an index into the array of buffer binding points. This makes some code a little easier to follow since there's also a "VertexBinding" field in gl_vertex_array_object. --- src/mesa/main/api_arrayelt.c | 20 ++--

[Mesa-dev] [PATCH 3/8] mesa: rename gl_vertex_attrib_array gl_array_attributes

The structure contains the attributes of a vertex array. The old name was kind of confusing. --- src/mesa/main/api_arrayelt.c | 8 src/mesa/main/arrayobj.c | 8 src/mesa/main/get.c | 2 +- src/mesa/main/get_hash_params.py | 8 src/mesa/main/

[Mesa-dev] [PATCH 1/8] mesa: rename some vars in arrayobj.c

Use 'vao' instead of 'obj' to be consistent with other code. Plus, add a comment. --- src/mesa/main/arrayobj.c | 55 +++- 1 file changed, 31 insertions(+), 24 deletions(-) diff --git a/src/mesa/main/arrayobj.c b/src/mesa/main/arrayobj.c index 2d3b69c..f

[Mesa-dev] [PATCH 5/8] mesa: simplify update_array() with a vao local var

--- src/mesa/main/varray.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c index 781d763..6c41a5c 100644 --- a/src/mesa/main/varray.c +++ b/src/mesa/main/varray.c @@ -465,6 +465,7 @@ update_array(struct gl_context *

Re: [Mesa-dev] [PATCH 1/2] anv: Fix anv_pipeline_validate_create_info assertions.

Sends reasonable. Rb On Oct 11, 2016 5:17 PM, "Kenneth Graunke" wrote: > Many of these can be "NULL if the pipeline has rasterization disabled." > Also, we should assert that pMultisampleState exists. > > Signed-off-by: Kenneth Graunke > --- > src/intel/vulkan/anv_pipeline.c | 16 +

Re: [Mesa-dev] [PATCH 2/2] anv: Allow vp_info to be NULL in 3DSTATE_CLIP code.

Rb On Oct 11, 2016 5:17 PM, "Kenneth Graunke" wrote: > pViewportState may be NULL if rasterization is disabled. > > Signed-off-by: Kenneth Graunke > --- > src/intel/vulkan/genX_pipeline_util.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/intel/vulkan/genX_pipeli

[Mesa-dev] [PATCH] mesa: replace gl_framebuffer::_IntegerColor wih _IntegerBuffers

Use a bitmask to indicate which color buffers are integer-valued, rather than a bool. Also, the old field was mis-computed. If an integer buffer was followed by a non-integer buffer, the _IntegerColor field was wrongly set to false. This fixes the new piglit gl-3.1-mixed-int-float-fbo test. ---

[Mesa-dev] [PATCH] mesa: remove 'params' parameter from ctx->Driver.TexParameter()

None of the drivers which implement this hook do anything with the texture parameter value. Drivers just look at the pname and set a dirty flag if needed. We were doing some ugly casting and type conversion to setup the argument so that all goes away. --- src/mesa/drivers/dri/nouveau/nouveau_sta

Re: [Mesa-dev] [PATCH 16/22] anv/hiz: Perform HiZ resolves for all partial renders

On Tue, Oct 11, 2016 at 6:16 PM, Nanley Chery wrote: > On Mon, Oct 10, 2016 at 06:00:49PM -0700, Jason Ekstrand wrote: > > On Mon, Oct 10, 2016 at 2:23 PM, Nanley Chery > wrote: > > > > > On Fri, Oct 07, 2016 at 09:41:14PM -0700, Jason Ekstrand wrote: > > > > If we don't, we can end up with corr

Re: [Mesa-dev] [PATCH 16/22] anv/hiz: Perform HiZ resolves for all partial renders

On Mon, Oct 10, 2016 at 06:00:49PM -0700, Jason Ekstrand wrote: > On Mon, Oct 10, 2016 at 2:23 PM, Nanley Chery wrote: > > > On Fri, Oct 07, 2016 at 09:41:14PM -0700, Jason Ekstrand wrote: > > > If we don't, we can end up with corruption in the portion of the depth > > > buffer that lies outside

Re: [Mesa-dev] [PATCH] anv: Return correct result in EnumeratePhysicalDevices

It's been a few days. Is anybody willing to push this? On Thu, Oct 6, 2016 at 11:25 PM, Anuj Phogat wrote: > On Thu, Oct 6, 2016 at 12:21 PM, Nicolas Koch wrote: >> If pPhysicalDevices is too small for all physical devices, >> the driver must return VK_INCOMPLETE. >> Since only a single physical

Re: [Mesa-dev] [PATCH 2/2] [RFC] radv: add scratch support for spilling.

Why does the IR need access to the scratch pointer at all? I don't understand what problems the explicit IR argument is supposed to solve or why an intrinsic would be needed. The value is only needed for lowering the access to scratch, the user program shouldn't need to be aware it exists O

[Mesa-dev] [PATCH] nv50/ir: copy over value's register id when resolving merge of a phi

The offset needs to be properly copied over to the phi value, otherwise it will get assigned to the base of the merge instead of the proper location. Signed-off-by: Ilia Mirkin Cc: mesa-sta...@lists.freedesktop.org --- src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 4 +++- 1 file changed,

Re: [Mesa-dev] [PATCH] draw: initialize shader inputs

On Wednesday, October 12, 2016 12:04:34 AM PDT srol...@vmware.com wrote: > From: Roland Scheidegger > > This should make the code more robust if a shader tries to use inputs which > aren't defined by the vertex element layout (which usually shouldn't happen). > > No piglit change. > --- > src/g

[Mesa-dev] [PATCH] radv: fix identity swizzle handling

From: Dave Airlie The identity swizzle should operate exactly like an .r = R, .g = G, .b = B, .a = A swizzle. This fixes a bunch of the 16-bit BGRA blit tests dEQP-VK.api.copy_and_blit.blit_image.all_formats.b4g4r4a4* Signed-off-by: Dave Airlie --- src/amd/vulkan/vk_format.h | 18 ++--

[Mesa-dev] [PATCH 2/2] anv: Allow vp_info to be NULL in 3DSTATE_CLIP code.

pViewportState may be NULL if rasterization is disabled. Signed-off-by: Kenneth Graunke --- src/intel/vulkan/genX_pipeline_util.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/genX_pipeline_util.h b/src/intel/vulkan/genX_pipeline_util.h index 0ff92f1..b514

[Mesa-dev] [PATCH 1/2] anv: Fix anv_pipeline_validate_create_info assertions.

Many of these can be "NULL if the pipeline has rasterization disabled." Also, we should assert that pMultisampleState exists. Signed-off-by: Kenneth Graunke --- src/intel/vulkan/anv_pipeline.c | 16 +--- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/src/intel/vulkan/a

Re: [Mesa-dev] [PATCH 2/2] [RFC] radv: add scratch support for spilling.

On Tue, Oct 11, 2016 at 03:21:24PM +0200, Nicolai Hähnle wrote: > On 11.10.2016 07:36, Dave Airlie wrote: > > On 11 October 2016 at 12:13, Dave Airlie wrote: > >> On 11 October 2016 at 11:42, Dave Airlie wrote: > >>> On 11 October 2016 at 05:50, Dave Airlie wrote: > On 10 October 2016 at 21

Re: [Mesa-dev] [PATCH 1/3] radv: add missing unreachable

Series is, Reviewed-by: Edward O'Callaghan On 10/12/2016 09:47 AM, Grigori Goronzy wrote: > --- > src/amd/vulkan/radv_descriptor_set.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/src/amd/vulkan/radv_descriptor_set.c > b/src/amd/vulkan/radv_descriptor_set.c > index d1d2b1f..ba8a002

Re: [Mesa-dev] [PATCH v3 00/25] configure.ac... again!

Am Dienstag, 11. Oktober 2016, 19:05:44 CEST schrieb Ilia Mirkin: > On Tue, Oct 11, 2016 at 7:02 PM, Tobias Droste wrote: > > This series (v3) makes more small changes and after each patch the > > build still works. > > > > After each patch I made sure that these drivers: > > r300,r600,radeonsi,r

Re: [Mesa-dev] [PATCH v3 00/25] configure.ac... again!

On Tue, Oct 11, 2016 at 7:02 PM, Tobias Droste wrote: > This series (v3) makes more small changes and after each patch the > build still works. > > After each patch I made sure that these drivers: > r300,r600,radeonsi,radv,softpipe,llvmpipe Without reading your patches, I think that softpipe shou

[Mesa-dev] [PATCH v3 05/25] configure.ac: Remove useless oCL LLVM check

This is handled by "llvm_check_version_for" a few lines below. Signed-off-by: Tobias Droste --- configure.ac | 4 1 file changed, 4 deletions(-) diff --git a/configure.ac b/configure.ac index dcd59fc..a006558 100644 --- a/configure.ac +++ b/configure.ac @@ -2293,10 +2293,6 @@ if test "x$en

[Mesa-dev] [PATCH v3 25/25] configure.ac: Add required LLVM versions to the top

Consolidate the required LLVM versions at the top where the other versions for dependencies are listed. Rework the LLVM_VERSION and LLVM_VERSION_INT calculation to make the format "x.y.z." possible. LLVM_VERSION_INT is now including LLVM_VERSION_PATCH. For the C define HAVE_LLVM is set now which d

[Mesa-dev] [PATCH v3 17/25] configure.ac: Move radeon_llvm_check to the top

Move the function to the other LLVM related function at the top of the file. No functional change. Signed-off-by: Tobias Droste --- configure.ac | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/configure.ac b/configure.ac index 470a4ec..0b5

[Mesa-dev] [PATCH v3 20/25] configure.ac: Move radv check to the Vulkan section

This moves the LLVM check for radv to the corresponding driver section. No functional change. Signed-off-by: Tobias Droste --- configure.ac | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/configure.ac b/configure.ac index f759a98..23160f2 100644 --- a/configure.ac +++ b/c

[Mesa-dev] [PATCH v3 13/25] configure.ac: Move "--enable-gallium-llvm" check

Since all gallium driver that need LLVM need that check, move it to the version check. Signed-off-by: Tobias Droste --- configure.ac | 15 +-- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/configure.ac b/configure.ac index 61a0253..7b03531 100644 --- a/configure.ac +

[Mesa-dev] [PATCH v3 08/25] configure.ac: Move LLVM version check to the top

A function with the LLVM version checked is moved to the top. The function is called where the old code was. No functional change. Signed-off-by: Tobias Droste --- configure.ac | 91 1 file changed, 49 insertions(+), 42 deletions(-) d

[Mesa-dev] [PATCH v3 23/25] configure.ac: Move LLVM ac_subst closer to usage

No functional change. Signed-off-by: Tobias Droste --- configure.ac | 25 - 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/configure.ac b/configure.ac index 775d70b..26861f5 100644 --- a/configure.ac +++ b/configure.ac @@ -1022,6 +1022,17 @@ radeon_llvm_c

[Mesa-dev] [PATCH v3 11/25] configure.ac: Move oCL LLVM checks to the oCL section

The LLVM checks can be anywhere below line 1000 now. Move the openCL LLVM checks to the section with the other openCL checks. No functional change. Signed-off-by: Tobias Droste --- configure.ac | 42 +++--- 1 file changed, 19 insertions(+), 23 deletions(-) di

[Mesa-dev] [PATCH v3 03/25] configure.ac: Use new llvm_add_default_components

Signed-off-by: Tobias Droste --- configure.ac | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/configure.ac b/configure.ac index 69421ff..e48ed57 100644 --- a/configure.ac +++ b/configure.ac @@ -2282,11 +2282,7 @@ if test "x$enable_gallium_llvm" = xyes || test "x$HAVE_RAD

[Mesa-dev] [PATCH v3 19/25] configure.ac: Reorder arguments in radeon_llvm_check

Use the same order as llvm_check_version_for. Signed-off-by: Tobias Droste --- configure.ac | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/configure.ac b/configure.ac index 9385583..f759a98 100644 --- a/configure.ac +++ b/configure.ac @@ -1007,11 +1007,11 @@ r

[Mesa-dev] [PATCH v3 15/25] configure.ac: Remove swr_llvm_check()

Use the same style for LLVM checks as the other drivers (e.g. r300, llvmpipe) that don't need a load of other checks. No functional change. Signed-off-by: Tobias Droste --- configure.ac | 10 ++ 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/configure.ac b/configure.ac ind

[Mesa-dev] [PATCH v3 21/25] configure.ac: Use new helper function for r600 oCL

Use the new helper function to add the r600 components needed for openCL. Signed-off-by: Tobias Droste --- configure.ac | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 23160f2..449e38d 100644 --- a/configure.ac +++ b/configure.ac @@ -2499,7

[Mesa-dev] [PATCH v3 22/25] configure.ac: Use short names for r600 und r300

There are no non gallium r300 and r600 drivers anymore. No need to explicilty mention gallium here. Just cosmetics, no functional change. Signed-off-by: Tobias Droste --- configure.ac | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/configure.ac b/configure.ac index 449e

[Mesa-dev] [PATCH v3 24/25] configure.ac: Only add default LLVM components if needed

Each driver has to expllicitly call llvm_add_default_components to add the shared components. This way we can fail the build if a component is not found and avoid the recursive solution from a previous version of the pach series. Signed-off-by: Tobias Droste --- configure.ac | 10 ++ 1 f

[Mesa-dev] [PATCH v3 09/25] configure.ac: Move LLVM helpers and pkg-config checks

Move the helpers and needed pkg-config checks to the new LLVM version function. No functional change. Signed-off-by: Tobias Droste --- configure.ac | 183 +-- 1 file changed, 91 insertions(+), 92 deletions(-) diff --git a/configure.ac b/co

[Mesa-dev] [PATCH v3 00/25] configure.ac... again!

This series (v3) makes more small changes and after each patch the build still works. After each patch I made sure that these drivers: r300,r600,radeonsi,radv,softpipe,llvmpipe either build or fail to configure under these conditions: a) LLVM installed and version >= version required --> bui

[Mesa-dev] [PATCH v3 14/25] configure.ac: Remove radeon_gallium_llvm_check()

This function is just calling radeon_llvm_check() with the same parameters. No functional change. Signed-off-by: Tobias Droste --- configure.ac | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/configure.ac b/configure.ac index 7b03531..d9ad56d 100644 --- a/configure.ac

[Mesa-dev] [PATCH v3 04/25] configure.ac: Move oCL checks out of LLVM version check

The openCL checks don't need to be inside the LLVM version check. "llvm_check_version_for" also works if LLVM wasn't found. Signed-off-by: Tobias Droste --- configure.ac | 33 + 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/configure.ac b/configu

[Mesa-dev] [PATCH v3 12/25] configure.ac: Move gallium LLVM checks

There's already a function for gallium LLVM checks. Move the remaining code to this function and call it for every driver that uses LLVM. Signed-off-by: Tobias Droste --- configure.ac | 31 +-- 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/configure.

[Mesa-dev] [PATCH v3 10/25] configure.ac: Unconditionally check LLVM version

Now that no errors are caused by this function, it can be called without any conditions at the top of the file. Signed-off-by: Tobias Droste --- configure.ac | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/configure.ac b/configure.ac index a6208c5..0ebf14c 100644 ---

[Mesa-dev] [PATCH v3 01/25] configure.ac: Don't search llvm-config if it's known

This way LLVM_CONFIG can bet set from an env variable if it's outside the $llvm_prefix. This is not a must, but it helps testing. Signed-off-by: Tobias Droste --- configure.ac | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/configure.ac b/configure.ac index b414ed

[Mesa-dev] [PATCH v3 07/25] configure.ac: Move gallium checks out of LLVM version check

The gallium checks don't need to be inside the LLVM version check. If "enable-gallium-llvm" ist set this is called after the LLVM version check. Signed-off-by: Tobias Droste --- configure.ac | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/configure.ac b/co

[Mesa-dev] [PATCH v3 16/25] configure.ac: Only set --enable_gallium_llvm if it's needed.

Additionally to checking the host, this is now actually checking if it's needed. "--enable-gallium-llvm" is now only needed if at least one driver calls "gallium_require_llvm()". If the flag is set to auto it will default to no now if no driver with "gallium_require_llvm()" is included. If galliu

[Mesa-dev] [PATCH v3 06/25] configure.ac: Use new helper functions for oCL

Signed-off-by: Tobias Droste --- configure.ac | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/configure.ac b/configure.ac index a006558..0e4af6d 100644 --- a/configure.ac +++ b/configure.ac @@ -2298,8 +2298,14 @@ fi if test "x$enable_opencl" = xyes; then llvm_

[Mesa-dev] [PATCH v3 02/25] configure.ac: Add helper function for targets/components

Add functions to add and check targets/components. Not used in this patch. The error message in llvm_add_component is disabled until it doesn't break the build anymore. This is the same functionality as before where the components were added without a check. Signed-off-by: Tobias Droste --- c

[Mesa-dev] [PATCH v3 18/25] configure.ac: Use new helper in radeon_llvm_check

Use new helper functions to add LLVM components and the r600/amdgpu target. Signed-off-by: Tobias Droste --- configure.ac | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/configure.ac b/configure.ac index 0b5c17a..9385583 100644 --- a/configure.ac +++ b/configure.a

[Mesa-dev] [PATCH 1/3] radv: add missing unreachable

--- src/amd/vulkan/radv_descriptor_set.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/vulkan/radv_descriptor_set.c b/src/amd/vulkan/radv_descriptor_set.c index d1d2b1f..ba8a002 100644 --- a/src/amd/vulkan/radv_descriptor_set.c +++ b/src/amd/vulkan/radv_descriptor_set.c @@ -113,6 +1

[Mesa-dev] [PATCH 3/3] radv: fix strict aliasing violation

--- src/amd/vulkan/radv_pipeline_cache.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c index 032a7e4..85a2b6d 100644 --- a/src/amd/vulkan/radv_pipeline_cache.c +++ b/src/amd/vulkan/radv_pipeli

[Mesa-dev] [PATCH 2/3] radv: fix uninitialized variables

This gets rid of "may be used uninitialized" compiler warnings. --- src/amd/vulkan/radv_formats.c | 2 +- src/amd/vulkan/radv_pipeline.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c index 90c140c..76d5fa1 1006

Re: [Mesa-dev] [PATCH 2/2] [RFC] radv: add scratch support for spilling.

On Tue, Oct 11, 2016 at 11:14 PM, Bas Nieuwenhuizen wrote: > On Tue, Oct 11, 2016 at 2:42 AM, Dave Airlie wrote: >> On 11 October 2016 at 05:50, Dave Airlie wrote: >>> On 10 October 2016 at 21:45, Arsenault, Matthew >>> wrote: I don't like adding explicit IR arguments for ABI arguments, es

Re: [Mesa-dev] [PATCH] draw: initialize shader inputs

On 10/11/2016 04:04 PM, srol...@vmware.com wrote: From: Roland Scheidegger This should make the code more robust if a shader tries to use inputs which aren't defined by the vertex element layout (which usually shouldn't happen). No piglit change. --- src/gallium/auxiliary/draw/draw_llvm.c |

[Mesa-dev] [PATCH 1/3] radeonsi: Refactor image store/load intrinsic name creation

--- src/gallium/drivers/radeonsi/si_shader.c | 29 ++--- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 49d4121..8254cb2 100644 --- a/src/gallium/drivers/radeonsi/si_

[Mesa-dev] [PATCH 3/3] radeonsi: Use the new image load/store intrinsic signatures

--- src/gallium/drivers/radeonsi/si_shader.c | 59 +--- 1 file changed, 46 insertions(+), 13 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 4e07317..1f1fdf2 100644 --- a/src/gallium/drivers/radeonsi/

Re: [Mesa-dev] [PATCH 2/2] [RFC] radv: add scratch support for spilling.

On Tue, Oct 11, 2016 at 2:42 AM, Dave Airlie wrote: > On 11 October 2016 at 05:50, Dave Airlie wrote: >> On 10 October 2016 at 21:45, Arsenault, Matthew >> wrote: >>> I don't like adding explicit IR arguments for ABI arguments, especially this >>> one. Adding a special case for the first index f

[Mesa-dev] [PATCH] draw: initialize shader inputs

From: Roland Scheidegger This should make the code more robust if a shader tries to use inputs which aren't defined by the vertex element layout (which usually shouldn't happen). No piglit change. --- src/gallium/auxiliary/draw/draw_llvm.c | 7 +++ 1 file changed, 7 insertions(+) diff --gi

[Mesa-dev] [PATCH 2/3] radeonsi: Add function for converting LLVM type to intrinsic string

The existing function only worked for integer types. --- src/gallium/drivers/radeonsi/si_shader.c | 42 1 file changed, 32 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 8254cb

Re: [Mesa-dev] [PATCH v2] nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c)

On Tue, Oct 11, 2016 at 5:34 PM, Samuel Pitoiset wrote: > > > On 10/11/2016 11:17 PM, Ilia Mirkin wrote: >> >> On Tue, Oct 11, 2016 at 5:01 PM, Samuel Pitoiset >> wrote: >>> >>> total instructions in shared programs :2286901 -> 2284473 (-0.11%) >>> total gprs used in shared programs:335256 ->

Re: [Mesa-dev] [PATCH v2] nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c)

On 10/11/2016 11:17 PM, Ilia Mirkin wrote: On Tue, Oct 11, 2016 at 5:01 PM, Samuel Pitoiset wrote: total instructions in shared programs :2286901 -> 2284473 (-0.11%) total gprs used in shared programs:335256 -> 335273 (0.01%) total local used in shared programs :31968 -> 31968 (0.00%)

Re: [Mesa-dev] [PATCH 02/15] glsl: initialize glsl_struct_field properly

On Saturday, October 8, 2016 12:58:26 PM PDT Marek Olšák wrote: > From: Marek Olšák > > don't rely on ralloc doing memset Hi Marek, Thanks for the patches! I'm just getting back from vacation and at a conference, but I hope to look through these soon. In the meantime: Patches 2-3 are: Review

Re: [Mesa-dev] [PATCH v2] nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c)

On Tue, Oct 11, 2016 at 5:01 PM, Samuel Pitoiset wrote: > total instructions in shared programs :2286901 -> 2284473 (-0.11%) > total gprs used in shared programs:335256 -> 335273 (0.01%) > total local used in shared programs :31968 -> 31968 (0.00%) > > localgpr

[Mesa-dev] [PATCH v2] nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c)

total instructions in shared programs :2286901 -> 2284473 (-0.11%) total gprs used in shared programs:335256 -> 335273 (0.01%) total local used in shared programs :31968 -> 31968 (0.00%) localgpr inst bytes helped 0 41 852

Re: [Mesa-dev] [PATCH 10/22] intel/blorp: Add an entrypoint for clearing depth and stencil

On Tue, Oct 11, 2016 at 11:50 AM, Pohjolainen, Topi < topi.pohjolai...@gmail.com> wrote: > On Tue, Oct 11, 2016 at 09:46:41PM +0300, Pohjolainen, Topi wrote: > > On Fri, Oct 07, 2016 at 09:41:08PM -0700, Jason Ekstrand wrote: > > > Signed-off-by: Jason Ekstrand > > > --- > > > src/intel/blorp/bl

[Mesa-dev] [PATCH 24/26] i965: Disable aux buffers with non-compatible copies

Signed-off-by: Topi Pohjolainen --- src/intel/blorp/blorp.h | 2 ++ src/intel/blorp/blorp_blit.c | 6 ++ src/mesa/drivers/dri/i965/brw_blorp.c | 25 - 3 files changed, 28 insertions(+), 5 deletions(-) diff --git a/src/intel/blorp/blorp.h b/src

[Mesa-dev] [PATCH 12/26] i965: Add plumbing for fast clear layer/level details

Until now fast clear has been supported only for non-layered and non-mipmapped buffers. However, from gen8 onwards there is hardware support also for layered/mipmapped. Once this is enabled, fast clear operations target specific layer/level and call for the state to be tracked in the same granulari

[Mesa-dev] [PATCH 22/26] i965: Add non-msrt mcs array/mipmap alignment restrictions

There are actually two contradicting pieces in the bspec: From the BSpec: 3D-Media-GPGPU Engine - 3D Pipeline Stages - Pixel - Pixel Backend [IVB+] - MCS Buffer for Render Target(s) BDW: Mip-mapped and arrayed surfaces are supported with MCS buffer layout with these alignments in the RT sp

[Mesa-dev] [PATCH 25/26] i965/gen8: Relax asserts prohibiting arrayed/mipmapped fast clears

Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl.c | 3 +-- src/mesa/drivers/dri/i965/brw_blorp.c | 6 +++--- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 23 +-- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 ++- 4 files change

[Mesa-dev] [PATCH 11/26] i965: Add interface for checking multiple slices if any is unresolved

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 + 2 files changed, 13 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c i

[Mesa-dev] [PATCH 23/26] i965: Restructure fast clear eligibility decision

From: Ben Widawsky Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 51 ++- 1 file changed, 34 insertions(+), 17 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index

[Mesa-dev] [PATCH 21/26] i965: Merge qpitch return paths

Upcoming patches need to consider if additional alignment is needed for arrayed/mipmapped and single-sampled mcs buffer. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/src/mesa/drive

[Mesa-dev] [PATCH 26/26] i965: Enable fast clears for multi-lod

From: Ben Widawsky Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 932220e..5769bee 100644

[Mesa-dev] [PATCH 14/26] i965: Move fast clear state enumeration into resolve map

Status is still tracked per miptree. Next patch will switch to resolve map per slice/level. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 58 -- src/mesa/drivers/dri/i965/intel_resolve_map.c | 6 +-- src/mesa/drivers/dri/i965/intel_resol

[Mesa-dev] [PATCH 09/26] i965: Split per miptree and per slice/level fast clear bits

Currently the status bits for fast clear include the flag telling if non-multisampled mcs buffer should be used at all. Once the state tracking is changed to follow individual levels/layers one still needs to have the mcs enabling information in the miptree. Therefore simply split it out to its own

[Mesa-dev] [PATCH 19/26] i965/gen9: Do not use fast clear on compressed mipmapped/arrayed

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 12 1 file changed, 12 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 8782424..d937c5c 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++

[Mesa-dev] [PATCH 18/26] i965: Track fast clear color in level/layer granularity

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 29 --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 28 --- src/mesa/drivers/dri/i965/intel_mipmap_tree.h| 45 +++

[Mesa-dev] [PATCH 20/26] i965: Resolve non-compressed fast clears prior layered rendering

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_draw.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index e387eb9..df342d7 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b

[Mesa-dev] [PATCH 13/26] i965: Refactor check if color resolve is needed

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 43 +-- 1 file changed, 27 insertions(+), 16 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index ee63477..7a2ec69

[Mesa-dev] [PATCH 15/26] i965: Declare read-only input to level/layer check const

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 2ef2d20..8c53fa0 100644 --- a/src/mesa/drivers

[Mesa-dev] [PATCH 06/26] i965: Add new interface for full color resolves

Upcoming patches will introduce fast clear in level/layer granularity like the driver does already for depth/hiz. This patch introduces equivalent full resolve option. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.c| 6 +++--- src/mesa/drivers/dri/i965/intel_

[Mesa-dev] [PATCH 01/26] i965/meta: Split conversion of color and setting it

And fix a mangled comment while at it. Signed-off-by: Topi Pohjolainen CC: Ben Widawsky CC: Jason Ekstrand --- src/mesa/drivers/dri/i965/brw_blorp.c | 7 +++- src/mesa/drivers/dri/i965/brw_meta_util.c | 56 +-- src/mesa/drivers/dri/i965/brw_meta_util.h | 10 +++

[Mesa-dev] [PATCH 17/26] i965: Track fast color clear state in level/layer granularity

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 63 +++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 14 +++--- 2 files changed, 52 insertions(+), 25 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa

[Mesa-dev] [PATCH 16/26] i965: Set initial msaa fast clear status explicitly

instead of in intel_miptree_init_mcs(). For lossless compression the status is immediately overwritten in intel_miptree_alloc_non_msrt_mcs() while the status for non-compressed non-msaa miptrees is explicitly set in do_blorp_clear(). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/

[Mesa-dev] [PATCH 04/26] i965/fbo: Prepare layer multiplier for render buffer compression

This path is not yet taken for fast cleared or compressed buffers but later patches will enable it. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/driv

[Mesa-dev] [PATCH 03/26] intel/blorp: Add plumbing for color resolve slice details

Signed-off-by: Topi Pohjolainen --- src/intel/blorp/blorp.h | 3 ++- src/intel/blorp/blorp_clear.c | 9 +++-- src/mesa/drivers/dri/i965/brw_blorp.c | 2 +- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h i

[Mesa-dev] [PATCH 07/26] i965: Expose physical to logical layer converter

Fast color clear state will be tracked in terms logical layers. Miptrees in turn work internally in terms of physical layers. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 37 --- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 14 +++

[Mesa-dev] [PATCH 10/26] i965: Provide slice details to renderbuffer fast clear state tracker

This patch also introduces getter and setter for fast clear state preparing for tracking the state per slice. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 7 ++-- src/mesa/drivers/dri/i965/brw_draw.c | 12 --- src/mesa/drivers/dri/i965/intel_m

[Mesa-dev] [PATCH 02/26] i965: Add multi-slice getter for resolve maps

This is useful when checking if any slice is in unresolved state. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_resolve_map.c | 13 - src/mesa/drivers/dri/i965/intel_resolve_map.h | 21 +++-- 2 files changed, 27 insertions(+), 7 deletions(-) dif

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