Now that we no longer have meta, all pipelines get created via the normal
Vulkan pipeline creation mechanics. There is no more need for this bit of
extra magic data that we've been passing around.
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_genX.h | 1 -
src/intel/vulkan/a
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/Makefile.sources | 3 -
src/intel/vulkan/anv_device.c | 6 -
src/intel/vulkan/anv_meta.c | 155 -
src/intel/vulkan/anv_meta.h | 69 --
src/intel/vulkan/anv_meta_clear.c | 455 --
This macro was needed by meta in order to make gen-specific calls from
gen-agnostic code. Now that we don't have meta, the remaining two uses are
fairly trivial to get rid of.
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_device.c | 2 +-
src/intel/vulkan/anv_dump.c
In Vulkan, we want to be able to use blorp to perform clears inside of a
render pass. If blorp stomps the depth/stencil buffers packets then we'll
have to re-emit them. This gets tricky when secondary command buffers get
involved. Instead, we'll simply guarantee that the depth and stencil
buffer
Signed-off-by: Jason Ekstrand
---
src/intel/blorp/blorp_genX_exec.h | 42 ++-
1 file changed, 24 insertions(+), 18 deletions(-)
diff --git a/src/intel/blorp/blorp_genX_exec.h
b/src/intel/blorp/blorp_genX_exec.h
index 737194a..1615d42 100644
--- a/src/intel/bl
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_blorp.c | 60
src/intel/vulkan/anv_meta_clear.c | 141 --
2 files changed, 60 insertions(+), 141 deletions(-)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
If we don't, we can end up with corruption in the portion of the depth
buffer that lies outside the render area when we do a HiZ resolve at the
end. The only reason we weren't seeing this before was that all of the
meta-based clears such as VkCmdClearDepthStencilImage were internally using
HiZ so
In order for things such as the ANV_CALL and the ifuncs to work, we used to
have a singleton gen_device_info structure that got assigned the first time
you create a device. Given that the driver will never be used
simultaneously on two different generations of hardware, this was fairly
safe to do.
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_blorp.c | 81 +++
src/intel/vulkan/anv_meta_clear.c | 298 --
2 files changed, 81 insertions(+), 298 deletions(-)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
inde
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_blorp.c | 113 ++
src/intel/vulkan/anv_meta_clear.c | 24
2 files changed, 113 insertions(+), 24 deletions(-)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 5
This should now set the pipeline up properly for doing depth and/or stencil
clears by plumbing through depth/stencil test values.
Signed-off-by: Jason Ekstrand
---
src/intel/blorp/blorp_genX_exec.h | 56 +++
src/intel/blorp/blorp_priv.h | 1 +
2 files ch
Signed-off-by: Jason Ekstrand
---
src/intel/blorp/blorp_genX_exec.h | 27 +++
1 file changed, 15 insertions(+), 12 deletions(-)
diff --git a/src/intel/blorp/blorp_genX_exec.h
b/src/intel/blorp/blorp_genX_exec.h
index 18f93ef..6bbabcf 100644
--- a/src/intel/blorp/blorp_ge
We want to be able to start slow depth clears. This allows us to adjust
the depth we're clearing to.
Signed-off-by: Jason Ekstrand
---
src/intel/blorp/blorp_genX_exec.h | 12 ++--
src/intel/blorp/blorp_priv.h | 1 +
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/sr
Signed-off-by: Jason Ekstrand
---
src/intel/blorp/blorp_genX_exec.h | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/src/intel/blorp/blorp_genX_exec.h
b/src/intel/blorp/blorp_genX_exec.h
index f24b495..0469619 100644
--- a/src/intel/blorp/blorp_genX_e
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_blorp.c | 4 ++--
src/intel/vulkan/anv_dump.c| 3 ++-
src/intel/vulkan/anv_image.c | 37 ++---
src/intel/vulkan/anv_private.h | 4 ++--
src/intel/vulkan/genX_cmd_buffer.c | 4 ++--
5
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/anv_image.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index f125aa6..c407684 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/
Signed-off-by: Jason Ekstrand
---
src/intel/blorp/blorp.h | 10
src/intel/blorp/blorp_clear.c | 58 +++
2 files changed, 68 insertions(+)
diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index 480f1bb..263d194 100644
--- a/src/
When I initially brought up Vulkan blorp, I completely missed that this
was already factored out. There's no good reason for us to hand-roll it.
Signed-off-by: Jason Ekstrand
---
src/intel/vulkan/genX_blorp_exec.c | 39 +-
1 file changed, 1 insertion(+), 38 d
Meta needs to die! As proof, just look at the diffstats below. By
deleting meta clears (that's all we had left), we remove almost as many
lines of code as is in blorp_genX_emit.h!
As with my last Vulkan blorp series, about half of the changes are blorp
changes. Blorp needed to grow just a bit i
While we're here, we also make depth without HiZ work.
Signed-off-by: Jason Ekstrand
---
src/intel/blorp/blorp_genX_exec.h | 101 +-
src/intel/blorp/blorp_priv.h | 1 +
2 files changed, 68 insertions(+), 34 deletions(-)
diff --git a/src/intel/blorp/blo
This gives a slightly smarter way to check whether or not a particular
surface exists than looking at the address.
Signed-off-by: Jason Ekstrand
---
src/intel/blorp/blorp.c | 2 ++
src/intel/blorp/blorp_genX_exec.h | 30 +++---
src/intel/blorp/blorp_priv.h
Signed-off-by: Jason Ekstrand
---
src/intel/genxml/gen6.xml | 1 +
src/intel/genxml/gen7.xml | 1 +
src/intel/genxml/gen75.xml | 1 +
src/intel/genxml/gen8.xml | 1 +
src/intel/genxml/gen9.xml | 1 +
5 files changed, 5 insertions(+)
diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/g
The newly reworked depth/stencil config code can properly handle having
depth, stencil, both, or neither. We no longer need to predicate it on
having depth or stencil.
Signed-off-by: Jason Ekstrand
---
src/intel/blorp/blorp_genX_exec.h | 20 +---
1 file changed, 5 insertions(+),
On Thu, 2016-10-06 at 21:14 -0500, Aaron Watry wrote:
> Thanks for this.
>
> This at least lets me build a 32-bit mesa on 64-bit host again by
> disabling the cache.
>
> Tested-by: Aaron Watry
>
> Tim: Just FYI, I get test failures for 32-bit builds on my x86-64
> host. With this patch, it no l
On Sat, 2016-10-08 at 14:42 +1100, Timothy Arceri wrote:
> Hi Vinson,
>
> This seems reasonable.
>
> Although the problem should already be fixed by f546b41f6ac9b4394
>
> Reviewed-by: Timothy Arceri
>
> Thinking about it some more these are probably not used anywhere
> anymore. Carl's used the
Hi Vinson,
This seems reasonable.
Although the problem should already be fixed by f546b41f6ac9b4394
Reviewed-by: Timothy Arceri
Thinking about it some more these are probably not used anywhere
anymore. Carl's used these in the original patch set I believe I've
updated everything to be wrapped
On Fri, Oct 7, 2016 at 4:45 PM, Nanley Chery wrote:
> On Sun, Sep 25, 2016 at 09:59:02AM -0700, Jason Ekstrand wrote:
> > Signed-off-by: Jason Ekstrand
> > ---
> > src/intel/vulkan/anv_image.c | 16
> > 1 file changed, 12 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/i
From: Ian Romanick
This was found partially by inspection and partially by hitting a
problem while working on nir_op_pack_int64_2x32_split. The code
previously would 'continue' if (instr->src[i].src.is_ssa), but the code
immediately following in the loop treats instr->src[i] as an SSA value.
Si
From: Ian Romanick
Trivial.
Signed-off-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_extensions.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index eef81e2..87c7710
On Sun, Sep 25, 2016 at 09:59:02AM -0700, Jason Ekstrand wrote:
> Signed-off-by: Jason Ekstrand
> ---
> src/intel/vulkan/anv_image.c | 16
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
> index f6e8
Thanks for finishing this off Nicolai!
I have one quick question about this patch below.
On 10/07/2016 01:55 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> ---
> docs/features.txt| 16
> docs/relnotes/12.1.0.html| 2 +-
> src/gal
CC glsl/tests/cache_test.o
glsl/tests/cache_test.c: In function ‘test_cache_create’:
glsl/tests/cache_test.c:160:4: error: implicit declaration of function
‘cache_destroy’ [-Werror=implicit-function-declaration]
cache_destroy(cache);
^
Fixes: 87ab26b2ab35 ("glsl: Add initial funct
From: Nicolai Hähnle
---
docs/features.txt| 16
docs/relnotes/12.1.0.html| 2 +-
src/gallium/drivers/llvmpipe/lp_screen.c | 2 +-
src/gallium/drivers/radeonsi/si_pipe.c | 2 +-
src/gallium/drivers/softpipe/sp_screen.c | 2 +-
src/mes
From: Nicolai Hähnle
Empty writemasks mean "copy everything", so we can always just use the number
of vector elements (which uses the GLSL meaning here, i.e. each double is a
single element/writemask bit).
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 37 --
1 file
From: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index bb88196..3c2870d 100644
--- a/src/mesa
From: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 70 ++
1 file changed, 51 insertions(+), 19 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 47725f2..db8ebdf 100644
--- a/sr
From: Nicolai Hähnle
For specifying an exact location/component.
---
src/gallium/auxiliary/tgsi/tgsi_ureg.c | 46 +++---
src/gallium/auxiliary/tgsi/tgsi_ureg.h | 9 +++
2 files changed, 40 insertions(+), 15 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tg
From: Nicolai Hähnle
In order to be able to emit overlapping input and output array
declarations, we flip the logic of emitting those declarations on its
head: rather than iterating over slots and emitting the corresponding
declarations, we iterate over the declarations from GLSL and emit those.
From: Nicolai Hähnle
---
src/gallium/drivers/radeonsi/si_pipe.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 5a3f101..6e7f6a3 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/sr
Hi everybody,
this series implements the missing piece of ARB_enhanced_layouts, which is
the component numbers part of the extension. You can find the full series
here: https://cgit.freedesktop.org/~nh/mesa/log/?h=ARB_enhanced_layouts
The series follows the approach sketched by Ilia a few months
From: Nicolai Hähnle
This optimization is incorrect with 64-bit operations, because the
channel-splitting logic in emit_asm ends up being applied twice to
the source operands.
A lucky coincidence of how the writemask test works resulted in this
optimization basically never being applied anyway.
From: Nicolai Hähnle
---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index c7745ce..85ab329 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
From: Nicolai Hähnle
---
src/gallium/auxiliary/tgsi/tgsi_ureg.c | 69 +++---
src/gallium/auxiliary/tgsi/tgsi_ureg.h | 21 +++
2 files changed, 77 insertions(+), 13 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
b/src/gallium/auxiliary/tgsi/
From: Nicolai Hähnle
In some cases, a shader may have an input/output array but not use some
entries in the middle. This happens with eON games, for example.
We emit declarations that cover the entire array range even if there are
some unused gaps. This patch now reflects that in the InputsRead
From: Nicolai Hähnle
This is a screen cap because drivers are expected to support it either
for all shader types or for none of them.
---
src/gallium/docs/source/screen.rst | 8
src/gallium/drivers/freedreno/freedreno_screen.c | 1 +
src/gallium/drivers/i915/i915_screen.c
From: Nicolai Hähnle
---
src/compiler/glsl/ir_print_visitor.cpp | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/src/compiler/glsl/ir_print_visitor.cpp
b/src/compiler/glsl/ir_print_visitor.cpp
index fc01be9..c238c16 100644
--- a/src/compiler/glsl/ir_print_visitor.c
On Fri, Oct 7, 2016 at 2:27 AM, Lionel Landwerlin
wrote:
> Embed the xml files into the binary, so aubinator can be used from any
> location.
>
> v2: Split generation packing into another patch (Jason)
> Check for xxd (Jason)
>
> v3: Fix out of tree builds (Jason)
> Generate custom variab
On Fri, Oct 7, 2016 at 9:59 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> I should mentioned that in the commit message, but as far as I can tell,
> looking at the CTS, it doesn't seem to ever set the anisotropy value on the
> sampler to something other than 1.0f.
>
I just did a
On 10/07/2016 12:43 PM, Ian Romanick wrote:
On 10/05/2016 05:42 PM, Brian Paul wrote:
To inform drivers of texture buffer offset/size changes, as we do for
other texture object parameters.
---
src/mesa/main/teximage.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/src/mesa
On 10/05/2016 05:42 PM, Brian Paul wrote:
> To inform drivers of texture buffer offset/size changes, as we do for
> other texture object parameters.
> ---
> src/mesa/main/teximage.c | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git a/src/mesa/main/teximage.c b/src/mesa/main/te
On Thu 06 Oct 2016, Nanley Chery wrote:
> Signed-off-by: Nanley Chery
> Reviewed-by: Jason Ekstrand
> ---
> src/intel/vulkan/TODO | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Chad Versace
Woo! It's done!
___
mesa-dev mailing
On Thu 06 Oct 2016, Jason Ekstrand wrote:
> Nice and clean! R-b still applies.
>
> I think I've reviewed everything now. If there's still something missing, let
> me know. May also want to give Chad a chance.
I agree. Nice and clean.
Reviewed-by: Chad Versace
On Thu 06 Oct 2016, Nanley Chery wrote:
> Create a function that performs one of three HiZ operations -
> depth/stencil clears, HiZ resolve, and depth resolves.
>
> Signed-off-by: Nanley Chery
> Reviewed-by: Jason Ekstrand (v2)
>
> ---
> v3. Change do_hz to emit_hz (Chad)
> Always set XMin
On Thu 06 Oct 2016, Emil Velikov wrote:
> Hi Chad,
>
> On 4 October 2016 at 23:37, Chad Versace wrote:
> > We locked an unitialized mutex in the callstack
> > glClientWaitSync
> > intel_gl_client_wait_sync
> > brw_fence_client_wait_sync
> > because we forgot to initialize it in intel_
Pre-patch, there were two code paths for parsing EGLSync attribute
lists: one path for old-style EGLint lists, used by eglCreateSyncKHR,
and another for new-style EGLAttrib lists, used by eglCreateSync (1.5)
and eglCreateSync64 (EGL_KHR_cl_event2).
There were two attrib_list parsing functions,
_
On 07.10.2016 14:22, Edward O'Callaghan wrote:
Both radeonsi and nvc0 should also support ES also so fixup
doc.
Thanks for catching that.
Reviewed-by: Nicolai Hähnle
Signed-off-by: Edward O'Callaghan
---
docs/features.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 07.10.2016 19:08, Rob Clark wrote:
so, btw, the question is whether to push this patch, or the one that
initializes ->next to NULL in the drivers, or possibly both for good
measure.
memset'ing the templ is probably a sane future-proofing thing to do regardless.
I like my bike-shed in the ca
On Wed 05 Oct 2016, Emil Velikov wrote:
> On 4 October 2016 at 22:31, Chad Versace wrote:
> > On Thu 29 Sep 2016, Emil Velikov wrote:
> >> On 28 September 2016 at 07:28, Chad Versace
> >> wrote:
> >> > Pre-patch, there were two code paths for parsing EGLSync attribute
> >> > lists: one path for
so, btw, the question is whether to push this patch, or the one that
initializes ->next to NULL in the drivers, or possibly both for good
measure.
memset'ing the templ is probably a sane future-proofing thing to do regardless.
BR,
-R
On Fri, Oct 7, 2016 at 12:02 PM, Rob Clark wrote:
> Mostly te
From: Nicolai Hähnle
Not sure if it's possible to avoid programming the block size twice (once for
the userdata and once for the dispatch).
---
docs/features.txt | 2 +-
docs/relnotes/12.1.0.html | 2 +-
src/gallium/drivers/radeon/r600_pipe_commo
I should mentioned that in the commit message, but as far as I can tell,
looking at the CTS, it doesn't seem to ever set the anisotropy value on
the sampler to something other than 1.0f.
I really need to get the details from Mark about the CI...
On 07/10/16 17:52, Jason Ekstrand wrote:
Does
Does this enable more tests? If so, do we pass them?
On Oct 7, 2016 9:50 AM, "Lionel Landwerlin" wrote:
> According to the Vulkan spec 5.63.4 :
>
> samplerAnisotropy indicates whether anisotropic filtering is supported.
> If
> this feature is not enabled, the maxAnisotropy member of the
>
According to the Vulkan spec 5.63.4 :
samplerAnisotropy indicates whether anisotropic filtering is supported. If
this feature is not enabled, the maxAnisotropy member of the
VkSamplerCreateInfo structure must be 1.0.
Since we already set maxAnisotropy to 16 and program the hardware accordin
Thanks! Rb
On Oct 7, 2016 9:22 AM, "Lionel Landwerlin" wrote:
> According to the spec - 9.6. Pipeline Cache :
>
> If pDataSize is less than the maximum size that can be retrieved by the
> pipeline cache, at most pDataSize bytes will be written to pData, and
> vkGetPipelineCacheData will re
According to the spec - 9.6. Pipeline Cache :
If pDataSize is less than the maximum size that can be retrieved by the
pipeline cache, at most pDataSize bytes will be written to pData, and
vkGetPipelineCacheData will return VK_INCOMPLETE.
Fixes the following test from Vulkan CTS :
dEQP-V
Mostly test code, plus one spot I noticed in r600.
Signed-off-by: Rob Clark
---
src/gallium/drivers/radeon/r600_texture.c | 1 +
src/gallium/tests/graw/clear.c| 1 +
src/gallium/tests/graw/fs-test.c | 2 ++
src/gallium/tests/graw/graw_util.h| 2 ++
src/gallium/tests/
From: Nicolai Hähnle
---
src/gallium/drivers/radeonsi/si_pipe.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 2aa679c..66eb2e1 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b
From: Nicolai Hähnle
This can be helpful with R600_DEBUG=preoptir.
---
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
b/src/gallium/drivers/radeon/radeon_setup_tgsi
Hi,
just some random small nice-to-have patches. The first one in
particular is helpful, but not strictly necessary, with enhanced
layouts. Please review!
Thanks,
Nicolai
--
.../drivers/radeon/radeon_setup_tgsi_llvm.c| 12 ++--
src/gallium/drivers/radeonsi/si_pipe.c |
From: Nicolai Hähnle
---
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index 8e364c9..da4a030 100644
--- a/src/
Please memset in state tracker. Most of the other state trackers do
this, although I haven't finished auditing yet.
BR,
-R
On Fri, Oct 7, 2016 at 1:56 AM, Axel Davy wrote:
> Hi,
>
> as of writing, there doesn't seem to be a concensus on the fix.
> Could one be found for Mesa 13 ? Gallium nine i
Am 07.10.2016 um 00:33 schrieb Axel Davy:
> On 06/10/2016 22:28, Ilia Mirkin wrote:
>> On Thu, Oct 6, 2016 at 4:24 PM, Axel Davy wrote:
>>> On 05/10/2016 22:08, Axel Davy wrote:
HRESULT NINE_WINAPI
NineDevice9_ProcessVertices( struct NineDevice9 *This,
On Fri, Oct 07, 2016 at 10:21:34PM +1100, Edward O'Callaghan wrote:
> Signed-off-by: Edward O'Callaghan
I thought we decided `#pragma once` was good enough for most situations
so we weren't going to change them to proper include guards?
Regardless, this is is (marginally) better and looks good t
Both radeonsi and nvc0 should also support ES also so fixup
doc.
Signed-off-by: Edward O'Callaghan
---
docs/features.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/features.txt b/docs/features.txt
index 12f0f25..e91ef6c 100644
--- a/docs/features.txt
+++ b/docs/feat
Signed-off-by: Edward O'Callaghan
---
src/amd/vulkan/radv_cs.h | 6 +-
src/amd/vulkan/radv_descriptor_set.h | 8 ++--
src/amd/vulkan/radv_device_info.h| 6 +-
src/amd/vulkan/radv_meta.h
https://bugs.freedesktop.org/show_bug.cgi?id=98134
--- Comment #2 from Tapani Pälli ---
Created attachment 127094
--> https://bugs.freedesktop.org/attachment.cgi?id=127094&action=edit
fix
This patch fixes the test. These tests fail in CI though:
GL45-CTS.shader_image_size.advanced-nonMS-fs-u
On 07.10.2016 12:10, Timothy Arceri wrote:
Also initialise page at declaration.
Cc: Nicolai Hähnle
Thanks!
Reviewed-by: Nicolai Hähnle
---
src/util/slab.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/util/slab.c b/src/util/slab.c
index cbe4c88..4264814 10
Also initialise page at declaration.
Cc: Nicolai Hähnle
---
src/util/slab.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/util/slab.c b/src/util/slab.c
index cbe4c88..4264814 100644
--- a/src/util/slab.c
+++ b/src/util/slab.c
@@ -174,11 +174,9 @@ void slab_destroy
On Thursday 06 October 2016 16:26:21 Vedran Miletić wrote:
> CLOVER_CL_VERSION_OVERRIDE allows overriding default OpenCL version
> supported by Clover, analogous to MESA_GL_VERSION_OVERRIDE for OpenGL.
> CLOVER_CL_C_VERSION_OVERRIDE allows overridng default OpenCL C version.
Thanks.
I've made some
Embed the xml files into the binary, so aubinator can be used from any
location.
v2: Split generation packing into another patch (Jason)
Check for xxd (Jason)
v3: Fix out of tree builds (Jason)
Generate custom variable name rather than names generated by xxd
(Lionel)
v4: Move generat
On Thursday 06 October 2016 13:20:36 Jan Vesely wrote:
> On Fri, 2014-12-19 at 16:42 +0100, EdB wrote:
> > CL_PROGRAM_BINARY_TYPE have been added to clGetProgramBuildInfo in
> > CL1.2
> > ---
> > src/gallium/state_trackers/clover/api/program.cpp | 4 +++
> > src/gallium/state_trackers/clover/cor
Currently we signal the availabilty of the query result using an
unordered pipe-control write. As it is unordered, it may be executed
before the write of the query result itself - and so an observer may
read the query result too early. Fix this by requesting that the write
of the availablity flag i
If the buffer has been freed by the kernel under memory pressure, it is
invalid to try and access the backing storage for that buffer in the
future - the backing storage is not recreated automatically. As such we
need to mark the GL object as being freed for unretained buffers and so
recreate the o
On 10/07/2016 10:48 AM, Kenneth Graunke wrote:
On Friday, October 7, 2016 8:52:19 AM PDT Tapani Pälli wrote:
Fixes following dEQP tests:
dEQP-GLES31.functional.debug.negative_coverage.callbacks.state.get_synciv
dEQP-GLES31.functional.debug.negative_coverage.get_error.state.get_synciv
I will run piglit with that patch before pushing.
Reviewed-by: Samuel Pitoiset
On 10/06/2016 11:33 PM, Karol Herbst wrote:
total instructions in shared programs : 2818606 -> 2818227 (-0.01%)
total gprs used in shared programs: 379273 -> 379238 (-0.01%)
total local used in shared programs
https://bugs.freedesktop.org/show_bug.cgi?id=98134
--- Comment #1 from Tapani Pälli ---
I think I have a fix for this but will run CI first to see if something blows
up.
--
You are receiving this mail because:
You are the QA Contact for the bug.___
me
On Friday, October 7, 2016 11:05:30 AM PDT Tapani Pälli wrote:
>
> On 10/07/2016 10:46 AM, Kenneth Graunke wrote:
> > On Friday, October 7, 2016 8:52:18 AM PDT Tapani Pälli wrote:
> >> Fixes following dEQP tests:
> >>
> >>
> >> dEQP-GLES31.functional.debug.negative_coverage.callbacks.atomic_co
https://bugs.freedesktop.org/show_bug.cgi?id=98134
Tapani Pälli changed:
What|Removed |Added
Status|NEW |ASSIGNED
Assignee|mesa-dev@list
On 10/07/2016 10:46 AM, Kenneth Graunke wrote:
On Friday, October 7, 2016 8:52:18 AM PDT Tapani Pälli wrote:
Fixes following dEQP tests:
dEQP-GLES31.functional.debug.negative_coverage.callbacks.atomic_counter.atomic_precision
dEQP-GLES31.functional.debug.negative_coverage.get_error.at
On Friday, October 7, 2016 8:52:19 AM PDT Tapani Pälli wrote:
> Fixes following dEQP tests:
>
>dEQP-GLES31.functional.debug.negative_coverage.callbacks.state.get_synciv
>dEQP-GLES31.functional.debug.negative_coverage.get_error.state.get_synciv
>dEQP-GLES31.functional.debug.negative_cov
On Friday, October 7, 2016 8:52:18 AM PDT Tapani Pälli wrote:
> Fixes following dEQP tests:
>
>
> dEQP-GLES31.functional.debug.negative_coverage.callbacks.atomic_counter.atomic_precision
>
> dEQP-GLES31.functional.debug.negative_coverage.get_error.atomic_counter.atomic_precision
>
> dE
91 matches
Mail list logo