Ilia Mirkin writes:
> Sure. Fix it in GCC :) disable the bogus warning, whatever. I really really
> hate pandering to broken tools, sending the message that it's ok for the
> tools to be broken.
While I largely agree with the sentiment, I'm not sure I agree with what
is a "broken tool". If a too
On Fri, Jun 5, 2015 at 10:35 PM, Francisco Jerez wrote:
>> OTOH, at least in OpenCL, this cap wouldn't be used 'raw' as
>> performance hint, since the actual value returned (the
>> PREFERRED_WORK_GROUP_SIZE_MULTIPLE) is a kernel property rather than a
>> device property, so it may be tuned at kern
The only use of lp_profile() is wrapped in #if defined(PROFILE),
so there is no reason to build it unless this macro is defined.
---
src/gallium/auxiliary/gallivm/lp_bld_debug.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp
b/
On 06/05/2015 01:12 PM, Matt Turner wrote:
> On Fri, Jun 5, 2015 at 10:29 AM, Bish, Jim wrote:
>> On 06/04/2015 04:35 PM, Ben Widawsky wrote:
>>> On Wed, Jun 03, 2015 at 05:42:10PM -0700, Matt Turner wrote:
I ran the patch through our Jenkins CI system and while it does fix 26
tests on
On Fri, Jun 5, 2015 at 4:47 PM, Francisco Jerez wrote:
> Matt Turner writes:
>
>> On Thu, Jun 4, 2015 at 9:05 AM, Francisco Jerez
>> wrote:
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs.cpp | 9 ++---
>>> src/mesa/drivers/dri/i965/brw_fs.h | 3 +-
>>> src/mesa/drivers/dri/i9
Matt Turner writes:
> On Thu, Jun 4, 2015 at 9:05 AM, Francisco Jerez wrote:
>> ---
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 9 ++---
>> src/mesa/drivers/dri/i965/brw_fs.h | 3 +-
>> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 57
>> ++--
>> 3 fi
The issue time for an instruction is how many cycles it takes to
actually put it into the pipeline. If there's a pipeline stall that
causes the instruction to be delayed, we should first take that into
account to figure out when the instruction would start executing and
*then* add the issue time. T
Matt Turner writes:
> On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez wrote:
>> ---
>> src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
>> b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
>
Matt Turner writes:
> On Fri, Jun 5, 2015 at 1:42 PM, Francisco Jerez wrote:
>> Matt Turner writes:
>>
>>> On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez
>>> wrote:
The purpose of this change is threefold: First, it improves the
modularity of the compiler back-end by separating the
so, maybe a bit off topic (and maybe doesn't really help with the
whole finding a mentor thing).. but a sort of wish-list thing for
piglit that I've had in the back of my head is something like "tig"
for piglit. I suppose it doesn't have to necessarily be a curses
based UI, it could be gui.. but
On Fri, Jun 5, 2015 at 2:10 PM, Francisco Jerez wrote:
> Matt Turner writes:
>
>> On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez
>> wrote:
>>> Most of these fields affect the behaviour of the instruction so it
>>> could actually break the program if we CSE a pair of otherwise
>>> matching inst
On Fri, Jun 5, 2015 at 1:54 PM, Francisco Jerez wrote:
> Francisco Jerez writes:
>
>> Matt Turner writes:
>>
>>> On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez
>>> wrote:
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 11 +++
src/mesa/drivers/dri/i965/brw_fs.h
On Fri, Jun 5, 2015 at 1:42 PM, Francisco Jerez wrote:
> Matt Turner writes:
>
>> On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez
>> wrote:
>>> The purpose of this change is threefold: First, it improves the
>>> modularity of the compiler back-end by separating the functionality
>>> required to
Just disable the bs warnings. When we're drowning, I might reevaluate my
stance.
On Jun 5, 2015 11:39 PM, "Tobias Klausmann" <
tobias.johannes.klausm...@mni.thm.de> wrote:
> Mh especially GCC 5 seems to be picky about code, if we don't work around
> we soon will only see warnings for every file. E
Matt Turner writes:
> On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez wrote:
>> Most of these fields affect the behaviour of the instruction so it
>> could actually break the program if we CSE a pair of otherwise
>> matching instructions with different values of these fields.
>> ---
>> src/mesa
On Friday, June 05, 2015 10:30:34 AM Ben Widawsky wrote:
> In an ideal world I would just implement this instead of adding the perf
> debug.
> There are some errata involved which lead me to believe it won't be so simple
> as
> flipping a few bits.
>
> There is room to add a thing for Gen9s flex
Francisco Jerez writes:
> Matt Turner writes:
>
>> On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez
>> wrote:
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs.cpp | 11 +++
>>> src/mesa/drivers/dri/i965/brw_fs.h | 2 ++
>>> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |
Matt Turner writes:
> On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez wrote:
>> ---
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 11 +++
>> src/mesa/drivers/dri/i965/brw_fs.h | 2 ++
>> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 +++-
>> 3 files changed, 16 insert
Jordan Justen writes:
> I guess we'll be carrying forward our strained backronym of FS as fast
> scalar? :)
>
Heh, of course :).
> -Jordan
>
> On 2015-06-04 09:04:50, Francisco Jerez wrote:
>> The purpose of this change is threefold: First, it improves the
>> modularity of the compiler back-end
Matt Turner writes:
> On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez wrote:
>> The purpose of this change is threefold: First, it improves the
>> modularity of the compiler back-end by separating the functionality
>> required to construct an i965 IR program from the rest of the visitor
>> god-o
Mh especially GCC 5 seems to be picky about code, if we don't work
around we soon will only see warnings for every file. Even if the
compiler is buggy/to picky we should fix the code to not drown in
warnings... :-)
On 05.06.2015 22:23, Ilia Mirkin wrote:
Sure. Fix it in GCC :) disable the bo
Giuseppe Bilotta writes:
> Hello,
>
> On Fri, Jun 5, 2015 at 2:22 PM, Francisco Jerez wrote:
>> Giuseppe Bilotta writes:
>>>
>>> Ok, scratch that. I was confused by the fact that Beignet reports a
>>> preferred work-group size multiple of 16. Intel IGPs support _logical_
>>> SIMD width of up to
Sure. Fix it in GCC :) disable the bogus warning, whatever. I really really
hate pandering to broken tools, sending the message that it's ok for the
tools to be broken.
On Jun 5, 2015 5:20 PM, "Martin Peres" wrote:
> On 05/06/15 17:12, Ilia Mirkin wrote:
>
>>
>> But if codegen fails, the code is
On Fri, Jun 5, 2015 at 10:29 AM, Bish, Jim wrote:
> On 06/04/2015 04:35 PM, Ben Widawsky wrote:
>> On Wed, Jun 03, 2015 at 05:42:10PM -0700, Matt Turner wrote:
>>> I ran the patch through our Jenkins CI system and while it does fix 26
>>> tests on BDW, it causes an assertion failure in
>>> tests/s
Sounds good in principle. I'm actually surprised this was happening
already. I always use llvmpipe the the non-DRI pure XLIB state tracker
which already does this.
Two comments:
- There's src/gallium/winsys/sw/xlib/xlib_sw_winsys.c which implements
this. I wonder if it would be simpler/clean
I don't think so. The LLVM IR generated by radeonsi is slightly
different from the one generated by r600g. The most code that can be
shared is shared already.
Right now the main problem of the R600 LLVM backend is lack of
features. I think it's approximately at the OpenGL 3.0 or 3.1 level of
suppo
On Fri, Jun 05, 2015 at 11:26:29AM -0700, Ben Widawsky wrote:
> On Fri, Jun 05, 2015 at 03:14:29PM +0100, Chris Wilson wrote:
> > The BLT pitch is specified in bytes for linear surfaces and in dwords
> > for tiled surfaces. In both cases the programmable limit is 32,767, so
> > adjust the check to
On Fri, Jun 05, 2015 at 03:14:29PM +0100, Chris Wilson wrote:
> The BLT pitch is specified in bytes for linear surfaces and in dwords
> for tiled surfaces. In both cases the programmable limit is 32,767, so
> adjust the check to compensate for the effect of tiling.
>
FYI: Here is a patch series I
On Tue, May 26, 2015 at 5:45 PM, Marek Olšák wrote:
> On Wed, May 27, 2015 at 12:39 AM, Jan Vesely
> wrote:
> > On Wed, 2015-05-27 at 00:36 +0200, Marek Olšák wrote:
> >> On Tue, May 26, 2015 at 10:19 PM, Emil Velikov <
> emil.l.veli...@gmail.com> wrote:
> >> > On 26/05/15 14:04, Marek Olšák wro
On Fri, 05 Jun 2015 19:39:31 +0200, Marek Olšák wrote:
I'd like somebody who knows r600/sb to review this. Glenn, can I
bother you please? :)
Marek
On Fri, Jun 5, 2015 at 2:31 PM, Martin Peres
wrote:
Signed-off-by: Martin Peres
---
src/gallium/drivers/r600/sb/sb_sched.cpp | 2 +-
1 file c
From: Marek Olšák
Most of this code could be removed if r600g used tgsi_shader_info.
---
src/gallium/drivers/r600/r600_pipe.c | 2 +-
src/gallium/drivers/r600/r600_shader.c | 174 +
2 files changed, 89 insertions(+), 87 deletions(-)
diff --git a/src/gallium/d
I'd like somebody who knows r600/sb to review this. Glenn, can I
bother you please? :)
Marek
On Fri, Jun 5, 2015 at 2:31 PM, Martin Peres
wrote:
> Signed-off-by: Martin Peres
> ---
> src/gallium/drivers/r600/sb/sb_sched.cpp | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
This is a better fix than mine. It fixes GLES1 on Gallium.
Reviewed-by: Marek Olšák
Marek
On Fri, Jun 5, 2015 at 2:31 PM, Martin Peres
wrote:
> This fixes 2 warnings in gcc 5.1.
>
> Signed-off-by: Martin Peres
> ---
> src/mesa/main/version.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 dele
On 06/03/2015 05:29 PM, Kenneth Graunke wrote:
> On Wednesday, June 03, 2015 11:35:43 PM Bish, Jim wrote:
>> For BDW and newer hardware, vertex shaders can be dispatched
>> using simd8 scalars, but when spills occur performance will
>> be impacted.
>>
>> Fixes spec@glsl-1.10@execution@varying-pac
In an ideal world I would just implement this instead of adding the perf debug.
There are some errata involved which lead me to believe it won't be so simple as
flipping a few bits.
There is room to add a thing for Gen9s flexibility, but since I am actively
working on that I have opted to ignore i
When we cannot do the optimized fast clear it's important to know the buffer
size since a small buffer will have much less performance impact.
A follow-on patch could restrict printing the message to only certain sizes.
Example:
Failed to fast clear 1400x1056 depth because of scissors. Possible
On 06/04/2015 04:35 PM, Ben Widawsky wrote:
> On Wed, Jun 03, 2015 at 05:42:10PM -0700, Matt Turner wrote:
>> On Wed, Jun 3, 2015 at 5:29 PM, Kenneth Graunke
>> wrote:
>>> On Wednesday, June 03, 2015 11:35:43 PM Bish, Jim wrote:
For BDW and newer hardware, vertex shaders can be dispatched
On Fri, Jun 5, 2015 at 5:02 PM, Jan Vesely wrote:
> sorry for the delay, I'm just getting settled.
>
> On Tue, 2015-05-26 at 11:29 +0200, Marek Olšák wrote:
>> The new functions in gallium/radeon shouldn't be inline, because
>> inlining them isn't critical for performance.
>
> should I avoid heade
XPutImage requires to copy the images around, and the request may be
split over several chunks. Using XShm may improve performance.
In particular, the performances are bad when using gnome-shell with
Spice and playing video. Chunking the update confuses the video
detection heuristic: unfortunately
Reviewed-by: Matt Turner
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
sorry for the delay, I'm just getting settled.
On Tue, 2015-05-26 at 11:29 +0200, Marek Olšák wrote:
> The new functions in gallium/radeon shouldn't be inline, because
> inlining them isn't critical for performance.
should I avoid header definitions entirely, or are static (not inline)
functions
On 05/06/15 16:53, Brian Paul wrote:
This is a big patch that touches a lot of files all over the place. I
wonder if it could be broken up a bit. In any case, comments below...
Thanks for the quick review, Brian!
I tried to keep the diff minimal but aside from the empty declarations
and new
Hi,
On 06/05/2015 02:35 AM, Ben Widawsky wrote:
On Wed, Jun 03, 2015 at 05:42:10PM -0700, Matt Turner wrote:
I ran the patch through shader-db, and there were no changes, but
that's because we have no vertex shaders that spill. Until we have
vertex shaders that spill, I don't think figuring out
GL_NV_fragment_program support was removed a while ago. This is just
some clean-up.
---
src/mesa/main/config.h | 13 ++---
src/mesa/main/context.c | 4 ++--
2 files changed, 4 insertions(+), 13 deletions(-)
diff --git a/src/mesa/main/config.h b/src/mesa/main/config.h
index 5a66a4e..9c3
On 05/06/15 17:12, Ilia Mirkin wrote:
But if codegen fails, the code is never displayed as I recall. Again,
this I'd going from memory...
Good memory. It looks ugly though.
In general, I would still want to fix the warning because I hate needing
to revert my patches to check if I introduc
Since the introduction of
commit 536003c11e4cb1172c540932ce3cce06f03bf44e
Author: Boyan Ding
Date: Wed Mar 25 19:36:54 2015 +0800
i965: Add XRGB format to intel_screen_make_configs
winsys buffers no longer have an alpha channel. This causes
_mesa_format_matches_format_and_type() to re
The blitter already has code to accommodate filling in the alpha channel
for BGRX destination formats, so expand this to also allow filling the
alpha channgel in RGBX formats.
More importantly for the next patch is moving the test into its own
function for the purpose of exporting the check to the
The BLT pitch is specified in bytes for linear surfaces and in dwords
for tiled surfaces. In both cases the programmable limit is 32,767, so
adjust the check to compensate for the effect of tiling.
Signed-off-by: Chris Wilson
Cc: Kristian Høgsberg
Cc: Kenneth Graunke
---
src/mesa/drivers/dri/i
But if codegen fails, the code is never displayed as I recall. Again, this
I'd going from memory...
On Jun 5, 2015 4:59 PM, "Martin Peres" wrote:
> On 05/06/15 16:53, Ilia Mirkin wrote:
>
>>
>> My recollection is that gcc's analysis is wrong. I can't look at the code
>> now, but I hate patches th
On 05/06/15 16:53, Ilia Mirkin wrote:
My recollection is that gcc's analysis is wrong. I can't look at the
code now, but I hate patches that appease broken tools. Will take a
look when I can get in front of a proper computer though.
Nope, GCC is not wrong here. nouveau_codegen can fail and,
On 06/05/2015 03:50 PM, Ilia Mirkin wrote:
This scheme is copied from radeon, does it need a similar fix? I'm away
from computers for another week or so, will be able to look then.
For some reason, no. Testing on Radeon multi-x-screen ZaphodHeads never
showed such problems over multiple years
This is a big patch that touches a lot of files all over the place. I
wonder if it could be broken up a bit. In any case, comments below...
On 06/05/2015 07:03 AM, Martin Peres wrote:
This will allow us to share common drirc options across drivers while
making sure some drivers are not left
My recollection is that gcc's analysis is wrong. I can't look at the code
now, but I hate patches that appease broken tools. Will take a look when I
can get in front of a proper computer though.
On Jun 5, 2015 3:32 PM, "Martin Peres" wrote:
> This should prevent any segfault when the codegen fail
This scheme is copied from radeon, does it need a similar fix? I'm away
from computers for another week or so, will be able to look then.
On Jun 5, 2015 4:37 PM, "Mario Kleiner" wrote:
> The dup'ed fd owned by the nouveau_screen for a device node
> must also be used as key for the winsys hash tab
The dup'ed fd owned by the nouveau_screen for a device node
must also be used as key for the winsys hash table, instead
of using the original fd passed in for a screen, to make
multi-x-screen ZaphodHeads configurations work on nouveau.
This prevents the following crash scenario that was observed
w
Series looks good to me.
Reviewed-by: Brian Paul
On 06/05/2015 06:31 AM, Martin Peres wrote:
GCC5 apparently got the ability to remember if the output variables of
a function have been initialized in all the codepathes. The first
two patches fix real issues.
The r600 patch seem to fix a real
Hello,
On Fri, Jun 5, 2015 at 2:22 PM, Francisco Jerez wrote:
> Giuseppe Bilotta writes:
>>
>> Ok, scratch that. I was confused by the fact that Beignet reports a
>> preferred work-group size multiple of 16. Intel IGPs support _logical_
>> SIMD width of up to 32, but the _hardware_ SIMD width is
This has the side effect of enabling this option for all the non-gallium
drivers.
Signed-off-by: Martin Peres
---
src/gallium/include/state_tracker/st_api.h | 1 -
src/gallium/state_trackers/dri/dri_screen.c | 3 ---
src/gallium/state_trackers/osmesa/osmesa.c | 1 -
src/mesa/drivers/dri/common
This will allow us to share common drirc options across drivers while
making sure some drivers are not left behind (current situation).
This changes _mesa_initialize_context to make sure that every driver
sets the shared options either to the default values or the
drirc-provided options.
Signed-o
When both MESA_EXTENSION_OVERRIDE and drirc's mesa_extension_override are
set, the environment variable takes precedence.
We also now perform one_time_init after init_attrib_groups so as the
shared option would be initialized before running the extension
override code.
v2:
- change the name from
This has the side effect of enabling this option for the intel i830,
nouveau_vieux, classic swrast, and the classic radeon drivers.
Signed-off-by: Martin Peres
---
src/gallium/include/state_tracker/st_api.h | 1 -
src/gallium/state_trackers/dri/dri_screen.c | 3 ---
src/gallium/state_trackers/o
It is currently useless but it will be used very soon!
Signed-off-by: Martin Peres
---
src/mesa/drivers/dri/nouveau/Makefile.am | 1 +
src/mesa/drivers/dri/nouveau/nouveau_context.c | 18 ++
2 files changed, 19 insertions(+)
diff --git a/src/mesa/drivers/dri/nouveau/Makef
When both MESA_GL_VERSION_OVERRIDE and drirc's mesa_extension_override are
set, the environment variable takes precedence.
As DRI2 also needs to have this parameter, let's add the option in
dri2's optionCache and read the gl_version_override parameter before
passing it to _mesa_override_gl_version
v2:
- rename mesa_extension-override to extension_override
- improve the comment by telling we disable GL_ARB_gpu_shader5
- fix the name ARB_GL_gpu_shader5 to GL_ARB_gpu_shader5 (Ilia)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82897
Signed-off-by: Martin Peres
---
src/mesa/drivers/d
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80834
Signed-off-by: Martin Peres
---
src/mesa/drivers/dri/common/drirc | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/drivers/dri/common/drirc
b/src/mesa/drivers/dri/common/drirc
index e3dbf0e..7734c21 100644
--- a/src
v2:
- rename mesa_extension-override to extension_override
- improve the comment by telling we disable GL_ARB_gpu_shader5 (Ilia)
- fix the name ARB_GL_gpu_shader5 to GL_ARB_gpu_shader5 (Ilia)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82897
Signed-off-by: Martin Peres
---
src/mesa/dr
The soon-to-be-introduced "extension_override" will potentially
introduce very long strings that should not be truncated.
Signed-off-by: Martin peres
---
src/mesa/drivers/dri/common/xmlconfig.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/common/xmlcon
This has the side effect of enabling this option for the i830, i915,
nouveau_vieux, classic swrast, and the classic radeon drivers.
It also forces the initialisation of
attribs.options.shared_options.AllowGLSLExtensionDirectiveMidShader in
gallium/osmesa.
Signed-off-by: Martin Peres
---
src/gal
This has the side effect of enabling this option for the intel classic
drivers, nouveau_vieux, classic swrast, and the classic radeon drivers.
Signed-off-by: Martin Peres
---
src/gallium/include/state_tracker/st_api.h | 1 -
src/gallium/state_trackers/dri/dri_screen.c | 3 ---
src/gallium/state
This has the side effect of enabling this option for the intel i830,
nouveau_vieux, classic swrast, and the classic radeon drivers.
Signed-off-by: Martin Peres
---
src/gallium/include/state_tracker/st_api.h | 1 -
src/gallium/state_trackers/dri/dri_screen.c | 3 ---
src/gallium/state_trackers/o
This has the side effect of enabling this option for i830,
nouveau_vieux, classic swrast, and the classic radeon drivers.
Signed-off-by: Martin Peres
---
src/gallium/include/state_tracker/st_api.h | 1 -
src/gallium/state_trackers/dri/dri_screen.c | 3 ---
src/gallium/state_trackers/osmesa/osme
Signed-off-by: Martin Peres
---
src/gallium/state_trackers/dri/dri_screen.c| 7 +++
src/mesa/drivers/dri/common/xmlpool.h | 12
src/mesa/drivers/dri/i915/intel_screen.c | 7 +++
src/mesa/drivers/dri/i965/intel_screen.c | 7 +++
src/mesa/drivers
It is currently useless but it will be used very soon!
Signed-off-by: Martin Peres
---
src/mesa/drivers/dri/swrast/swrast.c | 16
1 file changed, 16 insertions(+)
diff --git a/src/mesa/drivers/dri/swrast/swrast.c
b/src/mesa/drivers/dri/swrast/swrast.c
index 2d4bb70..1522636 10
Right now, adding a new drirc parameter is painful because it involves
adding a new entry in the gl constant structure, making sure that the
field is set to the right value by default in osmesa drivers, adding
the parameter in every driver's drirc xml and then reading the value
at runtime to set it
This patch is:
Reviewed-by: Samuel Pitoiset
On 06/05/2015 02:31 PM, Martin Peres wrote:
This should prevent any segfault when the codegen fails.
Signed-off-by: Martin Peres
---
src/gallium/drivers/nouveau/nouveau_compiler.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Signed-off-by: Martin Peres
---
src/gallium/drivers/r600/sb/sb_sched.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/sb/sb_sched.cpp
b/src/gallium/drivers/r600/sb/sb_sched.cpp
index 2e38a62..6268078 100644
--- a/src/gallium/drivers/r600/sb/sb_sche
This should prevent any segfault when the codegen fails.
Signed-off-by: Martin Peres
---
src/gallium/drivers/nouveau/nouveau_compiler.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/nouveau_compiler.c
b/src/gallium/drivers/nouveau/nouveau_compil
This makes GCC5 happy.
Signed-off-by: Martin Peres
---
src/gallium/drivers/softpipe/sp_query.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/softpipe/sp_query.c
b/src/gallium/drivers/softpipe/sp_query.c
index e773870..76105b4 100644
--- a/src/gallium/dr
This fixes 2 warnings in gcc 5.1.
Signed-off-by: Martin Peres
---
src/mesa/main/version.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/main/version.c b/src/mesa/main/version.c
index 409e5ae..60c7604 100644
--- a/src/mesa/main/version.c
+++ b/src/mesa/main/versio
GCC5 apparently got the ability to remember if the output variables of
a function have been initialized in all the codepathes. The first
two patches fix real issues.
The r600 patch seem to fix a real issue, but I have not spent too long
looking at the code.
GCC5 also became more annoying around l
Giuseppe Bilotta writes:
>> On Thu, May 28, 2015 at 1:04 PM, Grigori Goronzy wrote:
>>> @@ -286,6 +287,13 @@ ilo_get_compute_param(struct pipe_screen *screen,
>>>ptr = &val.images_supported;
>>>size = sizeof(val.images_supported);
>>>break;
>>> + case PIPE_COMPUTE_CAP_S
On 06/03/2015 02:10 PM, Emil Velikov wrote:
Hi Tapani,
On 19 May 2015 at 13:01, Tapani Pälli wrote:
Dynamic indexing of sampler arrays is prohibited by GLSL ES 3.00.
Earlier versions allow 'constant-index-expression' indexing, where
index can contain a loop induction variable.
Patch allows
2015-06-01 12:15 GMT+02:00 Eero Tamminen :
> Hi,
>
> On 05/29/2015 07:04 PM, Connor Abbott wrote:
>>
>> On Fri, May 29, 2015 at 6:23 AM, Eero Tamminen
>> wrote:
>>>
>>> On 05/28/2015 10:19 PM, Thomas Helland wrote:
One more thing;
Is there a limit where the loop body gets so la
> On Thu, May 28, 2015 at 1:04 PM, Grigori Goronzy wrote:
>> @@ -286,6 +287,13 @@ ilo_get_compute_param(struct pipe_screen *screen,
>>ptr = &val.images_supported;
>>size = sizeof(val.images_supported);
>>break;
>> + case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
>> + /* best c
On 2015-06-05 00:11:11, Iago Toral wrote:
> On Thu, 2015-06-04 at 00:12 -0700, Jordan Justen wrote:
> > On 2015-06-03 00:00:52, Iago Toral Quiroga wrote:
> > > From: Kristian Høgsberg
> (...)
> > > diff --git a/src/glsl/ir.h b/src/glsl/ir.h
> > > index fab1cd2..dd10298 100644
> > > --- a/src/glsl/
Hello,
On Thu, May 28, 2015 at 1:04 PM, Grigori Goronzy wrote:
> @@ -286,6 +287,13 @@ ilo_get_compute_param(struct pipe_screen *screen,
>ptr = &val.images_supported;
>size = sizeof(val.images_supported);
>break;
> + case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
> + /* best c
On Thu, 2015-06-04 at 00:12 -0700, Jordan Justen wrote:
> On 2015-06-03 00:00:52, Iago Toral Quiroga wrote:
> > From: Kristian Høgsberg
(...)
> > diff --git a/src/glsl/ir.h b/src/glsl/ir.h
> > index fab1cd2..dd10298 100644
> > --- a/src/glsl/ir.h
> > +++ b/src/glsl/ir.h
> > @@ -323,6 +323,7 @@ pro
87 matches
Mail list logo
