[Mesa-dev] [PATCH 2/4] radeon: Make use of _mesa_get_viewport_xform.

From: Mathias Froehlich Instead of _WindowMap just use the translation and scale of the viewport transform directly. Thereby avoid dividing by _DepthMaxF again. Signed-off-by: Mathias Froehlich --- src/mesa/drivers/dri/r200/r200_state.c | 17 + src/mesa/drivers/dri/radeon/r

[Mesa-dev] [PATCH 0/4] Cleanup viewport handling past clip control.

From: Mathias Froehlich Hi, The series cleans up viewport handling a bit. Make use of the utility functions provided with the clip control implementation in the drivers. Move the _WindowMap matrix into the TNL state which is the only remaining user of that matrix and simplify gl_viewport_attrib

[Mesa-dev] [PATCH 3/4] tnl: Maintain the _WindowMap matrix in TNLcontext.

From: Mathias Froehlich This is the only real user of _WindowMap which has the depth buffer scaling multiplied in. Maintain the _WindowMap of the one and only viewport inside TNLcontext. Signed-off-by: Mathias Froehlich --- src/mesa/swrast_setup/ss_context.c | 5 +++-- src/mesa/tnl/t_context.

[Mesa-dev] [PATCH 4/4] mesa: Remove the _WindowMap from gl_viewport_attrib.

From: Mathias Froehlich The _WindowMap can be dropped from gl_viewport_attrib now. Simplify gl_viewport_attrib handling where possible. Signed-off-by: Mathias Froehlich --- src/mesa/main/context.c | 12 ++-- src/mesa/main/mtypes.h | 1 - src/mesa/main/state.c| 25 --

[Mesa-dev] [PATCH 1/4] i965: Make use of _mesa_get_viewport_xform.

From: Mathias Froehlich Instead of _WindowMap just use the translation and scale of the viewport transform directly. Thereby avoid dividing by _DepthMaxF again. Signed-off-by: Mathias Froehlich --- src/mesa/drivers/dri/i965/brw_sf_state.c| 17 + src/mesa/drivers/dri/i96

[Mesa-dev] [PATCH] i965: Implement support for ARB_clip_control.

From: Mathias Fröhlich Hi, The patch aims to implement ARB_clip_control on intel chips. I hope to have found all places to cover all supported chipsets. I have done some limited testing on an Ivybridge Mobile and a GM45 Express chipset. Please review. Thanks Mathias Switch between the two cli

[Mesa-dev] [PATCH] gallivm: Fix build against LLVM 3.7 SVN r233648

From: Michel Dänzer Signed-off-by: Michel Dänzer --- src/gallium/auxiliary/gallivm/lp_bld_debug.cpp | 5 + 1 file changed, 5 insertions(+) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp b/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp index d4d453d..65d2896 100644 --- a/src/g

[Mesa-dev] [PATCH] r600g: fix op3 abs issue

From: Dave Airlie This code to handle absolute values on op3 srcs was a bit too simple, it really needs a temp reg per src, not one per channel, make it easier and let sb clean up the mess. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89831 Signed-off-by: Dave Airlie --- src/gallium

Re: [Mesa-dev] [PATCH] radeonsi: Cache LLVMTargetMachineRef in context instead of in screen

On 30.03.2015 22:28, Emil Velikov wrote: > On 27 March 2015 at 01:05, Michel Dänzer wrote: >> From: Michel Dänzer >> >> Fixes a crash in genymotion with several threads compiling shaders >> concurrently. >> >> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89746 >> >> Cc: 10.5 >> Signed-

Re: [Mesa-dev] [PATCH 05/23] main: Add entry point for CreateBuffers.

On Wed, Feb 11, 2015 at 9:05 PM, Laura Ekstrand wrote: > for (i = 0; i < n; i++) { > - _mesa_HashInsert(ctx->Shared->BufferObjects, first + i, > - &DummyBufferObject); > - buffer[i] = first + i; > + buffers[i] = first + i; > + if (dsa) { > + AS

Re: [Mesa-dev] [PATCH 1/2] mesa: Implement _mesa_flsll().

Both are Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] nir: In prog->nir, don't wrap dot products with ptn_channel(..., X).

Kenneth Graunke writes: > ptn_move_dest and nir_fadd already take care of replicating the last > channel out, so we can just use a scalar and skip splatting it. > > Signed-off-by: Kenneth Graunke Reviewed-by: Eric Anholt signature.asc Description: PGP signature __

[Mesa-dev] [PATCH 2/2] nir: Use _mesa_flsll(InputsRead) in prog->nir.

InputsRead is a 64-bit bitfield. Using _mesa_fls would silently truncate off the high bits, claiming inputs 32..56 (VARYING_SLOT_MAX) were never read. Using <= here was a hack I threw in at the last minute to fix programs which happened to use input slot 32. Switch back to using < now that the u

[Mesa-dev] [PATCH 1/2] mesa: Implement _mesa_flsll().

This is _mesa_fls() for 64-bit values. Signed-off-by: Kenneth Graunke --- src/mesa/main/imports.h | 24 1 file changed, 24 insertions(+) diff --git a/src/mesa/main/imports.h b/src/mesa/main/imports.h index 29f2499..c4d917e 100644 --- a/src/mesa/main/imports.h +++ b/src/

[Mesa-dev] [PATCH] nir: In prog->nir, don't wrap dot products with ptn_channel(..., X).

ptn_move_dest and nir_fadd already take care of replicating the last channel out, so we can just use a scalar and skip splatting it. Signed-off-by: Kenneth Graunke --- src/mesa/program/prog_to_nir.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mesa/program/prog

[Mesa-dev] [PATCH V2 21/23] i965/gen9: Use blitter as fallback path to read write YF/YS surfaces

V2: Make relevant changes in intelTexSubImage(). Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 7 --- src/mesa/drivers/dri/i965/intel_tex_image.c| 15 --- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 7 --- 3 files changed, 29 delet

[Mesa-dev] [PATCH 16.5/23] i965/skl: Use _mesa_meta_pbo_TexSubImage to upload subimage data to YF/YS tiled textures

No other path currently supports uploading data to these surfaces. Fixes the incorrect rendering in miplevels > 0 with YF/YS tiling. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 23 +-- 1 file changed, 21 insertions(+), 2 deletions(-) diff

Re: [Mesa-dev] [PATCH 1/3] util: Change hash_table to use quadratic probing

Thomas Helland writes: > This should give better cache locality, less memory consumption, > less code, and should also be faster since we avoid a modulo operation. > Also change table size to be power of two. > This gives better performance as we can do bitmasking instead of > modulo operations f

[Mesa-dev] [Bug 89823] [swrast] driver loads but complains then fails to work in Piglit which shows GLSL message

https://bugs.freedesktop.org/show_bug.cgi?id=89823 --- Comment #3 from Dan Sebald --- [@ mesa]$ LIBGL_DEBUG=verbose glxinfo | grep direct libGL: OpenDriver: trying /usr/lib64/dri/nouveau_dri.so libGL error: dlopen /usr/lib64/dri/nouveau_dri.so failed (/usr/lib64/dri/nouveau_dri.so: cannot open sh

Re: [Mesa-dev] [PATCH 00/23] i965/skl: Add YF/YS tiling support

On Mon, Mar 30, 2015 at 2:42 PM, Matt Turner wrote: > On Mon, Mar 30, 2015 at 2:04 PM, Anuj Phogat wrote: >> This series enables skl+ to read/write data to YF/YF tiled >> surfaces. Many piglit tests for texture/buffer data read/write >> pass with the new tiling formats. I'm currently debugging an

Re: [Mesa-dev] [PATCH 1/3 v2] mesa: Make a shared header for 3D pipeline enum / #defines.

On 03/30/2015 03:46 PM, Eric Anholt wrote: Kenneth Graunke writes: On Monday, March 30, 2015 11:44:19 AM Eric Anholt wrote: Brian Paul writes: On 03/30/2015 10:49 AM, Eric Anholt wrote: NIR uses these enums/#defines in nir_variables and associated intrinsics, but I want to be able to use

Re: [Mesa-dev] [PATCH 1/3 v2] mesa: Make a shared header for 3D pipeline enum / #defines.

Kenneth Graunke writes: > On Monday, March 30, 2015 11:44:19 AM Eric Anholt wrote: >> Brian Paul writes: >> >> > On 03/30/2015 10:49 AM, Eric Anholt wrote: >> >> NIR uses these enums/#defines in nir_variables and associated intrinsics, >> >> but I want to be able to use them from TGSI->NIR and

Re: [Mesa-dev] [PATCH 00/23] i965/skl: Add YF/YS tiling support

On Mon, Mar 30, 2015 at 2:04 PM, Anuj Phogat wrote: > This series enables skl+ to read/write data to YF/YF tiled > surfaces. Many piglit tests for texture/buffer data read/write > pass with the new tiling formats. I'm currently debugging an > issue about incorrect data getting uploaded to miplevel

[Mesa-dev] [Bug 89823] [swrast] driver loads but complains then fails to work in Piglit which shows GLSL message

https://bugs.freedesktop.org/show_bug.cgi?id=89823 --- Comment #2 from Timothy Arceri --- Looks like no driver is loaded. Try using LIBGL_DEBUG=verbose it should tell you where your system is looking to load them from. For example: $ LIBGL_DEBUG=verbose glxinfo | grep direct -- You are receiv

Re: [Mesa-dev] [PATCH v2 06/15] st/mesa: implement GL_AMD_performance_monitor

You can add a flag to each driver query identifying what kind of query it is (a hw perf counter or a CPU-only query). Then you can enumerate all queries and see if there's at least one perf counter and if so, advertise the extension. Or add a CAP and let drivers decide if they want the extension o

[Mesa-dev] [PATCH 12/23] i965/gen9: Set tiled resource mode in surface state

From: Anuj phogat This patch sets the tiled resource mode for texture and renderbuffer surfaces. Signed-off-by: Anuj phogat --- src/mesa/drivers/dri/i965/brw_defines.h| 8 src/mesa/drivers/dri/i965/gen8_surface_state.c | 22 ++ 2 files changed, 30 insertio

[Mesa-dev] [PATCH 07/23] i965/gen9: Handle YF/YS tiling in intel_miptree_create()

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index fac7b8e..ef6ff11 100644 --- a/src/mesa/drive

[Mesa-dev] [PATCH 14/23] i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*

Makes no functional changes in the code. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.

[Mesa-dev] [PATCH 06/23] i965/gen9: Set tiled resource mode for the miptree

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c| 2 ++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 ++ 2 files changed, 8 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 499c2dc..eab

[Mesa-dev] [PATCH 16/23] i965/gen9: Use _mesa_meta_pbo_TexSubImage to upload data to YF/YS tiled surfaces

No other path currently supports uploading data to these surfaces. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_tex_image.c | 24 ++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/driv

[Mesa-dev] [PATCH 17/23] i965/gen9: Use _mesa_meta_pbo_GetTexSubImage() to read YF/YS tiled buffers

Currently, that's the only path that supports reading data from these buffers. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 22 -- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/s

[Mesa-dev] [PATCH 15/23] i965/gen9: Set vertical and horizontal surface alignments

From: Anuj phogat Patch sets the alignments for texture and renderbuffer surfaces. Signed-off-by: Anuj phogat --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 28 ++ 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surfac

[Mesa-dev] [PATCH 11/23] i965/gen9: Handle YF/YS tiling cases in surface state

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 7f82f53..97f9422 100644 --- a/src/mesa/drivers/dri/i965/gen8_s

[Mesa-dev] [PATCH 23/23] i965/gen9: Disable Mip Tail for YF/YS tiled surfaces

This fixed the buffer corruption happening in a FBO which use YF/YS tiled renderbuffer or texture as color attachment. BSpec recommends disabling mip tails for non-mip-mapped surfaces. But, with this enabled I couldn't get correct data out of YF/YS tiled surface. With this disabled, miplevel 0 s

[Mesa-dev] [PATCH 09/23] i965/gen9: Use HALIGN_16 if MCS is enabled

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 39fb3b1..c4fd3a2 100644 --- a/src/mesa/drivers/dri/i965/br

[Mesa-dev] [PATCH 19/23] i965/gen9: Add XY_FAST_COPY_BLT support to intelEmitCopyBlit()

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 293 +++ src/mesa/drivers/dri/i965/intel_blit.h | 3 + src/mesa/drivers/dri/i965/intel_copy_image.c | 3 + src/mesa/drivers/dri/i965/intel_reg.h| 33 +++ 4 files changed, 292 i

[Mesa-dev] [PATCH 20/23] i965/skl: Modify the conditions to use blitter on skl+

Conditions modified allow skl+ to use blitter: - for all tiling formats - to write data to YF/YS tiled surfaces Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/

[Mesa-dev] [PATCH 08/23] i965/gen9: Set horizontal alignment for the miptree

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 80 ++ 1 file changed, 80 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index eab3884..39fb3b1 100644 --- a/src/mesa/drive

[Mesa-dev] [PATCH 05/23] i965: Pass miptree pointer as function parameter in intel_vertical_texture_alignment_unit

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 18 -- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 1c9f2fe..499c2dc 100644 --- a/src/mesa/d

[Mesa-dev] [PATCH 21/23] i965/gen9: Use blitter as fallback path to read write YF/YS surfaces

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 7 --- src/mesa/drivers/dri/i965/intel_tex_image.c | 15 --- 2 files changed, 22 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c

[Mesa-dev] [PATCH 01/23] meta: Enable _mesa_meta_pbo_GetTexSubImage() to read in to non-pbo buffers

This will allow Skylake to use _mesa_meta_pbo_GetTexSubImage() for reading YF/YS tiled surfaces. V2: Make changes suggested by Neil. Signed-off-by: Anuj Phogat Cc: Neil Roberts --- src/mesa/drivers/common/meta.h | 1 + src/mesa/drivers/common/meta_tex_subimage.c | 45 ++

[Mesa-dev] [PATCH 03/23] i965: Move intel_miptree_choose_tiling() to brw_tex_layout.c

From: Anuj phogat Patch continues code refactoring. Signed-off-by: Anuj phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c| 105 ++ src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 104 - src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 8

[Mesa-dev] [PATCH 04/23] i965: Create a helper function intel_miptree_total_width_height()

From: Anuj phogat and some more code refactoring. No functional changes in this patch. Signed-off-by: Anuj phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 89 -- 1 file changed, 48 insertions(+), 41 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_te

[Mesa-dev] [PATCH 22/23] i965/gen9: Enable the use of YF/YS tiling on skl+

Note: Buffer size condition used in this patch to choose between YF / YS tiling is just a place holder. I need some suggestions here. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/src/

[Mesa-dev] [PATCH 18/23] i965/gen9: Use _mesa_meta_pbo_GetTexSubImage() to read YF/YS tiled textures

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_tex_image.c | 28 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 03db100..8e845c6 100644 ---

[Mesa-dev] [PATCH 13/23] i965: Rename use_linear_1d_layout() and make it global

This function will be utilised in later patches. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_context.h| 4 src/mesa/drivers/dri/i965/brw_tex_layout.c | 10 +- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h

[Mesa-dev] [PATCH 10/23] i965/gen9: Set vertical alignment for the miptree

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 75 ++ 1 file changed, 75 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index c4fd3a2..b3d7c1b 100644 --- a/src/mesa/drive

[Mesa-dev] [PATCH 02/23] i965: Choose tiling in brw_miptree_layout() function

From: Anuj phogat This refactoring is required by later patches in this series. Signed-off-by: Anuj phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c| 13 - src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 23 ++- src/mesa/drivers/dri/i965/intel_mipmap_tr

[Mesa-dev] [PATCH 00/23] i965/skl: Add YF/YS tiling support

This series enables skl+ to read/write data to YF/YF tiled surfaces. Many piglit tests for texture/buffer data read/write pass with the new tiling formats. I'm currently debugging an issue about incorrect data getting uploaded to miplevels > 0. I thought it'll useful to get some review comments whi

Re: [Mesa-dev] [PATCH 1/3 v2] mesa: Make a shared header for 3D pipeline enum / #defines.

On Monday, March 30, 2015 11:44:19 AM Eric Anholt wrote: > Brian Paul writes: > > > On 03/30/2015 10:49 AM, Eric Anholt wrote: > >> NIR uses these enums/#defines in nir_variables and associated intrinsics, > >> but I want to be able to use them from TGSI->NIR and NIR->TGSI. > >> Otherwise, we had

[Mesa-dev] [PATCH 2/2] radeon/vce: implement video usability information support

This will help encoding VUI into the bitstream Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_vce.c| 1 + src/gallium/drivers/radeon/radeon_vce.h| 1 + src/gallium/drivers/radeon/radeon_vce_40_2_2.c | 52 ++ 3 files changed, 54 insertions(+

[Mesa-dev] [PATCH 1/2] st/omx/enc: export framerate to vce driver

The framerate will be used for video usability info support by VCE driver Signed-off-by: Leo Liu --- src/gallium/state_trackers/omx/vid_enc.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/state_trackers/omx/vid_enc.c b/src/gallium/state_trackers/omx/vid

Re: [Mesa-dev] [PATCH 3/3] glsl: Reassociate multiplication of mat*mat*vec.

On Sat, Mar 28, 2015 at 11:03 AM, Jason Ekstrand wrote: > On Fri, Mar 27, 2015 at 9:22 PM, Matt Turner wrote: >> The typical case of mat4*mat4*vec4 is 80 scalar multiplications, but >> mat4*(mat4*vec4) is only 32. >> >> On HSW (with vec4 vertex shaders): >> instructions in affected programs:

Re: [Mesa-dev] [PATCH 1/3 v2] mesa: Make a shared header for 3D pipeline enum / #defines.

Matt Turner writes: > On Mon, Mar 30, 2015 at 9:49 AM, Eric Anholt wrote: >> NIR uses these enums/#defines in nir_variables and associated intrinsics, >> but I want to be able to use them from TGSI->NIR and NIR->TGSI. >> Otherwise, we had to pull in all of mtypes.h. >> >> This doesn't cover all

Re: [Mesa-dev] [PATCH 1/3 v2] mesa: Make a shared header for 3D pipeline enum / #defines.

Brian Paul writes: > On 03/30/2015 10:49 AM, Eric Anholt wrote: >> NIR uses these enums/#defines in nir_variables and associated intrinsics, >> but I want to be able to use them from TGSI->NIR and NIR->TGSI. >> Otherwise, we had to pull in all of mtypes.h. >> >> This doesn't cover all of the enum

Re: [Mesa-dev] [PATCH] nir: acknowledge the existence of nir_builder.h

On 30 March 2015 at 18:34, Matt Turner wrote: > On Mon, Mar 30, 2015 at 10:23 AM, Emil Velikov > wrote: >> On 30 March 2015 at 18:10, Matt Turner wrote: >>> No, it doesn't make sense. Presumably you added it because it fixed a >>> build error? Maybe if you showed what the error was it would mak

Re: [Mesa-dev] [PATCH 1/2] nir: Recognize a pattern for doing b2f without the opcode.

Series is Reviewed-by: Connor Abbott On Mon, Mar 30, 2015 at 1:12 PM, Eric Anholt wrote: > Since we have patterns based on b2f, generate them if we see the b2f > equivalent using an iand. This is common when generating NIR from TGSI. > --- > src/glsl/nir/nir_opt_algebraic.py | 1 + > 1 file c

Re: [Mesa-dev] [PATCH] nir: acknowledge the existence of nir_builder.h

On Mon, Mar 30, 2015 at 10:23 AM, Emil Velikov wrote: > On 30 March 2015 at 18:10, Matt Turner wrote: >> No, it doesn't make sense. Presumably you added it because it fixed a >> build error? Maybe if you showed what the error was it would make >> sense. >> > Hmm... ok. Can you elaborate if on the

Re: [Mesa-dev] [PATCH] nir: acknowledge the existence of nir_builder.h

On 30 March 2015 at 18:10, Matt Turner wrote: > On Mon, Mar 30, 2015 at 9:58 AM, Emil Velikov > wrote: >> On 30 March 2015 at 17:37, Eric Anholt wrote: >>> Emil Velikov writes: >>> On 30/03/15 02:05, Eric Anholt wrote: > Emil Velikov writes: > >> ... >> diff --git a/src/glsl/

Re: [Mesa-dev] [PATCH 1/3 v2] mesa: Make a shared header for 3D pipeline enum / #defines.

On 03/30/2015 10:49 AM, Eric Anholt wrote: NIR uses these enums/#defines in nir_variables and associated intrinsics, but I want to be able to use them from TGSI->NIR and NIR->TGSI. Otherwise, we had to pull in all of mtypes.h. This doesn't cover all of the enums we might want from a shared compi

[Mesa-dev] [PATCH 1/2] nir: Recognize a pattern for doing b2f without the opcode.

Since we have patterns based on b2f, generate them if we see the b2f equivalent using an iand. This is common when generating NIR from TGSI. --- src/glsl/nir/nir_opt_algebraic.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/glsl/nir/nir_opt_algebraic.py b/src/glsl/nir/nir_opt_algebrai

[Mesa-dev] [PATCH 2/2] nir: Recognize a pattern of bool frobbing from TGSI KILL_IF.

TGSI's conditional discards take float arg and negate it, so GLSL to TGSI generates a b2f and negates that value. Only, in NIR we want a proper bool once again, so we compare with 0. This is a lot of pointless extra instructions. total instructions in shared programs: 39735 -> 39702 (-0.08%) ins

Re: [Mesa-dev] [PATCH 0/3] Hash-table improvements, V3

I'm going to look over this but it may not happen until later in the week. We should also get at least an ack from Eric. --Jason On Mar 29, 2015 1:06 PM, "Thomas Helland" wrote: > Here's the latest round of fixup on the hash-table patches. > I think I've gotten all the review feedback incorporate

Re: [Mesa-dev] [PATCH 1/3 v2] mesa: Make a shared header for 3D pipeline enum / #defines.

On Mon, Mar 30, 2015 at 9:49 AM, Eric Anholt wrote: > NIR uses these enums/#defines in nir_variables and associated intrinsics, > but I want to be able to use them from TGSI->NIR and NIR->TGSI. > Otherwise, we had to pull in all of mtypes.h. > > This doesn't cover all of the enums we might want fr

Re: [Mesa-dev] [PATCH] nir: acknowledge the existence of nir_builder.h

On Mon, Mar 30, 2015 at 9:58 AM, Emil Velikov wrote: > On 30 March 2015 at 17:37, Eric Anholt wrote: >> Emil Velikov writes: >> >>> On 30/03/15 02:05, Eric Anholt wrote: Emil Velikov writes: > ... > diff --git a/src/glsl/Makefile.am b/src/glsl/Makefile.am > index ed90366..58af

Re: [Mesa-dev] [PATCH] nir: acknowledge the existence of nir_builder.h

On 30 March 2015 at 17:37, Eric Anholt wrote: > Emil Velikov writes: > >> On 30/03/15 02:05, Eric Anholt wrote: >>> Emil Velikov writes: >>> ... diff --git a/src/glsl/Makefile.am b/src/glsl/Makefile.am index ed90366..58af166 100644 --- a/src/glsl/Makefile.am +++ b/src/glsl/Ma

[Mesa-dev] [PATCH 1/3 v2] mesa: Make a shared header for 3D pipeline enum / #defines.

NIR uses these enums/#defines in nir_variables and associated intrinsics, but I want to be able to use them from TGSI->NIR and NIR->TGSI. Otherwise, we had to pull in all of mtypes.h. This doesn't cover all of the enums we might want from a shared compiler core (like varying slots or vert attribs)

Re: [Mesa-dev] [PATCH] nir: acknowledge the existence of nir_builder.h

Emil Velikov writes: > On 30/03/15 02:05, Eric Anholt wrote: >> Emil Velikov writes: >> >>> The header was added with commit 2a135c470e3(nir: Add an ALU op builder >>> kind of like ir_builder.h) but did not made it into to the sources list, >>> and its dependency of nir_builder_opcodes.h was mi

[Mesa-dev] [PATCH 6/6] clover: Add support for handling reqd_work_group_size attribute v2

This patch enables clover to return the correct value for CL_KERNEL_COMPILE_WORK_GROUP_SIZE and also verify that the correct local_work_size is used when enqueuing kernels with this attribute. v2: - Store the work group size as part of the symbol rather than as a kernel argument. --- src/ga

[Mesa-dev] [PATCH 1/6] clover: Return CL_BUILD_ERROR for CL_PROGRAM_BUILD_STATUS when compilation fails v2

v2: - Don't use _errs map Cc: 10.5 10.4 --- src/gallium/state_trackers/clover/core/program.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/state_trackers/clover/core/program.cpp b/src/gallium/state_trackers/clover/core/program.cpp index 8553ca7..c07548c 100644 --- a/src/

[Mesa-dev] [PATCH 5/6] clover: Use a structure to hold information about llvm kernel functions

More will be added to this structure in a later commit. The main purpose of this struct is to enable more efficient parsing of llvm modules. It will allow us to collect all kernel information for each function with only one pass through the module's metadata. OpenCL metadata for kernels is attach

[Mesa-dev] [PATCH 3/6] clover: Replace open-coded event::signalled()

This consolidates signalled checks into the same place. --- src/gallium/state_trackers/clover/core/event.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/state_trackers/clover/core/event.cpp b/src/gallium/state_trackers/clover/core/event.cpp index 58de888..3c933

[Mesa-dev] [PATCH 4/6] clover: Fix a bug with multi-threaded events

It was possible for some events never to get triggered if one thread was creating events and another threads was waiting for them. This patch consolidates soft_event::wait() and hard_event::wait() into event::wait() so that hard_event objects will now wait for all their dependencies to be submitte

[Mesa-dev] [PATCH 2/6] clover: Call clBuildProgram() notification function when build completes v2

v2: - Only call notification for build errors - Fix clCompileProgram() Cc: 10.5 10.4 --- src/gallium/state_trackers/clover/api/program.cpp | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/src/gallium/state_trackers/clover/api/program.cpp b/src/gallium/st

Re: [Mesa-dev] [PATCH 3/3] llvmpipe: enable ARB_texture_gather

Perhaps mention that llvmpipe now supports ARB_texture_gather in GL3.txt and relnotes/10.6.0.html? On Sun, Mar 29, 2015 at 8:12 PM, wrote: > From: Roland Scheidegger > > Just announce support for 4 components. > While here also increase the max/min texel offsets (the limit is completely > artif

Re: [Mesa-dev] [PATCH 2/2] mesa/fbo: lock ctx->Shared->Mutex when allocating renderbuffers

On 03/30/2015 02:25 AM, Martin Peres wrote: This mutex is used to make sure the shared context does not change while some shared code is looking into it. Calling BindRenderbufferEXT BindRenderbuffer with a gles context would not take the mutex before allocating an entry. Commit a34669b then move

Re: [Mesa-dev] [PATCH 1/2] mesa/fbo: do not assign a value that is never read later on

On 30/03/15 18:00, Brian Paul wrote: On 03/30/2015 02:25 AM, Martin Peres wrote: The issue has been detected by coverty. Signed-off-by: Martin Peres --- src/mesa/main/fbobject.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbob

Re: [Mesa-dev] [PATCH 1/2] mesa/fbo: do not assign a value that is never read later on

On 03/30/2015 02:25 AM, Martin Peres wrote: The issue has been detected by coverty. Signed-off-by: Martin Peres --- src/mesa/main/fbobject.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c index 072e1a8..5f9a6db 100644 -

Re: [Mesa-dev] [PATCH] radeonsi: Cache LLVMTargetMachineRef in context instead of in screen

On 27 March 2015 at 01:05, Michel Dänzer wrote: > From: Michel Dänzer > > Fixes a crash in genymotion with several threads compiling shaders > concurrently. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89746 > > Cc: 10.5 > Signed-off-by: Michel Dänzer Hi Michel, Seems that the r6

Re: [Mesa-dev] [PATCH] gallivm: simplify sampler interface

On 28/03/15 19:53, srol...@vmware.com wrote: From: Roland Scheidegger This has got a bit out of control with more and more parameters added. Worse, whenever something in there changes all callees have to be updated for that, even though they don't really do much with any parameter in there exce

Re: [Mesa-dev] [PATCH 3/3] llvmpipe: enable ARB_texture_gather

On 30/03/15 01:12, srol...@vmware.com wrote: From: Roland Scheidegger Just announce support for 4 components. While here also increase the max/min texel offsets (the limit is completely artificial, was chosen because that's what other hardware did, however there's other drivers using larger lim

Re: [Mesa-dev] [PATCH v2 06/15] st/mesa: implement GL_AMD_performance_monitor

On 03/29/2015 06:11 PM, Martin Peres wrote: On 29/03/2015 17:56, Samuel Pitoiset wrote: On 03/28/2015 09:43 PM, Martin Peres wrote: On 22/03/2015 17:35, Samuel Pitoiset wrote: From: Christoph Bumiller This is based on the original patch of Christoph Bumiller. (source: http://people.freede

Re: [Mesa-dev] [PATCH v3] i965: Handle scratch accesses where reladdr also points to scratch space

Iago Toral Quiroga writes: > This is a problem when we have IR like this: > > (array_ref (var_ref temps) (swiz x (expression ivec4 bitcast_f2i >(swiz (array_ref (var_ref temps) (constant int (2)) ) )) )) ) ) > > where we are indexing an array with the result of an expression that > acces

Re: [Mesa-dev] [PATCH 06/16] glsl: fix assignment of multiple scalar and vecs to matrices.

On Friday 27 March 2015 20:46:38 Ben Widawsky wrote: > On Thu, Dec 11, 2014 at 11:34:12PM +0100, Eduardo Lima Mitev wrote: > > From: Samuel Iglesias Gonsalvez > > > > When a vec has more elements than row components in a matrix, the > > code could end up failing an assert inside assign_to_matrix_

[Mesa-dev] [Bug 89823] [swrast] driver loads but complains then fails to work in Piglit which shows GLSL message

https://bugs.freedesktop.org/show_bug.cgi?id=89823 Kai changed: What|Removed |Added Keywords||regression --- Comment #1 from Kai --- This sound

[Mesa-dev] [Bug 89818] WebGL Conformance conformance/textures/texture-size-limit.html -> OUT_OF_MEMORY

https://bugs.freedesktop.org/show_bug.cgi?id=89818 Luke changed: What|Removed |Added URL||https://www.khronos.org/reg |

Re: [Mesa-dev] [PATCH 1/3] dri3_glx.c: Pass NULL DRI drawables into driver for None GLX drawables

On 30/03/15 07:10, Zhang, Xiong Y wrote: > Hi, Emil: >>> On 25 March 2015 at 08:05, Xiong Zhang wrote: GLX_ARB_create_context spec says: If either or are not a valid GLX drawable, a GLXBadDrawable error is generated, unless and are both None and the OpenGL version supported

Re: [Mesa-dev] [PATCH] nir: acknowledge the existence of nir_builder.h

On 30/03/15 02:05, Eric Anholt wrote: > Emil Velikov writes: > >> The header was added with commit 2a135c470e3(nir: Add an ALU op builder >> kind of like ir_builder.h) but did not made it into to the sources list, >> and its dependency of nir_builder_opcodes.h was missing. >> >> Fortunately it re

[Mesa-dev] [PATCH 3/3] util: Use 32 bit integer hash function for pointers

It is hard finding a statement or direct quote from Thomas on the licensing of his algorithm. I tried the 6 shift algorithm Bob suggests this morning before work. It seems Thomas' algorithm inlines very nicely, giving the boost. Bob's version probably gives more collisions, as the time spent in the

Re: [Mesa-dev] [PATCH] osmesa: don't try to bundle osmesa.def SConscript

On 29/03/15 00:56, Emil Velikov wrote: Both of which were removed with commit 69db422218b(scons: Don't build osmesa.) Cc: Jose Fonseca Signed-off-by: Emil Velikov --- src/mesa/drivers/osmesa/Makefile.am | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/mesa/drivers/osmesa/Makefile.am

[Mesa-dev] [Bug 89823] [swrast] driver loads but complains then fails to work in Piglit which shows GLSL message

https://bugs.freedesktop.org/show_bug.cgi?id=89823 Bug ID: 89823 Summary: [swrast] driver loads but complains then fails to work in Piglit which shows GLSL message Product: Mesa Version: git Hardware: Other

[Mesa-dev] [PATCH 2/2] mesa/fbo: lock ctx->Shared->Mutex when allocating renderbuffers

This mutex is used to make sure the shared context does not change while some shared code is looking into it. Calling BindRenderbufferEXT BindRenderbuffer with a gles context would not take the mutex before allocating an entry. Commit a34669b then moved out the allocation out of bind_renderbuffer

Re: [Mesa-dev] [PATCH 14/16] main: Added entry point for glCreateRenderbuffers

On 27/03/15 17:40, Ilia Mirkin wrote: On Fri, Mar 27, 2015 at 4:19 AM, Martin Peres wrote: On 27/03/15 07:13, Ilia Mirkin wrote: On Fri, Mar 27, 2015 at 1:06 AM, Vinson Lee wrote: On Mon, Feb 16, 2015 at 6:14 AM, Martin Peres wrote: @@ -1404,14 +1405,36 @@ _mesa_GenRenderbuffers(GLsizei n,

[Mesa-dev] [PATCH 1/2] mesa/fbo: do not assign a value that is never read later on

The issue has been detected by coverty. Signed-off-by: Martin Peres --- src/mesa/main/fbobject.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c index 072e1a8..5f9a6db 100644 --- a/src/mesa/main/fbobject.c +++ b/src/mesa/mai

Re: [Mesa-dev] GSoC 2015: Request for Registration for Mentorship

> Hello +Laura, +Brian, > > I will like you to register on melange with X.org so as to mentor me on > the Porting Glean tests to piglit project for GSoC 2015. The Mentor +Martin > Peres requested I inform you to register. > > Thanks, > Juliet > ___ mesa-d

Re: [Mesa-dev] [PATCH 1/3] dri3_glx.c: Pass NULL DRI drawables into driver for None GLX drawables

Hi, Emil: > > On 25 March 2015 at 08:05, Xiong Zhang wrote: > > > GLX_ARB_create_context spec says: > > > If either or are not a valid GLX drawable, a > > > GLXBadDrawable error is generated, unless and are both > > > None and the OpenGL version supported by is 3.0 or greater. > > > > > > So