On Mon, Feb 03, 2014 at 11:30:58AM -0800, Eric Anholt wrote:
> Topi Pohjolainen writes:
>
> > Previously the color components where evaluated using formula
> > (src_color * src_color + 1.0 dst_color) and alpha in turn using
>^ 0.0
> > (1.0 * src_alpha + 0.0 * dst_alpha
The pre-fetching doesn't go too far. Tested with over-allocating by only
a page, and didn't see any errors in dmesg. Saves ~512KB of VRAM.
Signed-off-by: Ilia Mirkin
Cc: 10.1
---
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff
Functionally identical but much simpler. Should also better integrate
with future layer/viewport changes/fixes.
Cc: 10.1
Signed-off-by: Ilia Mirkin
---
Not *strictly* necessary in stable, but it will make backporting later fixes
easier. No regressions in piglit.
src/gallium/drivers/nouveau/nv
Signed-off-by: Ilia Mirkin
---
This was tested along with airlied's patches to add support to mesa/st. With
the piglit tests modified to emit the viewport index for every vertex, this
passes all but the minmax test (it wants a viewport of 16K while we only offer
8K).
No apparent piglit regressio
In the tests they were the same so it didn't matter, but indications are
that this is the correct behaviour. Also take this opportunity to
(trivially) support using gl_Layer in fp.
Cc: 10.1
Signed-off-by: Ilia Mirkin
---
No regressions in piglit. Pretty sure that rewriting some of the
gl_Layer-
On Tue, Feb 04, 2014 at 01:18:24PM +0900, Michel Dänzer wrote:
> From: Michel Dänzer
>
> V_ADD_F32 with source modifier does not produce -0.0 for this. Just
> manipulate the sign bit directly instead.
>
> Also add a pattern for (fneg (fabs ...)).
>
> Fixes a bunch of bit encoding piglit tests w
On 02/03/2014 12:54 AM, Rogovin, Kevin wrote:
> Hi,
>
>> We can't do stencil blits with GLSL because no driver that uses meta can
>> do the GL_ARB_shader_stencil_export extension. For depth and color
>> blits, we can always write the values from the shader, and disable
>> writes to the buffers us
On Mon, 2014-02-03 at 14:16 -0800, Tom Stellard wrote:
>
> It's clear that there a few things that are wrong which are unrelated to this
> patch, so I think it is fine as is. Could you add a comment above the pattern
> explaining why we need to manually toggle the sign bit and also a todo to fix
From: Michel Dänzer
V_ADD_F32 with source modifier does not produce -0.0 for this. Just
manipulate the sign bit directly instead.
Also add a pattern for (fneg (fabs ...)).
Fixes a bunch of bit encoding piglit tests with radeonsi.
Signed-off-by: Michel Dänzer
---
v3: Add explanatory comments.
From: Michel Dänzer
Fixes opencl-example if_* tests with radeonsi.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74469
Signed-off-by: Michel Dänzer
---
lib/Target/R600/SIInstructions.td | 5 +
1 file changed, 5 insertions(+)
diff --git a/lib/Target/R600/SIInstructions.td
b/lib/T
On 02/03/2014 11:53 AM, Matt Turner wrote:
> Missed in commit e63bb298. Caused sporadic test failures, like
> incorrect-in-layout-qualifier-repeated-prim.geom.
>
> Cc: "10.0"
> ---
> src/glsl/ast_type.cpp | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/glsl/ast_type.cpp b/src/glsl/
https://bugs.freedesktop.org/show_bug.cgi?id=74476
Michel Dänzer changed:
What|Removed |Added
Assignee|dri-devel@lists.freedesktop |mesa-dev@lists.freedesktop.
On Tue, Feb 4, 2014 at 1:22 PM, Ilia Mirkin wrote:
> OK, so from the _looks_ of it, vertex and fragment texture/sampler
> bindings are totally separate. Based on what I'm seeing, there are 16
> slots for fragment shaders, and 4 for vertex shaders.
From what I understand, they're completely separat
OK, so from the _looks_ of it, vertex and fragment texture/sampler
bindings are totally separate. Based on what I'm seeing, there are 16
slots for fragment shaders, and 4 for vertex shaders.
On Mon, Feb 3, 2014 at 8:51 PM, Ilia Mirkin wrote:
> Hmmm... unclear from a quick read of the code. nv40_v
Hi Zack,
you forgot to post the initial patch to add the d3d10 state tracker :-P
Dave.
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mesa-dev@lists.freedesktop.org
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we supported 2d indirect addressing (gs tests were using it) but
not 1d indirect addressing (which can be used in vs and ps). This
adds support for 1d indirect addressing.
Signed-off-by: Zack Rusin
---
src/gallium/state_trackers/d3d10/ShaderTGSI.c | 26 ++
1 file changed,
Indexable temporaries are 2d (the index of the array and the index
within the array) and can be used both as outputs, inputs and relative
addressing registers. This fixes parsing of indexable temporaries
and fixes their parsing in relative addressing.
Signed-off-by: Zack Rusin
---
src/gallium/st
Outputs can have relative addressing. This adds basic support for it.
Signed-off-by: Zack Rusin
---
src/gallium/state_trackers/d3d10/ShaderTGSI.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/src/gallium/state_trackers/d3d10/ShaderTGSI.c
b/src/
The number of allowed temporaries increases almost with every
iteration of an api. We used to support 128, then we started
increasing and the newer api's support 4096+. So if we notice
that the number of temporaries is larger than our statically
allocated storage would allow we just treat them as i
On Mon, 2014-02-03 at 11:33 +0100, Christian König wrote:
> From: Christian König
>
> Without the correct feedback buffer size UVD runs
> into an error on each frame, reducing the maximum FPS.
>
> Signed-off-by: Christian König
Some minor comments below, other than that
Reviewed-by: Michel Dä
Hmmm... unclear from a quick read of the code. nv40_verttex.c looks at
nv30->fragprog.textures/samplers (instead of nv30->vertprog) to
disable VTXTEX_ENABLE, but doesn't do anything with them if they're
set. Could just be a copy-pasta situation, or could be that TEX_ENABLE
and VTXTEX_ENABLE can't b
nv40 supports texturing in the vertex shader, but I don't know if the
number of textures used by the vertex shader doesn't limit the maximum
number of textures which can be used by the fragment shader. For
example, if the vertex shaders uses 4 textures, the fragment shader
can only use 12 instead o
Unless Jerome has a better idea, your best bet would be to just return
FALSE from that function.
For Jerome:
The code crashes on a division by 0 (cheight is 0). The problem occurs
with the texture format R32G32B32A32 and width >= 4096. Do you have
any idea what is wrong with it?
Thank you.
Mare
1. Change locations setup in glsl_parser.yy from yylloc to appropriate token
locations.
2. Addition of two fields in ast_node location to hold end position of token.
3. Addition of ast_node method to setup range locations (for aggregate tokens).
4. Fix for glcpp-lex.l. It handled spaces wrong and
I'm using mesa glsl-compiler as backend for glsl-debugger interface with heavy
use of locations for graphical representation. Locations proposed by original
parser is wrong in most cases, because it uses yylloc for all bison rules. This
patch includes:
1. Change locations setup in glsl_parser.yy
[+ben, nv30 driver author]
On Mon, Feb 3, 2014 at 7:18 PM, Marek Olšák wrote:
> Ilia,
>
> I see you worked on nv30. Are vertex shader texture slots shared with
> fragment shader texture slots on nv40? If yes, does the nouveau team
> plan to implement vertex shader textures for nv40?
Unfortunatel
Ilia,
I see you worked on nv30. Are vertex shader texture slots shared with
fragment shader texture slots on nv40? If yes, does the nouveau team
plan to implement vertex shader textures for nv40?
Marek
On Wed, Jan 22, 2014 at 9:36 PM, Marek Olšák wrote:
> On Mon, Jan 20, 2014 at 3:35 PM, Brian
From: Dave Airlie
This throws the switch to enable GL 3.3 and GLSL 330.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_pipe.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/drivers/r600/r600_pipe.c
index 2fc
From: Dave Airlie
set the correct values so the misc out register is setup correctly
for the copy shader.
This also updates the state for the gs copy shader so the hw
gets programmed correctly.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 10 +-
src/ga
From: Dave Airlie
This is my first attempt at enabling r600/r700 geometry shaders,
the basic tests pass on both my rv770 and my rv635,
It requires this kernel patch:
http://www.spinics.net/lists/dri-devel/msg52745.html
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_asm.c
From: Dave Airlie
For geometry shaders we need to call this code from a second place.
Just move it out for now to keep future patches cleaner.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 213 +
1 file changed, 110 insertions(+), 103
From: Vadim Girlin
v2: fix regression on r600 NOP instructions.
Signed-off-by: Vadim Girlin
Signed-off-by: Dave Airlie
Fix regression since eop moving
---
src/gallium/drivers/r600/eg_asm.c | 10 ++
src/gallium/drivers/r600/r600_asm.c| 24 +---
src/gallium
From: Dave Airlie
---
src/gallium/drivers/r600/sb/sb_shader.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/sb/sb_shader.cpp
b/src/gallium/drivers/r600/sb/sb_shader.cpp
index 9f49ac8..f996c07 100644
--- a/src/gallium/drivers/r600/sb/sb_shader.cpp
From: Dave Airlie
This selects the cut value depending on the shader selected.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/evergreen_state.c
b/src/gallium/dr
From: Dave Airlie
This just makes r600 and evergreen do what the radeonsi codepaths do
for layered rendering. This makes the 2d amd_vertex_shader_layer test
pass on evergreen.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 18 +-
src/gallium/drive
From: Dave Airlie
This just bumps the number to the 3.2 minimum to represent geometry
shader samplers.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_pipe.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/dri
From: Dave Airlie
cayman has a different end of program bit, so do that properly.
fixes hangs with geom shader tests on cayman.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers
From: Dave Airlie
This just enables the workarounds we have for vertex/pixel shaders
for geom shaders as well.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_state_common.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/r600/r600_state_common.c
b/s
From: Dave Airlie
attempt to calculate a better value for array size to avoid breaking apps.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r
From: Dave Airlie
This enables streamout with GS in the mix, from the
VS dma shader.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 6 --
src/gallium/drivers/r600/r600_state_common.c | 4
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/src
From: Dave Airlie
This follows what fglrx does, it unpacks the input we are
going to indirect into a bunch of registers and indirects
inside them.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 48 +++---
1 file changed, 44 insertions(+), 4
From: Dave Airlie
This just adds support for emitting the proper value in the VS out misc.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 3 +-
src/gallium/drivers/r600/r600_pipe.c | 2 +-
src/gallium/drivers/r600/r600_shader.c | 58
From: Dave Airlie
The instance cnt register was missing for a few kernels,
with a new enough kernel we can output it.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/r
From: Dave Airlie
We need to be able to write to the ring using a base register
for when we emit vertices in a loop, in theory the SB compiler
could collapse these indirect writes to direct writes if the
register value is constant and known, but that is outside my
pay grade.
Signed-off-by: Dave
From: Dave Airlie
this fixes a bunch of the geom shader built-in tests
---
src/gallium/drivers/r600/r600_shader.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index f4a3194..07b343b 1006
From: Dave Airlie
This can happen in normal operation, so don't report an error on it,
just continue.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/g
From: Dave Airlie
Although we don't use SB on geom shaders, the VS copy shader will use it
so we might as well implement MEM_RING support in sb.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/sb/sb_bc_dump.cpp | 3 +++
src/gallium/drivers/r600/sb/sb_bc_finalize.cpp | 2 +-
src/gal
From: Dave Airlie
As we do for vertex and pixel shaders.
`
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/r600/evergreen_state.c
b/src/gallium/drivers/r600/evergreen_state.c
index 6896617..e6aa
From: Dave Airlie
Vadim's code derived it from the info.mode, but it needs
to be takes from the geometry shader output primitive.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 27 ++-
src/gallium/drivers/r600/r600_state_common.c | 26
From: Dave Airlie
only enable prim id if gs uses it
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 6 +-
src/gallium/drivers/r600/evergreend.h | 4
src/gallium/drivers/r600/r600_shader.c | 9 +
src/gallium/drivers/r600/r600_shader.h |
From: Dave Airlie
SB needs fixes for three GS instructions it seems to raise
them outside loops etc despite my best efforts.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/sr
From: Dave Airlie
It looks like we need these for geom shaders in the future.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/eg_asm.c | 6 --
src/gallium/drivers/r600/r600_asm.c | 9 +++--
src/gallium/drivers/r600/r600_asm.h | 1 +
3 files changed, 12 insertions(+), 4 deleti
From: Dave Airlie
If the shader has no CF clauses at all emit an nop
If the last instruction is an ENDLOOP add a NOP for the LOOP to go to
if the last instruction is CALL_FS add a NOP
These fix a bunch of hangs in the geometry shader tests.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r
From: Vadim Girlin
[airlied: fix dropped streamout line - fix for master]
Signed-off-by: Vadim Girlin
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 1 -
src/gallium/drivers/r600/r600_state.c| 2 -
src/gallium/drivers/r600/r600_state_common.c | 123 +
From: Vadim Girlin
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreend.h | 80 ---
src/gallium/drivers/r600/r600d.h | 1 +
2 files changed, 75 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreend.h
b/src/gallium/dr
From: Dave Airlie
Trivial fix to Vadim's code.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index 5d3f7c8..f4a3194 100644
--- a/src/g
These 30 patches comprise geometry shader support for r600->cayman GPUs,
Since I last posted, I've fixed all the regressions caused by the initial
introduction of geometry shaders patch, this passes a large amount of the
geometry tests, and I'd like to merge this soon, I think any remaining proble
On 1 February 2014 22:37, Jordan Justen wrote:
> On Thu, Jan 9, 2014 at 6:19 PM, Paul Berry
> wrote:
> > ---
> > src/mesa/drivers/dri/i965/brw_context.h | 8
> > src/mesa/drivers/dri/i965/brw_program.c | 11 +++
> > 2 files changed, 19 insertions(+)
> >
> > diff --git a/src/me
On 1 February 2014 22:28, Jordan Justen wrote:
> On Thu, Jan 9, 2014 at 6:19 PM, Paul Berry
> wrote:
> > ---
> > src/mesa/main/shaderapi.c | 18 ++
> > 1 file changed, 18 insertions(+)
> >
> > diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
> > index 053f27b..
https://bugs.freedesktop.org/show_bug.cgi?id=74251
--- Comment #9 from Ian Milligan ---
It appears that loading a shader which expects a texture buffer causes the
first texture unit's target to be set to TEXTURE_BUFFER. When st_validate_state
is called without a texture bound to this texture unit
On 1 February 2014 21:25, Jordan Justen wrote:
> On Thu, Jan 9, 2014 at 6:19 PM, Paul Berry
> wrote:
> > ---
> > src/glsl/main.cpp | 1 +
> > src/glsl/standalone_scaffolding.cpp | 1 +
> > src/mesa/main/context.c | 1 +
> > src/mesa/main/get.c | 1 +
On Mon, Feb 03, 2014 at 04:43:10PM +0900, Michel Dänzer wrote:
> On Don, 2014-01-30 at 10:43 -0500, Tom Stellard wrote:
> > On Wed, Jan 29, 2014 at 06:23:00PM +0900, Michel Dänzer wrote:
> > > From: Michel Dänzer
> > >
> > > V_ADD_F32 with source modifier does not produce -0.0 for this. Just
> >
Mesa 10.0.3 has been released. Mesa 10.0.3 is a bug fix release which
fixes bugs fixed since the 10.0.2 release, (see below for a list of
changes).
The tag in the git repository for Mesa 10.0.3 is 'mesa-10.0.3'.
Mesa 10.0.3 is available for download at
ftp://freedesktop.org/pub/mesa/10.0.3/
md5s
Missed in commit e63bb298. Caused sporadic test failures, like
incorrect-in-layout-qualifier-repeated-prim.geom.
Cc: "10.0"
---
src/glsl/ast_type.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/ast_type.cpp b/src/glsl/ast_type.cpp
index 637da0d..5069326 100644
--- a/src/glsl/ast
Kenneth Graunke writes:
> This moves the intel_batchbuffer_flush before the drm_intel_bo_busy
> call, so it isn't entirely equivalent, but I think that should be fine.
Where by "isn't entirely equivalent", you mean "actually works". :)
This series is:
Reviewed-by: Eric Anholt
pgpc3Zj04xGtD.
On Mon, Feb 3, 2014 at 5:33 AM, Christian König wrote:
> From: Christian König
>
> Without the correct feedback buffer size UVD runs
> into an error on each frame, reducing the maximum FPS.
>
> Signed-off-by: Christian König
Reviewed-by: Alex Deucher
Should probably also CC 10.1, 10.0, and 9.
Topi Pohjolainen writes:
> Previously the color components where evaluated using formula
> (src_color * src_color + 1.0 dst_color) and alpha in turn using
^ 0.0
> (1.0 * src_alpha + 0.0 * dst_alpha). The intention is to keep
> source color components unmodified and forc
https://bugs.freedesktop.org/show_bug.cgi?id=74471
Priority: medium
Bug ID: 74471
Keywords: regression
CC: bri...@vmware.com, i...@freedesktop.org
Assignee: mesa-dev@lists.freedesktop.org
Summary: [swrast] piglit ext_texture_arra
Looks good AFAICT.
Jose
- Original Message -
> If the shader is too large, plug in a dummy shader. This patch also
> reworks the existing dummy shader code.
> ---
> src/gallium/drivers/svga/include/svga_reg.h |1 +
> src/gallium/drivers/svga/svga_state_fs.c| 60
>
- Original Message -
> To match the CALLOC_STRUCT() call.
> ---
> src/gallium/auxiliary/indices/u_primconvert.c |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/gallium/auxiliary/indices/u_primconvert.c
> b/src/gallium/auxiliary/indices/u_primconvert.c
> i
- Original Message -
> When we clipped a line weren't copying the provoking vertex
> color to the second vertex. We also weren't checking for
> first vs. last provoking vertex.
>
> Fixes failures found with the new piglit line-flat-clip-color test.
>
> Cc: 10.0, 10.1
> ---
> src/gall
Since commit 9cee3ff562f3e4b51bfd30338fd1ba7716ac5737, INTEL_DEBUG=vs
has caused a NULL pointer dereference for fixed-function/ARB programs.
In the vec4 generators, "prog" is a gl_program, and "shader_prog" is the
gl_shader_program. This is different than the FS visitor.
Signed-off-by: Kenneth G
When we clipped a line weren't copying the provoking vertex
color to the second vertex. We also weren't checking for
first vs. last provoking vertex.
Fixes failures found with the new piglit line-flat-clip-color test.
Cc: 10.0, 10.1
---
src/gallium/auxiliary/draw/draw_pipe_clip.c | 13 ++
Hi Ian, mesa-dev,
I've been trying to implement ARB_viewport_array support on nv50, with
little success. Christoph pointed out that if I write the
gl_ViewportIndex value before each emit (rather than once at the top,
as the piglit tests do it), everything magically starts working.
I glanced at ht
Kenneth Graunke writes:
> The need_workaround_flush flag was an attempt to avoid doing the
> post-sync non-zero workaround flush unless it was actually necessary.
>
> Getting the tracking right is tricky; we've messed it up several times.
>
> The cost of getting this wrong is high: almost certain
Matt Turner writes:
> Another couple 10.0.3 requests
>
> - fcefdc9a595c5 (see https://bugs.freedesktop.org/show_bug.cgi?id=73900)
> - 1cdeeef6c400 (see https://bugs.freedesktop.org/show_bug.cgi?id=73902)
Thanks. Applied.
-Carl
--
carl.d.wo...@intel.com
pgpYvofdRNcq8.pgp
Description: PGP sign
Is there a way to do the HDP flush at the bottom of the pipe? Can this
be fixed in the kernel?
I'm not 100% sure, but I don't think so. As far as I know the only thing
you can do on the bottom of the pipe is writing a fence/timestamp value
or signaling a semaphore (the different EOP events).
Matt Turner writes:
> We definitely want to apply "glx: Update glxext.h to revision 24777."
> in time for the next 10.0 release. It fixes a really annoying problem
> with the GL headers that make distributions lives awful.
Thanks. I'm glad I asked people to point out anything I missed. This is
ex
I don't know of any way to know if the buffer should be in GTT.
There could also be the case where the buffer is first not shared with
another device,
and then is shared with another device. So at first we shouldn't have
forced the buffer to stay in VRAM.
Just to confirm, I have tested your p
From: Christian König
Without the correct feedback buffer size UVD runs
into an error on each frame, reducing the maximum FPS.
Signed-off-by: Christian König
---
src/gallium/drivers/radeon/radeon_uvd.c | 38 +++--
1 file changed, 27 insertions(+), 11 deletions(-)
d
On Mon, Feb 3, 2014 at 3:54 AM, Rogovin, Kevin wrote:
> Hi,
>
>> We can't do stencil blits with GLSL because no driver that uses meta can
>> do the GL_ARB_shader_stencil_export extension. For depth and color
>> blits, we can always write the values from the shader, and disable
>> writes to the bu
Hi
On Fri, Jan 31, 2014 at 9:58 PM, Tom Stellard wrote:
> On Thu, Jan 30, 2014 at 10:16:41PM +, Emil Velikov wrote:
>> On 27/01/14 16:13, Tom Stellard wrote:
>> > From: Tom Stellard
>> >
>> > v2:
>> >- Add missing call to pipe_loader_drm_release()
>> >- Fix render node macros
>> >
Do you mean something like:
write_domains = VRAM
read_domains = VRAM | GTT
I don't think it's perfect. We should treat rendering by an app and
blitting by u_blitter (= texture transfers) differently. We don't want
u_blitter to mess up our idea about which textures are used as a
framebuffer, becau
Previously the color components where evaluated using formula
(src_color * src_color + 1.0 dst_color) and alpha in turn using
(1.0 * src_alpha + 0.0 * dst_alpha). The intention is to keep
source color components unmodified and force alpha channel to
fixed value of one regardless of source or destin
One further note:
It initially looked like the USCALED/SSCALED surface formats might be
usable for this, and if so would reduce the required shader workaround
to just a single mov for the float to [u]int conversion -- but
unfortunately the sampler is broken for these as well.
-- Chris
On Mon, Fe
This series adds a bunch of workarounds to enable ARB_texture_gather
(in its more restrictive form) on Gen6 hardware.
These are necessary because Gen6's gather4 instruction doesn't work
correctly with integer or unsigned integer formats.
The approach is:
* For 32-bit wide formats, pretend the su
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 26 ++
2 files changed, 27 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 9c5c13a
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 30
1 file changed, 25 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index dd96c9b..247b66
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_program.h | 11 +++
src/mesa/drivers/dri/i965/brw_wm.c | 20
2 files changed, 31 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_program.h
b/src/mesa/drivers/dri/i965/brw_program.h
index 511
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_context.c | 2 ++
src/mesa/drivers/dri/i965/intel_extensions.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index d9d1ae5.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 22 ++
2 files changed, 23 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index e17
Hi,
> We can't do stencil blits with GLSL because no driver that uses meta can
> do the GL_ARB_shader_stencil_export extension. For depth and color
> blits, we can always write the values from the shader, and disable
> writes to the buffers using glColorMask and glDepthMask. So... we just
> need
Fixes a minor oversight where a precision qualifier was not
allowed for an array of samplers.
---
src/glsl/ast_to_hir.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 1bfb4e5..08fd0d3 100644
--- a/src/glsl/ast_to_hir
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