On 11/16/2013 10:38 PM, Chris Forbes wrote:
> Now that branch 10.0 is created, bump the minor version in
> master.
>
> Signed-off-by: Chris Forbes
We always forget this for some reason...
Reviewed-by: Kenneth Graunke
___
mesa-dev mailing list
mesa-de
For the series:
Acked-by: Chris Forbes
On Sun, Nov 17, 2013 at 12:27 PM, Emil Velikov wrote:
> The X.Org state tracker is gone, as well as the xvmc/vdpau
> r300 and softpipe targets.
>
> Cc: "10.0"
> Signed-off-by: Emil Velikov
> ---
> docs/relnotes/10.0.html | 6 +-
> 1 file changed, 5
Now that branch 10.0 is created, bump the minor version in
master.
Signed-off-by: Chris Forbes
---
VERSION | 2 +-
docs/relnotes.html | 1 +
docs/relnotes/10.1.html | 60 +
3 files changed, 62 insertions(+), 1 deletion(-)
cr
On 11/16/2013 06:00 PM, Chris Forbes wrote:
> These would never fire.
>
> Signed-off-by: Chris Forbes
> ---
> src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 2 +-
> src/mesa/drivers/dri/i965/brw_vec4_vp.cpp| 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
This would never fire.
Signed-off-by: Chris Forbes
---
src/gallium/state_trackers/vega/paint.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/state_trackers/vega/paint.c
b/src/gallium/state_trackers/vega/paint.c
index 79b7a27..fea9fc1 100644
--- a/src/gallium/st
These would never fire.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_vp.cpp| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expres
This would never fire.
Signed-off-by: Chris Forbes
---
src/gallium/drivers/r600/sb/sb_sched.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/sb/sb_sched.cpp
b/src/gallium/drivers/r600/sb/sb_sched.cpp
index 2792315..1413916 100644
--- a/src/gallium
For commit 4df56177 Paul discovered that the hardware restriction that
Align16 instructions cannot be compressed was lifted on Haswell. This
has prevented us from emitting compressed three-source instructions.
For added confirmation, the bspec lists a work around called
WaBreakSimd16TernaryInstruc
On Sat, Nov 16, 2013 at 3:53 PM, Kenneth Graunke wrote:
> On 11/16/2013 03:24 PM, Matt Turner wrote:
>> For commit 4df56177 Paul discovered that the hardware restriction that
>> Align16 instructions cannot be compressed was lifted on Haswell. This
>> has prevented us from emitting compressed three
On 11/16/2013 03:23 PM, Matt Turner wrote:
> Removes IF/ENDIF and IF/ELSE/ENDIF with no intervening instructions.
>
> total instructions in shared programs: 1360393 -> 1360387 (-0.00%)
> instructions in affected programs: 157 -> 151 (-3.82%)
>
> (no change in vertex shaders)
>
> Reviewed-by:
On 11/16/2013 03:24 PM, Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 23 ++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> i
On 11/16/2013 03:24 PM, Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/brw_disasm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
> b/src/mesa/drivers/dri/i965/brw_disasm.c
> index 22b37d7..128e717 100644
> --- a/src/mes
On 11/16/2013 03:24 PM, Matt Turner wrote:
> For commit 4df56177 Paul discovered that the hardware restriction that
> Align16 instructions cannot be compressed was lifted on Haswell. This
> has prevented us from emitting compressed three-source instructions.
>
> For added confirmation, the bspec l
From: Joerg Mayer
- Indent items under a GL version to allow context diffs to do their work.
- Move complete drivers into the GL version line - this should make the
stuff a little bit easier to read.
v2: keep the fd.o link (Emil Velikov)
Signed-off-by: Joerg Mayer
Signed-off-by: Emil Velikov
Cc: "10.0"
Signed-off-by: Emil Velikov
---
docs/relnotes/10.0.html | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/relnotes/10.0.html b/docs/relnotes/10.0.html
index f06d068..1e4f771 100644
--- a/docs/relnotes/10.0.html
+++ b/docs/relnotes/10.0.html
@@ -55,6 +55,7 @@ Note: some of the n
Signed-off-by: Emil Velikov
---
docs/GL3.txt | 36 ++--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 9b9d38b..5f6fa7e 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -18,7 +18,7 @@ are exposed in the 3.0 context
From: Joerg Mayer
v2: keep the fd.o link (Emil Velikov)
Signed-off-by: Joerg Mayer
Signed-off-by: Emil Velikov
---
docs/GL3.txt | 276 +--
1 file changed, 138 insertions(+), 138 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
inde
The X.Org state tracker is gone, as well as the xvmc/vdpau
r300 and softpipe targets.
Cc: "10.0"
Signed-off-by: Emil Velikov
---
docs/relnotes/10.0.html | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/docs/relnotes/10.0.html b/docs/relnotes/10.0.html
index eabe77f..f06d
---
src/mesa/drivers/dri/i965/brw_disasm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index 22b37d7..128e717 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 1e5422c..bf38db6 100644
--- a/src/mesa/drivers/dri/i
For commit 4df56177 Paul discovered that the hardware restriction that
Align16 instructions cannot be compressed was lifted on Haswell. This
has prevented us from emitting compressed three-source instructions.
For added confirmation, the bspec lists a work around called
WaBreakSimd16TernaryInstruc
Previously, register_coalesce() would modify
mov vgrf1:f vgrf2:f
cmp null vgrf3:d vgrf1:d
to be
cmp null vgrf3:d vgrf2:f
and incorrectly use vgrf2's type in the instruction that the mov was
coalesced into.
---
My in progress value-numbering pass exposes this bug, but w
Removes IF/ENDIF and IF/ELSE/ENDIF with no intervening instructions.
total instructions in shared programs: 1360393 -> 1360387 (-0.00%)
instructions in affected programs: 157 -> 151 (-3.82%)
(no change in vertex shaders)
Reviewed-by: Paul Berry
Reviewed-by: Eric Anholt
---
src/mesa/driver
Reviewed-by: Paul Berry
---
src/mesa/drivers/dri/i965/brw_shader.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h
b/src/mesa/drivers/dri/i965/brw_shader.h
index aba24c5..ae7823e 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drive
Reviewed-by: Paul Berry
---
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4.cpp | 8
src/mesa/drivers/dri/i965/brw_vec4.h| 1 +
src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 2 +-
src/mesa
Reviewed-by: Jakob Bornecrantz
On Sat, Nov 16, 2013 at 4:49 PM, Brian Paul wrote:
> Needs to be larger than 6 to accomodate 3D textures and array textures.
> Fixes a few piglit tests (fbo-3d, copyteximage 3D).
> ---
> src/gallium/drivers/svga/svga_resource_texture.c |9 +
> src/gallium/
On Sat, Nov 16, 2013 at 4:39 PM, Emil Velikov wrote:
> Export only XvMC* symbols for the xvmc targets.
>
> Signed-off-by: Emil Velikov
Tested-by: Ilia Mirkin
Works fine on my NV42, the vl_screen* and nouveau_drm_screen_create
symbols are indeed gone.
> ---
> src/gallium/Automake.inc | 2 +-
>
Export only XvMC* symbols for the xvmc targets.
Signed-off-by: Emil Velikov
---
src/gallium/Automake.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/Automake.inc b/src/gallium/Automake.inc
index b6b9b36..1e4a34f 100644
--- a/src/gallium/Automake.inc
+++ b/src/
The above two variables are unused as of commit
commit 024fe6852a76f33d7e2afc5621340e387c381bb0
Author: Tom Stellard
Date: Tue Apr 2 10:42:50 2013 -0700
radeon/llvm: Use LLVM C API for compiling LLVM IR to ISA v2
which removed the only cpp file from drivers/radeon, but missed to
r
---
src/gallium/auxiliary/postprocess/postprocess.h |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/postprocess/postprocess.h
b/src/gallium/auxiliary/postprocess/postprocess.h
index 1db581c..c72f2c4 100644
--- a/src/gallium/auxiliary/postproces
Add new OSMesaPostprocess() function to allow using the gallium
postprocessing filters. This only works for OSMesa with gallium
drivers, not the legacy swrast OSMesa.
Bump OSMESA_MAJOR/MINOR_VERSION numbers to 10.0
---
include/GL/osmesa.h| 19 +-
src/gallium/state_t
To match the pp_ namespace convention.
---
src/gallium/auxiliary/postprocess/postprocess.h |4 ++--
src/gallium/auxiliary/postprocess/pp_colors.c |2 +-
src/gallium/auxiliary/postprocess/pp_filters.h | 14 +++---
src/gallium/auxiliary/postprocess/pp_init.c |2 +-
src/g
Move private data structures and function prototypes out of the
public postprocess.h header file.
Create a pp_private.h for the shared, private data structures, functions.
Remove pp_program.h header.
---
src/gallium/auxiliary/postprocess/postprocess.h | 45 ++
src/gallium/auxiliary/postp
They're not needed in postprocess.h
---
src/gallium/auxiliary/postprocess/filters.h |4
src/gallium/auxiliary/postprocess/postprocess.h |3 ---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/postprocess/filters.h
b/src/gallium/auxiliary/postp
---
src/gallium/auxiliary/postprocess/pp_init.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/src/gallium/auxiliary/postprocess/pp_init.c
b/src/gallium/auxiliary/postprocess/pp_init.c
index a49a23d..bbebb5c 100644
--- a/src/gallium/auxiliary/p
On 11/11/13 18:53, Emil Velikov wrote:
> Hello list,
>
> Here is an updated version of the subdir-objects series sent earlier.
>
> As a reminder the series aims to
> * make mesa build system "subdir-objects" compliant
> * minimise flags duplication across gallium
>
> Changes since previous versi
Needs to be larger than 6 to accomodate 3D textures and array textures.
Fixes a few piglit tests (fbo-3d, copyteximage 3D).
---
src/gallium/drivers/svga/svga_resource_texture.c |9 +
src/gallium/drivers/svga/svga_resource_texture.h | 41 --
2 files changed, 32 inserti
https://bugs.freedesktop.org/show_bug.cgi?id=71665
Matt Turner changed:
What|Removed |Added
CC||matts...@gmail.com
--
You are receiving t
On 15 November 2013 19:26, Kenneth Graunke wrote:
> On 11/15/2013 01:18 PM, Paul Berry wrote:
> > Gen6+ allows for color buffers to use a vertical alignment of either 4
> > or 2. Previously we defaulted to 2. This may have caused problems on
> > Gen7 because Y-tiled render targets are not allow
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