Kenneth,
thank you for your guide. mesa code is much clearer for me now.
--lx
On 08/23/2013 02:07 AM, Kenneth Graunke wrote:
On 08/22/2013 02:59 AM, Liu Xin wrote:
Dear list,
i wonder if all vendors in mesa3d use intel's glsl compiler now? by
browsing glsl source code, i still don't underst
On 08/22/2013 06:19 PM, Paul Berry wrote:
On 21 August 2013 23:26, Kenneth Graunke mailto:kenn...@whitecape.org>> wrote:
We're soon going to be calling brw_alloc_reg_set() from outside of the
visitor, where we don't have the precomputed "max_grf" variable handy.
Signed-off-by: Kenne
From: Roland Scheidegger
Previously, the min/mag switchover point when using nearest/none mip
filter was effectively -0.5 which can't be right. Looks like new OpenGL
thinks it's ok if it's always 0.0 (older versions required 0.5 in some
cases), let's hope everybody else thinks that's fine too.
Re
On 21 August 2013 23:26, Kenneth Graunke wrote:
> We're soon going to be calling brw_alloc_reg_set() from outside of the
> visitor, where we don't have the precomputed "max_grf" variable handy.
>
> Signed-off-by: Kenneth Graunke
> Cc: Paul Berry
>
Thanks for doing this, Ken! Series is:
Revie
We never noticed that this field was uninitialized because it is only
used in an error path that reports internal Mesa errors.
But it's silly to have it around anyway because &brw->ctx is
equivalent.
Should fix Coverity defect CID 1063351: Uninitialized pointer field
(UNINIT_CTOR) /src/mesa/drive
Hi guys,
As I'm yet to receive feedback I thought I'd explain more thoroughly what my
patch does to make reviewing it easier.
Currently glDebugMessageControlARB() ALWAYS throws an assertion whenever the
count parameter it set to anything greater than 0.
This is because the gl_enum_to_debug_* fu
On Thu, Aug 22, 2013 at 08:20:38PM +0400, Vadim Girlin wrote:
> Signed-off-by: Vadim Girlin
This is fine with me. Nice work!
Reviewed-by: Tom Stellard
> ---
> src/gallium/drivers/r600/r600_asm.c| 3 ++-
> src/gallium/drivers/r600/r600_pipe.c | 4 ++--
> src/gallium/drivers/r600/r600_pi
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 6c7e827..b3640d0 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drive
---
src/glsl/ir_optimization.h | 1 +
src/glsl/lower_instructions.cpp | 106
2 files changed, 107 insertions(+)
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index 074686c..51c73bb 100644
--- a/src/glsl/ir_optimization.h
+++ b
---
src/glsl/ir_optimization.h | 1 +
src/glsl/lower_instructions.cpp | 128
2 files changed, 129 insertions(+)
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index b79c2b7..074686c 100644
--- a/src/glsl/ir_optimization.h
+++ b
---
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 6 ++
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 6 ++
3 files changed, 13 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_exp
It's a ?: that operates per-component on vectors. Will be used in
upcoming lowering passes for frexp and ldexp.
---
src/glsl/ir.cpp| 25 +
src/glsl/ir.h | 18 ++
src/glsl/ir_builder.cpp
These instructions will be used with immediate arguments in the upcoming
frexp and ldexp lowering passes.
---
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
b/src/mesa/dri
Note the parameter name change in the int version of ir_constant, to
avoid the conflict with the loop iterator.
---
src/glsl/ir.cpp | 44
src/glsl/ir.h | 8
2 files changed, 32 insertions(+), 20 deletions(-)
diff --git a/src/glsl/ir.cpp b/s
---
src/glsl/ir_print_visitor.cpp | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/glsl/ir_print_visitor.cpp b/src/glsl/ir_print_visitor.cpp
index 541231a..b518310 100644
--- a/src/glsl/ir_print_visitor.cpp
+++ b/src/glsl/ir_print_visitor.cpp
@@ -406,7 +406,17 @
---
src/glsl/ir.cpp | 2 ++
src/glsl/ir.h| 3 +++
src/glsl/ir_constant_expression.cpp | 10 ++
src/glsl/ir_validate.cpp | 9 +
src/mesa/drive
---
src/glsl/builtins/profiles/ARB_gpu_shader5.glsl | 20
1 file changed, 20 insertions(+)
diff --git a/src/glsl/builtins/profiles/ARB_gpu_shader5.glsl
b/src/glsl/builtins/profiles/ARB_gpu_shader5.glsl
index 36fc0de..f664fcd 100644
--- a/src/glsl/builtins/profiles/ARB_gpu_sh
---
src/glsl/builtins/ir/frexp.ir | 25 +
src/glsl/builtins/ir/ldexp.ir | 25 +
src/glsl/builtins/profiles/ARB_gpu_shader5.glsl | 10 ++
3 files changed, 60 insertions(+)
create mode 100644 src/glsl/builti
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 11 +++
2 files changed, 12 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 111b105..4bc3b99 100644
--- a/src/mesa/driv
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7 +++
4 files changed, 10 insertions(+
---
src/glsl/ir.cpp| 1 +
src/glsl/ir.h | 7 +++
src/glsl/ir_validate.cpp | 1 +
src/mesa/program/ir_to_mesa.cpp| 1 +
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 1 +
5 files changed, 11 insertions(+)
dif
---
src/glsl/builtins/ir/fma.ir | 29 +
src/glsl/builtins/profiles/ARB_gpu_shader5.glsl | 5 +
2 files changed, 34 insertions(+)
create mode 100644 src/glsl/builtins/ir/fma.ir
diff --git a/src/glsl/builtins/ir/fma.ir b/src/glsl/builtins/ir/fma.ir
On Thu, Aug 22, 2013 at 03:11:06PM -0700, Ian Romanick wrote:
> On 07/17/2013 04:49 AM, Tomasz Lis wrote:
> >From: Tomasz Lis
> >
> >glx: Creation of dummy X pixmap associated with float buffer.
> >
> >This change addresses the fact that float configs can be only used for
> >pbuffers,
> >and that
Mesa 9.2 release candidate 2 is now available for testing.
The tag in the GIT repository for Mesa 9.2-rc2 is 'mesa-9.2-rc2'.
Mesa 9.2 release candidate 2 is available for download at
ftp://freedesktop.org/pub/mesa/9.2/
md5sums:
4cde5bbe49658431951e6f51814a9c05 MesaLib-9.2.0-rc2.tar.gz
1b06e7a
On 07/17/2013 04:49 AM, Tomasz Lis wrote:
From: Tomasz Lis
glx: Creation of dummy X pixmap associated with float buffer.
This change addresses the fact that float configs can be only used for pbuffers,
and that 2D driver may not allow creation of an associated pixmap.
It wouldn't be needed if
On 08/20/2013 11:30 AM, Paul Berry wrote:
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +
src/mesa/drivers/dri/i965/brw_context.h | 2 +
src/mesa/drivers/dri/i965/brw_defines.h | 10 +
src/mesa/drivers/dri/i965/brw_state.h | 1 +
src/mesa/
On 08/20/2013 11:30 AM, Paul Berry wrote:
From: Eric Anholt
All but two of the piglit GLSL 1.50/uniform_buffer tests work, and
maxuniformblocksize and referenced-by-shader work.
v2 (Paul Berry ): Account for Ken's recent
binding table re-work. Use brw->vec4_gs.bind_bo_offset instead of
brw->g
On 08/22/2013 01:59 AM, Kenneth Graunke wrote:
_mesa_meta_begin() sets up an orthographic project and initializes the
viewport based on the current drawbuffer's width and height. This is
likely the window size, since it occurs before the meta operation binds
any temporary buffers.
decompress_te
On 08/21/2013 09:30 PM, Matt Turner wrote:
On Wed, Aug 21, 2013 at 9:14 PM, Ian Romanick wrote:
ping
Committed yesterday to master. Should I cherry-pick it to 9.2 now?
It looks like it's on 9.2. I must have just missed it when I was
checking. Sorry for the noise.
__
On 08/22/2013 02:59 AM, Liu Xin wrote:
Dear list,
i wonder if all vendors in mesa3d use intel's glsl compiler now? by
browsing glsl source code, i still don't understand how it generates
ir_texture. in my idea, it treats it as normal function call.
Yes, all drivers use the same shader compile
https://bugs.freedesktop.org/show_bug.cgi?id=68445
Vladimir Ysikov changed:
What|Removed |Added
CC||granti...@gmail.com
--
You are receiv
https://bugs.freedesktop.org/show_bug.cgi?id=68445
Priority: medium
Bug ID: 68445
Assignee: mesa-dev@lists.freedesktop.org
Summary: New option to GALLIUM_HUD
Severity: enhancement
Classification: Unclassified
OS: All
eglSwapBuffers() should result in a call to wl_display_flush since it
may be called by a rendering thread, and it cannot rely on the main
loop to call it. The main loop may indeed be stuck on a
wl_display_dispatch() call which blocks until there are events, and
if the redraw is triggered by an appl
Dear list,
i wonder if all vendors in mesa3d use intel's glsl compiler now? by
browsing glsl source code, i still don't understand how it generates
ir_texture. in my idea, it treats it as normal function call.
for example, this is tiny fragment shader:
uniform sampler2D sampler2d;
varying me
Reviewed-by: Marek Olšák
Marek
On Thu, Aug 22, 2013 at 6:20 PM, Vadim Girlin wrote:
> Signed-off-by: Vadim Girlin
> ---
> src/gallium/drivers/r600/r600_asm.c| 3 ++-
> src/gallium/drivers/r600/r600_pipe.c | 4 ++--
> src/gallium/drivers/r600/r600_pipe.h | 2 +-
> src/gallium/drivers/r
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/r600/r600_asm.c| 3 ++-
src/gallium/drivers/r600/r600_pipe.c | 4 ++--
src/gallium/drivers/r600/r600_pipe.h | 2 +-
src/gallium/drivers/r600/r600_shader.c | 2 +-
4 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/gallium
Great catch!
Jose
- Original Message -
> From: Roland Scheidegger
>
> block size depth is always 1 even for compressed formats (unless someone
> invents true 3d compressed formats at least which we can't represent).
> Nearest (and soa) path had it right.
> ---
> src/gallium/auxiliary/g
https://bugs.freedesktop.org/show_bug.cgi?id=68409
José Fonseca changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |srol...@vmware.com
|org
On Don, 2013-08-22 at 08:45 -0700, Tom Stellard wrote:
> On Thu, Aug 22, 2013 at 05:42:34PM +0200, Michel Dänzer wrote:
> > On Don, 2013-08-22 at 11:25 -0400, Tom Stellard wrote:
> > > From: Tom Stellard
> > >
> > > We need to include the number of LDS bytes allocated by the state tracker.
> > >
On Thu, Aug 22, 2013 at 05:42:34PM +0200, Michel Dänzer wrote:
> On Don, 2013-08-22 at 11:25 -0400, Tom Stellard wrote:
> > From: Tom Stellard
> >
> > We need to include the number of LDS bytes allocated by the state tracker.
> > ---
> > src/gallium/drivers/radeonsi/radeonsi_compute.c | 8 ++
On Don, 2013-08-22 at 11:25 -0400, Tom Stellard wrote:
> From: Tom Stellard
>
> We need to include the number of LDS bytes allocated by the state tracker.
> ---
> src/gallium/drivers/radeonsi/radeonsi_compute.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/src/
On Thu, Aug 22, 2013 at 10:03:56AM +0200, Michel Dänzer wrote:
> On Mit, 2013-08-21 at 11:30 -0700, Tom Stellard wrote:
> >
> > The attached patches fix some LDS bugs on SI and add support for atomic
> > add for R600 and SI.
> >
> > Please Review.
>
> About patch 4:
>
> > diff --git a/lib/Targe
On 20 August 2013 11:30, Paul Berry wrote:
> This series constitutes the initial geometry shader support for i965
> Gen7 (Ivy Bridge) and Gen7.5 (Haswell).
>
> Basic functionality works, but I haven't turned it on yet because the
> following tasks still need to be done:
>
> - Get sampling to work
From: Tom Stellard
We need to include the number of LDS bytes allocated by the state tracker.
---
src/gallium/drivers/radeonsi/radeonsi_compute.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/radeonsi_compute.c
b/src/gallium/drivers/rade
On 20 August 2013 11:30, Paul Berry wrote:
> From: Eric Anholt
>
> All but two of the piglit GLSL 1.50/uniform_buffer tests work, and
> maxuniformblocksize and referenced-by-shader work.
>
> v2 (Paul Berry ): Account for Ken's recent
> binding table re-work. Use brw->vec4_gs.bind_bo_offset inst
On 20 August 2013 11:30, Paul Berry wrote:
> ---
> src/mesa/drivers/dri/i965/brw_context.h | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h
> b/src/mesa/drivers/dri/i965/brw_context.h
> index 55d1174..4f6c767 100644
> --- a/src/mesa/dr
On 20 August 2013 11:30, Paul Berry wrote:
> ---
> src/mesa/drivers/dri/i965/brw_defines.h | 9 +
> src/mesa/drivers/dri/i965/brw_eu.h | 6 ++
> src/mesa/drivers/dri/i965/brw_eu_emit.c | 4 ++--
> src/mesa/drivers/dri/i965/brw_shader.cpp| 5 -
> src/mesa/
On 20 August 2013 11:30, Paul Berry wrote:
> +int
> +vec4_gs_visitor::setup_varying_inputs(int payload_reg, int *attribute_map)
> +{
> + /* For geometry shaders there are N copies of the input attributes,
> where N
> +* is the number of input vertices.
> attribute_map[BRW_VARYING_SLOT_COUN
On 20 August 2013 11:30, Paul Berry wrote:
> ---
> src/mesa/drivers/dri/i965/brw_defines.h | 16
> src/mesa/drivers/dri/i965/brw_shader.cpp| 2 ++
> src/mesa/drivers/dri/i965/brw_vec4.h| 3 +++
> src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 18
On 21 August 2013 11:05, Kenneth Graunke wrote:
> On 08/20/2013 11:30 AM, Paul Berry wrote:
>
>> ---
>> src/mesa/drivers/dri/i965/brw_**defines.h | 9 +
>> src/mesa/drivers/dri/i965/brw_**eu.h | 6 ++
>> src/mesa/drivers/dri/i965/brw_**eu_emit.c | 4 ++--
>> s
On 20 August 2013 11:30, Paul Berry wrote:
> The arguments to brw_urb_WRITE() were getting pretty unwieldy, and we
> have to add more flags to support geometry shaders anyhow.
>
> Also plumb these flags through brw_clip_emit_vue(),
> brw_set_urb_message(), and the vec4_instruction class.
> ---
>
On 20 August 2013 11:30, Paul Berry wrote:
> ---
> src/mesa/drivers/dri/i965/brw_program.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_program.c
> b/src/mesa/drivers/dri/i965/brw_program.c
> index fdb2848..c40d506 100644
> --- a/src/mesa/dr
On 20 August 2013 11:30, Paul Berry wrote:
> When I initially generaized the vec4_visitor class in preparation for
> geometry shaders, I assumed that the setup_attributes() function would
> need to be different between vertex and geometry shaders, but its
> caller, setup_payload(), could be share
On 20 August 2013 11:30, Paul Berry wrote:
> ---
> src/mesa/drivers/dri/i965/brw_context.h | 23 +++
> 1 file changed, 23 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h
> b/src/mesa/drivers/dri/i965/brw_context.h
> index 1f1cd0a..4e8e239 100644
> --- a
On 20 August 2013 11:30, Paul Berry wrote:
> Both 3DSTATE_VS and 3DSTATE_GS have a dispatch_grf_start_reg control,
> which determines the register where the hardware delivers data sourced
> from the URB (push constants followed by per-vertex input data).
>
> For vertex shaders, we always set disp
On Wed, Aug 21, 2013 at 12:33 PM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> They are defined as constant 0.0/0.0/1.0.
>
> Three more little piglits.
>
> Cc: mesa-sta...@lists.freedesktop.org
> Signed-off-by: Michel Dänzer
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/ra
https://bugs.freedesktop.org/show_bug.cgi?id=68421
Priority: medium
Bug ID: 68421
Assignee: mesa-dev@lists.freedesktop.org
Summary: eglCreateWindowSurface should fail when called second
time for the same window
Severity: norm
_mesa_meta_begin() sets up an orthographic project and initializes the
viewport based on the current drawbuffer's width and height. This is
likely the window size, since it occurs before the meta operation binds
any temporary buffers.
decompress_texture_image needs the viewport to be the size of
On 08/22/2013 01:32 AM, Kenneth Graunke wrote:
_mesa_meta_begin() initializes the viewport based on the current
drawbuffer's width and height. This is probably the window size,
since it occurs before the meta operation binds any temporary buffers.
decompress_texture_image needs the viewport to
_mesa_meta_begin() initializes the viewport based on the current
drawbuffer's width and height. This is probably the window size,
since it occurs before the meta operation binds any temporary buffers.
decompress_texture_image needs the viewport to be the size of the image
it's trying to draw. Ot
On Mit, 2013-08-21 at 11:30 -0700, Tom Stellard wrote:
>
> The attached patches fix some LDS bugs on SI and add support for atomic
> add for R600 and SI.
>
> Please Review.
About patch 4:
> diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
> index ecc4718..09d5f01 100
On 22 August 2013 00:31, Ian Romanick wrote:
> Section 2.1.1 (Floating-point computation) says:
>
> "The result of providing a value that is not a floating-point
> number to such a command is unspecified, but must not lead to
> GL interruption or termination. In IEEE arithmetic, for
>
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