---
src/glsl/ir.cpp | 2 ++
src/glsl/ir.h | 3 +++
src/glsl/ir_constant_expression.cpp | 10 ++++++++++
src/glsl/ir_validate.cpp | 9 +++++++++
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 2 ++
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 8 ++++++++
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 6 ++++++
src/mesa/program/ir_to_mesa.cpp | 2 ++
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 ++
9 files changed, 44 insertions(+)
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index c6d96d8..e0570c7 100644
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -514,6 +514,8 @@ static const char *const operator_strs[] = {
"packHalf2x16_split",
"bfm",
"ubo_load",
+ "frexp",
+ "ldexp",
"vector_extract",
"fma",
"lrp",
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index b45e6cb..22e5bba 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -1156,6 +1156,9 @@ enum ir_expression_operation {
*/
ir_binop_ubo_load,
+ ir_binop_frexp,
+ ir_binop_ldexp,
+
/**
* Extract a scalar from a vector
*
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index 0a725b4..539e032 100644
--- a/src/glsl/ir_constant_expression.cpp
+++ b/src/glsl/ir_constant_expression.cpp
@@ -394,6 +394,7 @@ ir_expression::constant_expression_value(struct hash_table
*variable_context)
switch (this->operation) {
case ir_binop_lshift:
case ir_binop_rshift:
+ case ir_binop_ldexp:
case ir_binop_vector_extract:
case ir_triop_bitfield_extract:
break;
@@ -1375,6 +1376,15 @@ ir_expression::constant_expression_value(struct
hash_table *variable_context)
break;
}
+ case ir_binop_ldexp:
+ for (unsigned c = 0; c < components; c++) {
+ data.f[c] = ldexp(op[0]->value.f[c], op[1]->value.i[c]);
+ /* Flush subnormal values to zero. */
+ if (!isnormal(data.f[c]))
+ data.f[c] = copysign(0.0, op[0]->value.f[c]);
+ }
+ break;
+
case ir_triop_lrp: {
assert(op[0]->type->base_type == GLSL_TYPE_FLOAT);
assert(op[1]->type->base_type == GLSL_TYPE_FLOAT);
diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
index 37f26fe..0244519 100644
--- a/src/glsl/ir_validate.cpp
+++ b/src/glsl/ir_validate.cpp
@@ -516,6 +516,15 @@ ir_validate::visit_leave(ir_expression *ir)
assert(ir->operands[1]->type == glsl_type::uint_type);
break;
+ case ir_binop_frexp:
+ case ir_binop_ldexp:
+ assert(ir->operands[0]->type == ir->type);
+ assert(ir->operands[0]->type->is_float());
+ assert(ir->operands[1]->type->base_type == GLSL_TYPE_INT);
+ assert(ir->operands[0]->type->components() ==
+ ir->operands[1]->type->components());
+ break;
+
case ir_binop_vector_extract:
assert(ir->operands[0]->type->is_vector());
assert(ir->operands[1]->type->is_scalar()
diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
index fa02d9b..6ee6d01 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
@@ -403,6 +403,8 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment
*ir)
case ir_unop_unpack_unorm_2x16:
case ir_unop_unpack_unorm_4x8:
case ir_unop_unpack_half_2x16:
+ case ir_binop_frexp:
+ case ir_binop_ldexp:
case ir_binop_vector_extract:
case ir_triop_vector_insert:
case ir_quadop_bitfield_insert:
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index ac85d25..4b54bee 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -500,6 +500,14 @@ fs_visitor::visit(ir_expression *ir)
assert(!"not reached: should be handled by lower_vector_insert()");
break;
+ case ir_binop_frexp:
+ assert(!"not reached: should be handled by frexp_to_arith()");
+ break;
+
+ case ir_binop_ldexp:
+ assert(!"not reached: should be handled by ldexp_to_arith()");
+ break;
+
case ir_unop_sqrt:
emit_math(SHADER_OPCODE_SQRT, this->result, op[0]);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 57a8e76..fbdf73d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1782,6 +1782,12 @@ vec4_visitor::visit(ir_expression *ir)
case ir_binop_pack_half_2x16_split:
assert(!"not reached: should not occur in vertex shader");
break;
+ case ir_binop_frexp:
+ assert(!"not reached: should be handled by frexp_to_arith()");
+ break;
+ case ir_binop_ldexp:
+ assert(!"not reached: should be handled by ldexp_to_arith()");
+ break;
}
}
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 340a449..4675a1e 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1497,6 +1497,8 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
case ir_triop_bitfield_extract:
case ir_triop_vector_insert:
case ir_quadop_bitfield_insert:
+ case ir_binop_frexp:
+ case ir_binop_ldexp:
assert(!"not supported");
break;
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 37779d4..4dd2cc5 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -1979,6 +1979,8 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
case ir_quadop_vector:
case ir_binop_vector_extract:
case ir_triop_vector_insert:
+ case ir_binop_frexp:
+ case ir_binop_ldexp:
/* This operation is not supported, or should have already been handled.
*/
assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
--
1.8.3.2
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