Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

On Wed, Apr 17, 2013 at 8:09 AM, Marek Olšák wrote: > On Tue, Apr 16, 2013 at 9:58 PM, Chia-I Wu wrote: >> >> On Wed, Apr 17, 2013 at 12:58 AM, Matt Turner wrote: >>> >>> I think everything Marek said was correct. If you could extend Gallium >>> to consume GLSL IR it might actually be an interes

Re: [Mesa-dev] [PATCH 2/2] gallium: Desambiguate TGSI_OPCODE_IF.

- Original Message - > On Son, 2013-04-14 at 09:12 +0100, jfons...@vmware.com wrote: > > > > diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > > b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > > index 314c963..dfc7cbc 100644 > > --- a/src/gallium/drivers/radeon/r

[Mesa-dev] [PATCH] mesa: fix type comparison error in sub-texture error checking code

patch fixes a crash that happens if glTexSubImage2D is called with a negative xoffset. Signed-off-by: Tapani Pälli --- src/mesa/main/teximage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c index 784b389..ae053e8 100644 --

Re: [Mesa-dev] [PATCH 2/2] gallium: Desambiguate TGSI_OPCODE_IF.

On Son, 2013-04-14 at 09:12 +0100, jfons...@vmware.com wrote: > > diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > index 314c963..dfc7cbc 100644 > --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > +++ b/src/galli

Re: [Mesa-dev] [PATCH] radeon/llvm: Use LLVM C API for compiling LLVM IR to ISA.

Tom, > -class LLVMEnsureMultithreaded { > -public: > - LLVMEnsureMultithreaded() > - { > - llvm_start_multithreaded(); > - } > -}; > - > -static LLVMEnsureMultithreaded lLVMEnsureMultithreaded; Removing this leads to crashes in llvm with applications that concurrently work on differe

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

On Wed, Apr 17, 2013 at 5:25 AM, Dave Airlie wrote: > >> Those are just ideas. I'm open to discussion. > > > > The driver is disabled by default and needs to be enabled via > > --with-gallium-drivers=i965. > > I think a warning + maybe something like > --with-gallium-drivers=i965g-unofficial mig

[Mesa-dev] [PATCH 8/8] draw/gs: make sure geometry shaders don't overflow

The specification says that the geometry shader should exit if the number of emitted vertices is bigger or equal to max_output_vertices and we can't do that because we're running in the SoA mode, which means that our storing routines will keep getting called on channels that have overflown (even th

[Mesa-dev] [PATCH 5/8] draw: implement pipeline statistics in the draw module

This is a basic implementation of the pipeline statistics in the draw module. The interface is similar to the stream output statistics and also requires that the callers explicitly enable it. Included is the implementation of the interface in llvmpipe and softpipe. Only softpipe enables the pipelin

[Mesa-dev] [PATCH 6/8] draw/gs: Return early if the passed geometry shader is null

Can happen if we were using stream output without geometry shader, by returning early we avoid a crash. --- src/gallium/auxiliary/draw/draw_gs.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/auxiliary/draw/draw_gs.c b/src/gallium/auxiliary/draw/draw_gs.c index ce820ef..577

Re: [Mesa-dev] [PATCH] ralloc: don't write to memory in case of alloc fail.

On 04/16/2013 06:08 PM, Dave Airlie wrote: From: Dave Airlie For some reason I made this happen under indirect rendering, I think we might have a leak, valgrind gave out, so I said I'd fix the basic problem. Signed-off-by: Dave Airlie --- src/glsl/ralloc.c |2 ++ 1 files changed, 2 ins

[Mesa-dev] [PATCH 11/11] mesa: remove gl_context::_TriangleCaps

No longer used anywhere. --- src/mesa/drivers/dri/i915/intel_tris.c |7 --- src/mesa/main/mtypes.h |5 - 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c index 07c73f5..45

[Mesa-dev] [PATCH 10/11] mesa: remove DD_TRI_LIGHT_TWOSIDE flag

v2: use conditional operator instead of bit shifting --- src/mesa/drivers/dri/i915/intel_tris.c |3 +++ src/mesa/drivers/dri/r200/r200_swtcl.c | 12 +++- src/mesa/drivers/dri/radeon/radeon_swtcl.c | 11 +++ src/mesa/main/debug.c | 12 -

[Mesa-dev] [PATCH 09/11] mesa: remove DD_TRI_UNFILLED flag

Use alternate code in intel, r200, radeon drivers. v2: use conditional operator instead of bit shifting --- src/mesa/drivers/dri/i915/intel_tris.c |4 +++- src/mesa/drivers/dri/r200/r200_state.c |5 +++-- src/mesa/drivers/dri/r200/r200_swtcl.c | 14 +++--- src/mesa/dr

[Mesa-dev] [PATCH 08/11] mesa: remove DD_TRI_SMOOTH flag

--- src/mesa/main/debug.c |5 ++--- src/mesa/main/enable.c |1 - src/mesa/main/mtypes.h |1 - src/mesa/main/state.c |2 -- 4 files changed, 2 insertions(+), 7 deletions(-) diff --git a/src/mesa/main/debug.c b/src/mesa/main/debug.c index 77629b9..418f0e2 100644 --- a/src/mesa/mai

[Mesa-dev] [PATCH 06/11] mesa: remove DD_TRI_OFFSET flag

Make it a local macro for the i915 driver. v2: use conditional operator instead of bit shifting --- src/mesa/drivers/dri/i915/intel_tris.c |4 src/mesa/main/debug.c |3 +-- src/mesa/main/mtypes.h |1 - src/mesa/main/state.c | 23

[Mesa-dev] [PATCH 07/11] mesa: remove DD_TRI_STIPPLE flag

Make it a local macro for the i915 driver. v2: use conditional operator instead of bit shifting --- src/mesa/drivers/dri/i915/intel_tris.c |2 ++ src/mesa/main/debug.c |3 +-- src/mesa/main/enable.c |1 - src/mesa/main/mtypes.h |1 -

[Mesa-dev] [PATCH 04/11] mesa: remove DD_POINT_SMOOTH flag

--- src/mesa/drivers/dri/r200/r200_swtcl.c |2 +- src/mesa/drivers/dri/r200/r200_tcl.c |2 +- src/mesa/main/debug.c |3 +-- src/mesa/main/enable.c |1 - src/mesa/main/mtypes.h |1 - src/mesa/main/state.c |2

[Mesa-dev] [PATCH 05/11] mesa: remove DD_POINT_ATTEN flag

For the i915 driver, make it a local macro. v2: use conditional operator instead of bit shifting --- src/mesa/drivers/dri/i915/intel_tris.c |4 +++- src/mesa/main/debug.c |5 ++--- src/mesa/main/mtypes.h |1 - src/mesa/main/points.c |

[Mesa-dev] [PATCH 03/11] mesa: remove DD_LINE_STIPPLE flag

For the i915 driver, make it a local macro. v2: use conditional operator instead of bit shifting --- src/mesa/drivers/dri/i915/intel_tris.c |4 +++- src/mesa/main/debug.c |3 +-- src/mesa/main/enable.c |1 - src/mesa/main/mtypes.h |1

[Mesa-dev] [PATCH 02/11] mesa: remove DD_SEPARATE_SPECULAR flag

--- src/mesa/drivers/dri/r200/r200_tcl.c|3 ++- src/mesa/drivers/dri/radeon/radeon_maos_verts.c |3 ++- src/mesa/drivers/dri/radeon/radeon_tcl.c|3 ++- src/mesa/main/debug.c |3 +-- src/mesa/main/mtypes.h |1

[Mesa-dev] [PATCH 01/11] mesa: remove unused DD_LINE_SMOOTH flag

--- src/mesa/main/debug.c |3 +-- src/mesa/main/enable.c |1 - src/mesa/main/mtypes.h |1 - src/mesa/main/state.c |2 -- 4 files changed, 1 insertions(+), 6 deletions(-) diff --git a/src/mesa/main/debug.c b/src/mesa/main/debug.c index aee8ae2..4f3d3f6 100644 --- a/src/mesa/main/

[Mesa-dev] [PATCH] ralloc: don't write to memory in case of alloc fail.

From: Dave Airlie For some reason I made this happen under indirect rendering, I think we might have a leak, valgrind gave out, so I said I'd fix the basic problem. Signed-off-by: Dave Airlie --- src/glsl/ralloc.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/src/gl

[Mesa-dev] [PATCH] i915: fix GL 2.0 override for i945

From: Dave Airlie the max version check was using the default cache, not reading from drirc, which kinda made it hard to force enable it in drirc land. So temporarily parse the dri config files and throw away the results. Signed-off-by: Dave Airlie --- src/mesa/drivers/dri/intel/intel_screen.

[Mesa-dev] [PATCH 11/11] i965: Fill in brw_format_for_mesa_format for some non-rendering formats.

This should have no change on driver operation, but it means that when you wonder why some format isn't supported natively, you can just look at the table above, instead of wondering if maybe there's an appropriate entry in the surface formats table that is already supported. --- src/mesa/drivers/

[Mesa-dev] [PATCH 10/11] i965: Use native RGB_FLOAT16 support when available.

Previously we would expand it to RGBA_FLOAT16. This format now comes out as framebuffer incomplete, but it seems worth the memory savings if that's what people are asking for (and GL3 does list it under "texture-only" color formats) --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c |2 +-

[Mesa-dev] [PATCH 09/11] intel: Add support for blitting 6 byte-per-pixel formats.

The next commit introduces what is apparently our first one, which tripped over this in glReadPixels. --- src/mesa/drivers/dri/intel/intel_blit.c | 21 ++--- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers

[Mesa-dev] [PATCH 06/11] i965: Sync brw_format_for_mesa_format() table with new Mesa formats.

I'm not filling them all in, to prevent any breakage in this commit. --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32 +- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_w

[Mesa-dev] [PATCH 05/11] i965: Update the surface formats table from the current specs.

Unfortunately the surface formats table is now splattered across multiple chapters. All surface format enums from brw_defines.h are present, but only support for them that is mentioned in the public specs is included here. --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 65 ++

[Mesa-dev] [PATCH 07/11] i965: Use the new XRGB UNORM formats.

This is a step on the way to removing some of our code for forcing alpha to 1, but I want easy bisecting so I'll add groups of formats separately. --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/

[Mesa-dev] [PATCH 08/11] i965: Use the Mesa surface formats for float RGB surfaces.

--- src/mesa/drivers/dri/i965/brw_wm_surface_state.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 94e712e..c1e3b14 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_

[Mesa-dev] [PATCH 03/11] i965: Trim trailing whitespace in brw_defines.h.

It was all over the formats section I wanted to edit. --- src/mesa/drivers/dri/i965/brw_defines.h | 288 +++ 1 file changed, 144 insertions(+), 144 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index a13f9

[Mesa-dev] [PATCH 04/11] i965: Add surface format defines from the public specs.

--- src/mesa/drivers/dri/i965/brw_defines.h | 45 +++ 1 file changed, 45 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 38f0356..7b01c75e 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/s

[Mesa-dev] [PATCH 02/11] mesa: Remove extension checking from ChooseTexFormat.

This should already be handled by _mesa_base_tex_format() calls in TexImage*. --- NOTE! I've replaced the actual patch full of unindentation of code described by: src/mesa/main/texformat.c | 1184 - 1 file changed, 533 insertions(+), 651 deletions(-)

[Mesa-dev] mesa/intel: format handling updates.

Two Mesa patches that might be generally interesting, then I proceed to slowly update the texture formats mappings in i965. One of the original goals was to remove the alpha-channel forcing code in our sampler state, but I couldn't quite find enough supported formats to do so. The code can be fou

[Mesa-dev] [PATCH 01/11] mesa: Add ChooseTexFormat support for the new XBGR formats.

--- src/mesa/main/texformat.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/src/mesa/main/texformat.c b/src/mesa/main/texformat.c index 6f22a4f..ecf8fec 100644 --- a/src/mesa/main/texformat.c +++ b/src/mesa/main/texformat.c @@ -142,6 +142,7 @@ _mesa_choose_tex_format(struct gl_

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

On Tue, Apr 16, 2013 at 9:58 PM, Chia-I Wu wrote: > > On Wed, Apr 17, 2013 at 12:58 AM, Matt Turner wrote: >> >> I think everything Marek said was correct. If you could extend Gallium >> to consume GLSL IR it might actually be an interesting project. > > Yes, it is. I do want to make pipe driver

Re: [Mesa-dev] [PATCH 4/8] intel: prepare for dri images having more than plane

Topi Pohjolainen writes: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/intel/intel_screen.c | 101 > +- > 1 file changed, 71 insertions(+), 30 deletions(-) > > diff --git a/src/mesa/drivers/dri/intel/intel_screen.c > b/src/mesa/drivers/dri/intel/in

Re: [Mesa-dev] [PATCH 3/8] intel: refactor planar format lookup

Topi Pohjolainen writes: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/intel/intel_screen.c | 22 -- > 1 file changed, 16 insertions(+), 6 deletions(-) > > diff --git a/src/mesa/drivers/dri/intel/intel_screen.c > b/src/mesa/drivers/dri/intel/intel_screen.c

Re: [Mesa-dev] [PATCH V2] intel: Add a null pointer check before dereferencing the pointer

On Tue, Apr 16, 2013 at 4:13 PM, Anuj Phogat wrote: > > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/intel/intel_screen.c | 9 + > 1 file changed, 9 insertions(+) > > diff --git a/src/mesa/drivers/dri/intel/intel_screen.c > b/src/mesa/drivers/dri/intel/intel_screen.c > index

[Mesa-dev] [PATCH 2/2] i965: Implement color clears using a simple shader in blorp.

The upside is less CPU overhead in fiddling with GL error handling, the ability to use the constant color write message in most cases, and no GLSL clear shaders appearing in MESA_GLSL=dump output. The downside is more batch flushing and a total recompute of GL state at the end of blorp. However, i

[Mesa-dev] [PATCH 1/2] i965: Don't flush the batch at the end of blorp.

Improves GLB2.7 performance 0.13% +/- 0.09% (n=104/105, outliers removed). More importantly, once color glClear()s are done through blorp in the next commit, this reduces regression in GLES3 conformance tests that rely on queueing up many glClear()s and having the GPU report being still busy in an

[Mesa-dev] [PATCH V2] intel: Add a null pointer check before dereferencing the pointer

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/intel/intel_screen.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 16750f2..00e7bc6 100644 --- a/src/mesa/drivers/dri/intel/intel_screen

[Mesa-dev] [PATCH] radeon/llvm: Use LLVM C API for compiling LLVM IR to ISA.

From: Tom Stellard The LLVM C API is considered stable and should never change, so it is much more desirable to use than the LLVM C++ API, which is constantly in flux. --- src/gallium/drivers/radeon/Makefile.am | 2 - src/gallium/drivers/radeon/Makefile.sources | 4 +- src/galli

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

- Original Message - > >> Those are just ideas.  I'm open to discussion. > > > > The driver is disabled by default and needs to be enabled via > > --with-gallium-drivers=i965. > > I think a warning + maybe something like > --with-gallium-drivers=i965g-unofficial might work, If not, then I

Re: [Mesa-dev] [PATCH] i965/vec4: Fix hypothetical use of uninitialized data in attribute_map[].

Reviewed-by: Jordan Justen On Tue, Apr 16, 2013 at 1:37 PM, Paul Berry wrote: > Fixes issue identified by Klocwork analysis: > > 'attribute_map' array elements might be used uninitialized in this > function (vec4_visitor::lower_attributes_to_hw_regs). > > The attribute_map array contains

Re: [Mesa-dev] [PATCH] intel: Add a null pointer check before dereferencing the pointer

On Tue, Apr 16, 2013 at 3:06 PM, Matt Turner wrote: > On Tue, Apr 16, 2013 at 11:11 AM, Anuj Phogat wrote: >> >> Signed-off-by: Anuj Phogat >> --- >> src/mesa/drivers/dri/intel/intel_screen.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/src/mesa/drivers/dri/intel/intel_screen.

[Mesa-dev] [Bug 63615] build fails after configure

https://bugs.freedesktop.org/show_bug.cgi?id=63615 burlen changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

Re: [Mesa-dev] [PATCH] intel: Add a null pointer check before dereferencing the pointer

On Tue, Apr 16, 2013 at 11:11 AM, Anuj Phogat wrote: > > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/intel/intel_screen.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/src/mesa/drivers/dri/intel/intel_screen.c > b/src/mesa/drivers/dri/intel/intel_screen.c > index 16750

Re: [Mesa-dev] [PATCH] intel: Add a null pointer check before dereferencing the pointer

Reviewed-by: Jordan Justen On Tue, Apr 16, 2013 at 11:11 AM, Anuj Phogat wrote: > > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/intel/intel_screen.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/src/mesa/drivers/dri/intel/intel_screen.c > b/src/mesa/drivers/dri/intel

[Mesa-dev] [Bug 63615] New: build fails after configure

https://bugs.freedesktop.org/show_bug.cgi?id=63615 Priority: medium Bug ID: 63615 Assignee: mesa-dev@lists.freedesktop.org Summary: build fails after configure Severity: critical Classification: Unclassified OS: Linux (All)

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

>> Those are just ideas. I'm open to discussion. > > The driver is disabled by default and needs to be enabled via > --with-gallium-drivers=i965. I think a warning + maybe something like --with-gallium-drivers=i965g-unofficial might work, the thing is distros should probably be using i915g at th

Re: [Mesa-dev] [PATCH 2/2] gallium: Desambiguate TGSI_OPCODE_IF.

Hi Jose, This looks good to me. Marek On Tue, Apr 16, 2013 at 10:11 PM, Jose Fonseca wrote: > - Original Message - > > The R600 code looks good. > > > > Marek > > > > > > When I rebased on top of master, I had a conflict on r600. Below is how I > resolved. Please confirm you're OK wit

Re: [Mesa-dev] [PATCH] st/mesa: optionally apply texture swizzle to border color v2

Thanks for the update. Looks good to me FWIW. Jose - Original Message - > From: Christoph Bumiller > > This is the only sane solution for nv50 and nvc0 (really, trust me), > but since on other hardware the border colour is tightly coupled with > texture state they'd have to undo the sw

[Mesa-dev] [PATCH] i965/vec4: Fix hypothetical use of uninitialized data in attribute_map[].

Fixes issue identified by Klocwork analysis: 'attribute_map' array elements might be used uninitialized in this function (vec4_visitor::lower_attributes_to_hw_regs). The attribute_map array contains the mapping from shader input attributes to the hardware registers they are stored in. vec

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

> i965 is fully programmable. It can do vertex, geometry, hull, domain, and > fragment shading in hardware. The only thing the i965 classic driver uses > software rendering for is some deprecated and rarely used GL 1.x features. I think the original 965G and 965GM chip suffered from a balance pr

Re: [Mesa-dev] EXT_image_dma_buf_import for intel

Topi Pohjolainen writes: > The set introduces new target for 'eglCreateImageKHR()' allowing one > to create EGL images out of externally allocated buffers. Especially > one can combine up to three separate buffers into one single logical > entity. Low level native buffers may not support planar f

Re: [Mesa-dev] [PATCH 2/2] gallium: Desambiguate TGSI_OPCODE_IF.

- Original Message - > The R600 code looks good. > > Marek > > When I rebased on top of master, I had a conflict on r600. Below is how I resolved. Please confirm you're OK with it. Jose diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c inde

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

Hi Ken, On Wed, Apr 17, 2013 at 1:18 AM, Kenneth Graunke wrote: > On 04/16/2013 09:58 AM, Matt Turner wrote: > >> On Tue, Apr 16, 2013 at 9:45 AM, Chia-I Wu wrote: >> >>> If there is no objection, I'd like to merge it in a day or two. >>> >> >> My only objection is over adding a driver that is e

Re: [Mesa-dev] [PATCH 1/2] gallivm: Add no_rho_opt debug option

Am 16.04.2013 21:41, schrieb Brian Paul: > On 04/16/2013 01:07 PM, srol...@vmware.com wrote: >> From: Roland Scheidegger >> >> This will calculate rho correctly as >> sqrt(max((ds/dx)^2 + (dt/dx)^2 + (dr/dx)^2), (ds/dx)^2 + (dt/dx)^2 + >> (dr/dx)^2)) >> instead of max(|ds/dx|,|dt/dx|,|dr/dx|,|ds/dy

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

On 04/16/2013 10:35 AM, Michael Karcher wrote: Am Dienstag, den 16.04.2013, 10:23 -0700 schrieb Matt Turner: waste. It wasn't uncommon for a user to waste a nontrivial amount of someone's time in #intel-gfx only to discover that they were trying to use the (old) i965g driver that no one maintain

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

Hi Matt, On Wed, Apr 17, 2013 at 12:58 AM, Matt Turner wrote: > On Tue, Apr 16, 2013 at 9:45 AM, Chia-I Wu wrote: > > If there is no objection, I'd like to merge it in a day or two. > > My only objection is over adding a driver that is explicitly a toy, > the confusion it will cause users, and

Re: [Mesa-dev] [PATCH 2/2] gallivm: change cubemaps / derivatives handling, take 55

On 04/16/2013 01:07 PM, srol...@vmware.com wrote: From: Roland Scheidegger Turns out the previous "fix" for handling per-pixel face selection and derivatives didn't work out that well - the derivatives were wrong by quite a bit, in theory transformation of the derivatives into cube space should

Re: [Mesa-dev] [PATCH 1/2] gallivm: Add no_rho_opt debug option

On 04/16/2013 01:07 PM, srol...@vmware.com wrote: From: Roland Scheidegger This will calculate rho correctly as sqrt(max((ds/dx)^2 + (dt/dx)^2 + (dr/dx)^2), (ds/dx)^2 + (dt/dx)^2 + (dr/dx)^2)) instead of max(|ds/dx|,|dt/dx|,|dr/dx|,|ds/dy|,|dt/dy,|dr/dy|) (for 3 coords - 2 coords work analogous,

[Mesa-dev] [PATCH 2/2] gallivm: change cubemaps / derivatives handling, take 55

From: Roland Scheidegger Turns out the previous "fix" for handling per-pixel face selection and derivatives didn't work out that well - the derivatives were wrong by quite a bit, in theory transformation of the derivatives into cube space should work, but would be _a lot_ more work than the "simp

[Mesa-dev] [PATCH 1/2] gallivm: Add no_rho_opt debug option

From: Roland Scheidegger This will calculate rho correctly as sqrt(max((ds/dx)^2 + (dt/dx)^2 + (dr/dx)^2), (ds/dx)^2 + (dt/dx)^2 + (dr/dx)^2)) instead of max(|ds/dx|,|dt/dx|,|dr/dx|,|ds/dy|,|dt/dy,|dr/dy|) (for 3 coords - 2 coords work analogous, for 1 coord there's no point doing the exact versi

[Mesa-dev] [PATCH] intel: Add a null pointer check before dereferencing the pointer

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/intel/intel_screen.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 16750f2..27b992c 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

On Tue, Apr 16, 2013 at 10:35 AM, Michael Karcher wrote: > I suspect there might be a comparable need for a i965g driver, as that > chip has no vertex shader hardware. This isn't true. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://list

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

Am Dienstag, den 16.04.2013, 10:23 -0700 schrieb Matt Turner: > >> waste. It wasn't uncommon for a user to waste a nontrivial amount of > >> someone's time in #intel-gfx only to discover that they were trying to > >> use the (old) i965g driver that no one maintained. > > I wonder, should i965g be b

Re: [Mesa-dev] Mismatch between Mesas dispatch table and the one used by the X server

On 04/06/2013 11:36 AM, Stefan Brüns wrote: Am Freitag, 22. März 2013, 11:46:52 schrieben Sie: To call glFoo, the xserver (or libGL) does (dispatch_table[offset_of_glFoo])(...); To set the pointer for the glFoo function, the driver does dispatch_table[remap_table[remap_offset_of_

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

On Tue, Apr 16, 2013 at 10:18 AM, Kenneth Graunke wrote: > On 04/16/2013 09:58 AM, Matt Turner wrote: >> >> On Tue, Apr 16, 2013 at 9:45 AM, Chia-I Wu wrote: >>> >>> If there is no objection, I'd like to merge it in a day or two. >> >> >> My only objection is over adding a driver that is explicit

Re: [Mesa-dev] [PATCH] intel: Don't dereference a NULL pointer of calloc fails

On 04/16/2013 09:32 AM, Ian Romanick wrote: From: Ian Romanick The caller of NewTextureObject does the right thing if NULL is returned, so this function should do the right thing too. NOTE: This is a candidate for stable branches. Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/intel/

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

On 04/16/2013 09:58 AM, Matt Turner wrote: On Tue, Apr 16, 2013 at 9:45 AM, Chia-I Wu wrote: If there is no objection, I'd like to merge it in a day or two. My only objection is over adding a driver that is explicitly a toy, the confusion it will cause users, and the developer time it will wa

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

On 04/16/2013 09:58 AM, Matt Turner wrote: On Tue, Apr 16, 2013 at 9:45 AM, Chia-I Wu wrote: If there is no objection, I'd like to merge it in a day or two. My only objection is over adding a driver that is explicitly a toy, the confusion it will cause users, and the developer time it will wa

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

On Tue, Apr 16, 2013 at 9:45 AM, Chia-I Wu wrote: > If there is no objection, I'd like to merge it in a day or two. My only objection is over adding a driver that is explicitly a toy, the confusion it will cause users, and the developer time it will waste. It wasn't uncommon for a user to waste a

Re: [Mesa-dev] new i965g pipe driver for Intel GEN6 (and later)

Hi list, On Thu, Dec 13, 2012 at 6:41 AM, Chia-I Wu wrote: > Hi list, > > I've been working on i965g, a new pipe driver for Intel GEN6 (and > later), for a while now. I would like to know if there is any > interest in it and if it can be merged upstream. The code is > currently available here

Re: [Mesa-dev] [PATCH] libclc: Add clamp(vec, scalar, scalar) and max(vec, scalar)

On Sat, Apr 13, 2013 at 11:32:18AM -0500, Aaron Watry wrote: > For any GENTYPE that isn't scalar, we need to implement a mixed > vector/scalar version of clamp/max. > > This depends on the min() patches I sent to the list a few minutes ago. Reviewed-by: Tom Stellard > --- > generic/include/clc

Re: [Mesa-dev] Small build issue with libdrm under home since uvd commit.

On Tue, Apr 16, 2013 at 2:54 AM, Andy Furniss wrote: > On one of my builds I have libdrm/mesa/xorg living under my home, normally I > can build mesa by setting LDFLAGS and --prefix= but since the uvd commit I > get - > > Making all in radeon > make[3]: Entering directory > `/mnt/sdb1/Src/Mesa-git/

[Mesa-dev] [PATCH] intel: Don't dereference a NULL pointer of calloc fails

From: Ian Romanick The caller of NewTextureObject does the right thing if NULL is returned, so this function should do the right thing too. NOTE: This is a candidate for stable branches. Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/intel/intel_tex.c | 4 1 file changed, 4 inserti

Re: [Mesa-dev] [PATCH] libclc: Implement clz() builtin

On Mon, Apr 15, 2013 at 07:20:31PM -0500, Aaron Watry wrote: Reviewed-by: Tom Stellard > Squashed commit of the following: > > commit a0df0a0e86c55c1bdc0b9c0f5a739e5adef4b056 > Author: Aaron Watry > Date: Mon Apr 15 18:42:04 2013 -0500 > > libclc: Rename clz.ll to clz_if.ll to ensure it

Re: [Mesa-dev] (no subject)

On Sat, Apr 13, 2013 at 11:22:51AM -0500, Aaron Watry wrote: > Implements the min() OpenCL built-in in 2 stages. > 1) Implement min() where the two argument types match > 2) Make changes to support min(vec,scalar) > For the series: Reviewed-by: Tom Stellard > __

Re: [Mesa-dev] [PATCH] libclc: Rename [add|sub]_sat.ll to [add|sub]_sat_if.ll

On Mon, Apr 15, 2013 at 07:14:28PM -0500, Aaron Watry wrote: > configure.py allows overloading *.cl with *.ll, but will only ever build > the first file listed in SOURCES of ${file}.cl and ${file}.ll > > add_sat, sub_sat, (and the soon to be submitted clz) all define interfaces in > ${function_nam

[Mesa-dev] [PATCH 11/14] mesa: don't flag _NEW_DEPTH in Begin/EndQuery if driver implements the functions

We don't want to set the flag for Gallium. I think only swrast needs the flag to be set for occlusion queries. Reviewed-by: Brian Paul v2: fix stats_wm updates in i965 --- Something like this, Eric? src/mesa/drivers/dri/i965/brw_cc.c |2 +- src/mesa/drivers/dri/i965/brw_context.h

Re: [Mesa-dev] [PATCH v2] r600g: Workaround for a harware bug with nested loops on Cayman

On Tue, Apr 16, 2013 at 2:46 AM, Vadim Girlin wrote: > On 04/15/2013 11:22 PM, Martin Andersson wrote: >> >> There is a hardware bug on Cayman where a BREAK/CONTINUE followed by >> LOOP_STARTxxx for nested loops may put the branch stack into a state >> such that ALU_PUSH_BEFORE doesn't work as exp

[Mesa-dev] [PATCH 8/8] intel: enable EXT_image_dma_buf_import

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c index 1ad728a..c8d6891 100755 --- a/src/mesa/drivers/dri/intel/intel

[Mesa-dev] [PATCH 7/8] egl: dri2: support for creating images out of dma buffers

Signed-off-by: Topi Pohjolainen --- src/egl/drivers/dri2/egl_dri2.c | 238 1 file changed, 238 insertions(+) diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c index 5302c0a..1ab6a82 100644 --- a/src/egl/drivers/dri2/egl_dri2.c

[Mesa-dev] [PATCH 6/8] egl: definitions for EXT_image_dma_buf_import

As specified in: http://www.khronos.org/registry/egl/extensions/EXT/EGL_EXT_image_dma_buf_import.txt Checking for the valid fourcc values is left for drivers avoiding dependency to drm header files here. Signed-off-by: Topi Pohjolainen --- include/EGL/eglext.h | 33

[Mesa-dev] [PATCH 5/8] dri: propagate extra dma_buf import attributes to the drivers

Signed-off-by: Topi Pohjolainen --- include/GL/internal/dri_interface.h| 23 +++ src/egl/drivers/dri2/egl_dri2.c| 1 + src/mesa/drivers/dri/intel/intel_regions.h | 7 +++ src/mesa/drivers/dri/intel/intel_screen.c | 9 + 4 files changed, 40 i

[Mesa-dev] [PATCH 4/8] intel: prepare for dri images having more than plane

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_screen.c | 101 +- 1 file changed, 71 insertions(+), 30 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 3d0344e..8716688 100644

[Mesa-dev] [PATCH 2/8] intel: replace single region with a vector of regions

No functional change in preparation for supporting multiple planes per image each having its own region. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_fbo.c | 6 +-- src/mesa/drivers/dri/intel/intel_regions.h | 7 ++- src/mesa/drivers/dri/intel/intel_screen.c

[Mesa-dev] [PATCH 3/8] intel: refactor planar format lookup

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_screen.c | 22 -- 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 46193b5..3d0344e 100644 --- a/src/

[Mesa-dev] [PATCH 1/8] intel: do not create renderbuffers out of planar images

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_fbo.c | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index c79b56a..1b72ac6 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/

[Mesa-dev] EXT_image_dma_buf_import for intel

The set introduces new target for 'eglCreateImageKHR()' allowing one to create EGL images out of externally allocated buffers. Especially one can combine up to three separate buffers into one single logical entity. Low level native buffers may not support planar formats and hence EGL layer will ins

[Mesa-dev] Small build issue with libdrm under home since uvd commit.

On one of my builds I have libdrm/mesa/xorg living under my home, normally I can build mesa by setting LDFLAGS and --prefix= but since the uvd commit I get - Making all in radeon make[3]: Entering directory `/mnt/sdb1/Src/Mesa-git/mesa/src/gallium/drivers/radeon' CC radeon_uvd.lo In f

Re: [Mesa-dev] [PATCH 3/3] mesa/swrast: Move memory allocation outside the blit loop

On 04/15/2013 11:05 PM, Kenneth Graunke wrote: On 04/15/2013 05:53 PM, Ian Romanick wrote: From: Ian Romanick Assume the maximum pixel size (16 bytes per pixel). In addition to moving redundant malloc and free calls outside the loop, this fixes a potential resource leak when a surface is mapp